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1. 发明授权

US06498759B2 System for automatic generation of suitable voltage source on motherboard 有权
标题翻译：在主板上自动生成合适电压源的系统
公开(公告)号：US06498759B2
公开(公告)日：2002-12-24
申请号：US09752119
申请日：2000-12-29
申请人： Nai-Shung Chang , Ching-Fu Chuang , Hsiu-Wen Ho
发明人： Nai-Shung Chang , Ching-Fu Chuang , Hsiu-Wen Ho
IPC分类号： G11C700
CPC分类号： G06F1/26 , G11C5/04 , G11C5/06 , G11C5/14 , G11C5/143 , G11C8/06 , H05K1/0246 , H05K1/0262 , H05K1/14 , H05K1/141 , H05K2201/044 , H05K2201/10022 , H05K2201/10159
摘要： A system can produce a suitable voltage for powering the memory modules plugged into the memory module slots of a motherboard. A power-good signal is issued when the motherboard is powered up. A power safety device on the motherboard then issues a 2.5V to the memory module slot. If DDR DRAM type of memory modules are not detected after a while, the power safety device will turn off the 2,5V supply and provide a 3.3V, which is suitable for SDRAM type memory modules.This invention avoids sending a 3.3V to DDR DRAM modules, thereby burning the memory chip. The presence of DDR DRAM modules can be detected by a general-purpose purpose input/output port through accessing the recorded data in the EEPROM of the memory module. Alternatively, memory module type can be determined by sending out a low-current pulse signal to the memory module slot. Hence, a suitable voltage source is automatically provided to power the memory modules in the slots.
摘要翻译：系统可以产生合适的电压，用于为插入主板的存储器模块槽中的存储器模块供电。主板上电时发出电源良好信号。主板上的电源安全设备然后向内存模块插槽发出2.5V电压。如果DDR DRAM类型的存储器模块一段时间没有被检测到，电源安全设备将关闭2,5V电源并提供3.3V，这适用于SDRAM型存储器模块。本发明避免了将3.3V发送到DDR DRAM模块，从而烧录存储芯片。通过访问存储器模块的EEPROM中的记录数据，可以通过通用目的输入/输出端口来检测DDR DRAM模块的存在。或者，可以通过向存储器模块插槽发送低电流脉冲信号来确定存储器模块类型。因此，自动提供合适的电压源来为插槽中的存储器模块供电。

2. 发明授权

US06384346B1 Trace layout of a printed circuit board with AGP and PCI slots 有权
标题翻译：具有AGP和PCI插槽的印刷电路板的跟踪布局
公开(公告)号：US06384346B1
公开(公告)日：2002-05-07
申请号：US09688037
申请日：2000-10-12
申请人： Nai-Shung Chang , Ching-Fu Chuang , Hsiu-Wen Ho , Chia-Hsing Yuo , Shu-Hui Chen
发明人： Nai-Shung Chang , Ching-Fu Chuang , Hsiu-Wen Ho , Chia-Hsing Yuo , Shu-Hui Chen
IPC分类号： H01R909
CPC分类号： H05K7/1459 , H05K1/0216 , H05K2201/044 , H05K2201/09236
摘要： A trace layout of a printed circuit board (PCB) is provided with a north bridge, at least a peripheral component interconnect (PCI) slot, and an accelerate graphics port (AGP) slot. The PCB includes at least a first trace layer and a second trace layer under the first trace layer. The AGP slot is mounted between the north bridge and the PCI slot. The PCB further includes a number of first traces, and a number of second traces. The first traces are used for connecting the north bridge to the PCI slot while the second traces are used to connect the north bridge to the AGP slot. Some of the first traces are on the second trace layer under the AGP slot, while the other of the first traces are on the first trace layer or the second trace layer and trace aside the AGP slot. Most of the second traces are on the first trace layer and the other of the second traces are on the second trace layer.
摘要翻译：印刷电路板（PCB）的迹线布局提供有北桥，至少外围组件互连（PCI）插槽和加速图形端口（AGP）插槽。 PCB包括至少第一迹线层和第一迹线层下的第二迹线层。 AGP插槽安装在北桥和PCI插槽之间。 PCB还包括多个第一迹线和多个第二迹线。第一条迹线用于将北桥连接到PCI插槽，而第二条路径用于将北桥连接到AGP插槽。一些第一个迹线位于AGP插槽下的第二个跟踪层上，而第一个迹线中的另一个迹线位于第一个跟踪层或第二个跟踪层上，并跟踪AGP插槽。大多数第二迹线位于第一迹线层上，而第二迹线中的另一条迹线位于第二迹线层上。

3. 发明授权

US06554195B1 Dual processor adapter card 有权
标题翻译：双处理器适配卡
公开(公告)号：US06554195B1
公开(公告)日：2003-04-29
申请号：US09422020
申请日：1999-10-20
申请人： Nai-Shung Chang , Lie-Wen Chen , Ching-Fu Chuang , Chia-Hsing Yu
发明人： Nai-Shung Chang , Lie-Wen Chen , Ching-Fu Chuang , Chia-Hsing Yu
IPC分类号： G06K1906
CPC分类号： G06F1/185 , G06F1/184 , G06F1/186 , H05K1/023 , H05K1/0262 , H05K1/117 , H05K1/141 , H05K3/368 , H05K7/1092 , H05K2201/10022 , H05K2201/10196 , H05K2201/10325 , H05K2201/10689
摘要： A dual processor adapter card with a plurality of electrical pins for inserting into a processor slot on a mainboard by which the adapter card is electrically coupled to the mainboard. There is a first and a second processor socket on the adapter card for carrying a first and a second processor respectively. The first and the second processor socket each has a plurality of corresponding pins, a portion of the pins of the first and the second processor socket corresponds to a portion of the electrical pins. Corresponding pins are coupled together. Furthermore, each of the pins that act as a terminal lead in the first and the second processor socket is connected to a pull-up resistor, and the pull-up resistor is connected to a terminal voltage. In addition, a zero-delay buffer for synchronizing clock pulse signals and a voltage regulator for regulating a power voltage into a suitable working voltage are mounted on the adapter card and coupled to the first and the second processor socket respectively.
摘要翻译：一种双处理器适配器卡，其具有多个电引脚，用于插入到主板上的处理器插槽中，通过该处理器插槽将适配器卡电耦合到主板。适配器卡上有一个第一和第二个处理器插座，分别用于承载第一和第二处理器。第一和第二处理器插座各自具有多个对应的引脚，第一和第二处理器插座的一部分引脚对应于电引脚的一部分。相应的引脚耦合在一起。此外，在第一和第二处理器插座中用作端子引线的每个引脚连接到上拉电阻器，并且上拉电阻器连接到端子电压。此外，用于将时钟脉冲信号同步的零延迟缓冲器和用于将电源电压调节到合适工作电压的电压调节器分别安装在适配器卡上并分别耦合到第一和第二处理器插槽。

4. 发明授权

US6084425A Apparatus for adjusting impedance of controlling chip on a computer mainboard 失效
标题翻译：用于调整计算机主板上控制芯片阻抗的装置
公开(公告)号：US6084425A
公开(公告)日：2000-07-04
申请号：US96057
申请日：1998-06-11
申请人： Yuantsang Liaw , Ching-Fu Chuang , Nai-Shung Chang
发明人： Yuantsang Liaw , Ching-Fu Chuang , Nai-Shung Chang
IPC分类号： H03H7/40 , G01R19/00
CPC分类号： H03H7/40
摘要： An impedance adjusting apparatus of a controlling chip on a computer mainboard. When a computer is turned on, BIOS automatically detects the actual usage of the memory sockets, and then sends corresponding control signals to adjust the impedance of the impedance adjusting apparatus for a better impedance matching between the controlling chip and the memory sockets. The signal reflection is dramatically reduced and the operation bandwidth is widened.
摘要翻译：一种在计算机主板上的控制芯片的阻抗调节装置。当计算机打开时，BIOS会自动检测内存插槽的实际使用情况，然后发送相应的控制信号，调整阻抗调整装置的阻抗，以便控制芯片和存储器插槽之间更好的阻抗匹配。信号反射明显减少，工作带宽扩大。

5. 发明授权

US06563338B2 Control circuit and chipset on motherboard for saving terminal resistors and method for realizing the same 有权
标题翻译：主板上的控制电路和芯片组用于节省端子电阻及实现方法
公开(公告)号：US06563338B2
公开(公告)日：2003-05-13
申请号：US09921950
申请日：2001-08-03
申请人： Ching-Fu Chuang , Nai-Shung Chang
发明人： Ching-Fu Chuang , Nai-Shung Chang
IPC分类号： H03K1716
CPC分类号： H03K19/01721 , H03K19/0016
摘要： A control circuit, a chipset and a method capable of saving the terminal resistors on a motherboard. Through the determination of connection of a pull-up enable line to a first voltage source Vdd via a resistor, an equivalent resistance is set between the source terminal and the drain terminal of a field effect transistor. The equivalent resistance is almost identical to the terminal resistor and hence can replace the resistor on the motherboard. When the pull-up enable line is connected to the first voltage source Vdd via a resistor, an equivalent resistance of about 45-60&OHgr; is established between the source and drain terminal of the field effect transistor. The equivalent resistance is connected in parallel with an input/output pad and a second voltage source Vtt to replace the original externally connected terminal resistor rt2 at the other end of the bus. If the pull-up enable line is not connected to a first voltage source Vdd via a resistor, the field effect transistor is cut off and an infinite equivalent resistance is created between the source and the drain terminal. The infinite resistance is connected in parallel between the input/output pad and the second voltage source Vtt. The infinite equivalent resistance has little effect on any externally connected terminal resistor rt2 at the other end of the bus. Hence, through enabling or disabling the pull-up enable line, manufacturers are free to choose whether to save output power to the terminal resistor rt2 at the other end of the bus or not.
摘要翻译：一种控制电路，芯片组和能够在主板上保存终端电阻的方法。通过经由电阻器确定上拉使能线与第一电压源Vdd的连接，在场效应晶体管的源极端子和漏极端子之间设置等效电阻。等效电阻几乎与端子电阻相同，因此可以替代主板上的电阻。当上拉使能线通过电阻连接到第一电压源Vdd时，在场效应晶体管的源极和漏极端之间建立约45-60OMEGA的等效电阻。等效电阻与输入/输出焊盘和第二电压源Vtt并联连接，以替代总线另一端的原始外部连接的端子电阻器rt2。如果上拉使能线路没有通过电阻器连接到第一电压源Vdd，则场效应晶体管被切断，并且在源极和漏极端子之间产生无限等效电阻。无限电阻在输入/输出焊盘和第二电压源Vtt之间并联连接。无限等效电阻对总线另一端的任何外部连接的端子电阻rt2几乎没有影响。因此，通过启用或禁用上拉使能线，制造商可以自由选择是否将总线的另一端的终端电阻rt2的输出功率节省。

6. 发明授权

US07723843B2 Multi-package module and electronic device using the same 有权
标题翻译：多包装模块和使用电子装置的电子装置
公开(公告)号：US07723843B2
公开(公告)日：2010-05-25
申请号：US12354152
申请日：2009-01-15
申请人： Chih-Hsiung Lin , Nai-Shung Chang
发明人： Chih-Hsiung Lin , Nai-Shung Chang
IPC分类号： H01L23/34
CPC分类号： H01L23/367 , H01L23/3677 , H01L2224/16225 , H01L2224/48227 , H01L2224/73253 , H01L2924/15311 , H01L2924/15321
摘要： A package substrate for a multi-package module. The package substrate comprises a substrate having a die region and at least one thermal channel region outwardly extending to an edge of the substrate from the die region. An array of bumps is arranged on the substrate except in the die and thermal channel regions, in which the interval between the bumps is narrower than the width of the thermal channel region. An electronic device with a package substrate is also disclosed.
摘要翻译：一种用于多封装模块的封装衬底。封装衬底包括具有管芯区域和从管芯区域向外延伸到衬底的边缘的至少一个热通道区域的衬底。凸起之间的间隔比热通道区域的宽度窄，在芯片和热通道区域之外的基板上配置有凸块排列。还公开了一种具有封装基板的电子器件。

7. 发明授权

US07525182B2 Multi-package module and electronic device using the same 有权
标题翻译：多包装模块和使用电子装置的电子装置
公开(公告)号：US07525182B2
公开(公告)日：2009-04-28
申请号：US11243121
申请日：2005-10-04
申请人： Chih-Hsiung Lin , Nai-Shung Chang
发明人： Chih-Hsiung Lin , Nai-Shung Chang
IPC分类号： H01L23/495
CPC分类号： H01L23/367 , H01L23/3677 , H01L2224/16225 , H01L2224/48227 , H01L2224/73253 , H01L2924/15311 , H01L2924/15321
摘要： A package substrate for a multi-package module. The package substrate comprises a substrate having a die region and at least one thermal channel region outwardly extending to an edge of the substrate from the die region. An array of bumps is arranged on the substrate except in the die and thermal channel regions, in which the interval between the bumps is narrower than the width of the thermal channel region. An electronic device with a package substrate is also disclosed.
摘要翻译：一种用于多封装模块的封装衬底。封装衬底包括具有管芯区域和从管芯区域向外延伸到衬底的边缘的至少一个热通道区域的衬底。凸起之间的间隔比热通道区域的宽度窄，在芯片和热通道区域之外的基板上配置有凸块排列。还公开了一种具有封装基板的电子器件。

8. 发明申请

US20070288782A1 METHOD FOR REDUCING POWER CONSUMPTION OF A COMPUTER SYSTEM IN THE WORKING STATE 有权
标题翻译：降低工作状态下计算机系统功耗的方法
公开(公告)号：US20070288782A1
公开(公告)日：2007-12-13
申请号：US11423722
申请日：2006-06-13
申请人： Nai-Shung Chang , Chia-Hsing Yu
发明人： Nai-Shung Chang , Chia-Hsing Yu
IPC分类号： G06F1/00
CPC分类号： G06F1/324 , G06F1/3225 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： A method for reducing power consumption of a computer system in a working state is provided. The computer system comprises a processor, a memory and a chipset, and the processor is connected with the chipset through a processor bus. The method comprises classifying the power saving level of the computer system into a predetermined number of power saving modes, checking at least one power saving mode transition condition to determine whether to automatically raise the power saving mode of the computer system, and raising the power saving mode of the computer system by lowering a first voltage supply level of the chipset and a second voltage supply level of the memory and decreasing a first working frequency of the processor bus and a second working frequency of the memory. The power consumption of the computer system is further reduced in comparison with a normal working state when the power saving mode of the computer system is further raised.
摘要翻译：提供了一种降低处于工作状态的计算机系统的功耗的方法。计算机系统包括处理器，存储器和芯片组，并且处理器通过处理器总线与芯片组连接。该方法包括将计算机系统的省电水平分为预定数量的省电模式，检查至少一个省电模式转换条件，以确定是否自动提高计算机系统的省电模式，并提高节电通过降低芯片组的第一电压供应电平和存储器的第二电压供应电平并降低处理器总线的第一工作频率和存储器的第二工作频率来实现计算机系统的模式。当计算机系统的省电模式进一步提高时，与正常工作状态相比，计算机系统的功耗进一步降低。

9. 发明授权

US06946731B2 Layout structure for providing stable power source to a main bridge chip substrate and a motherboard 有权
公开(公告)号：US06946731B2
公开(公告)日：2005-09-20
申请号：US10173231
申请日：2002-06-14
申请人： Nai-Shung Chang , Shu-Hui Chen , Tsai-Sheng Chen , Chia-Hsing Yu
发明人： Nai-Shung Chang , Shu-Hui Chen , Tsai-Sheng Chen , Chia-Hsing Yu
IPC分类号： H01L23/34 , H01L23/48 , H01L23/498 , H01L23/50 , H01L23/52 , H01L29/00 , H01L31/00 , H05K1/11 , H05K1/18
CPC分类号： H01L23/49838 , H01L23/50 , H01L24/48 , H01L2224/05599 , H01L2224/45099 , H01L2224/48227 , H01L2224/85399 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/30107 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： This invention relates to a layout structure for providing stable power supply to a four-layer motherboard and a main bridge chip substrate. In the invention, on the top signal layer and power path of the bottom solder layer for layout of the main bridge chip and on the power ring, the decoupling capacitors are connected in between the ground bonding pads/solder balls and the power bonding pads/solder balls of the power paths and power rings, so as to provide a stable power supply for the operation of the main bridge chip. In this invention, the ground bonding pad/solder ball connected with each power bonding pad/solder ball can be the closest ground bonding pad/solder ball to the power bonding pad/solder ball. In addition, in the embodiment of the main bridge chip substrate, decoupling capacitors can be disposed at four corners of the power ring or underneath the bonding wires, or can be packaged inside the molding compound.

10. 发明授权

US06944783B2 Power controller and associated multi-processor type supporting computer system 有权
标题翻译：电源控制器和相关的多处理器类型支持计算机系统
公开(公告)号：US06944783B2
公开(公告)日：2005-09-13
申请号：US10037896
申请日：2001-10-22
申请人： Chia-Hsing Yu , Nai-Shung Chang
发明人： Chia-Hsing Yu , Nai-Shung Chang
IPC分类号： G06F1/26
CPC分类号： G06F1/26
摘要： A power controller for a computer system capable of supporting multiple processor types. The power controller receives a voltage identification signal from the microprocessor and a microprocessor selection signal from a motherboard to provide a correct voltage specification signal and terminal voltage to the microprocessor. The invention also provides voltage specification signals and terminal voltages to the motherboard of a computer system that can support a multiple of processor types.
摘要翻译：一种能够支持多种处理器类型的计算机系统的电源控制器。功率控制器接收来自微处理器的电压识别信号和来自母板的微处理器选择信号，以向微处理器提供正确的电压指定信号和端电压。本发明还向可以支持多种处理器类型的计算机系统的主板提供电压指定信号和端电压。

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