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1. 发明申请

US20070073976A1 Low latency message passing mechanism 失效
标题翻译：低延迟消息传递机制
公开(公告)号：US20070073976A1
公开(公告)日：2007-03-29
申请号：US11236386
申请日：2005-09-26
申请人： Nagabhushan Chitlur , Linda Rankin , David Dunning , Maruti Gupta , Hongbin Liao
发明人： Nagabhushan Chitlur , Linda Rankin , David Dunning , Maruti Gupta , Hongbin Liao
IPC分类号： G06F13/28
CPC分类号： G06F12/0813 , H04L49/90
摘要： In one embodiment, a method is provided. The method of this embodiment provides detecting by a network controller a flush occurring on a host bus of a DM (“direct messaging”) packet to a memory from a first cache line associated with a first processor; obtaining and storing the DM packet at a second cache line associated with the network controller; and sending the DM packet over a network to a third cache line associated with a second processor.
摘要翻译：在一个实施例中，提供了一种方法。该实施例的方法提供了一种由网络控制器检测在与第一处理器相关联的第一高速缓存行中在DM（“直接消息”）分组的主机总线上发生的刷新到存储器的情况; 在与所述网络控制器相关联的第二高速缓存线上获取和存储所述DM分组; 以及通过网络将所述DM分组发送到与第二处理器相关联的第三高速缓存行。

2. 发明申请

US20120011276A1 Dynamically Modulating Link Width 有权
标题翻译：动态调节链路宽度
公开(公告)号：US20120011276A1
公开(公告)日：2012-01-12
申请号：US13240546
申请日：2011-09-22
申请人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
发明人： Naveen Cherukuri , Aaron T. Spink , Phanindra Mannaya , Tim Frodsham , Jeffrey R. Wilcox , Sanjay Dabral , David Dunning , Theodore Z. Schoenborn
IPC分类号： G06F15/173
CPC分类号： H04L67/141 , G06F13/4265 , H04L65/60 , Y02D10/14 , Y02D10/151
摘要： Systems and methods of managing a link provide for receiving a remote width capability during a link initialization, the remote width capability corresponding to a remote port. A link between a local port and the remote port is operated at a plurality of link widths in accordance with the remote width capability.
摘要翻译：管理链路的系统和方法提供了在链路初始化期间接收远程宽度能力，即对应于远程端口的远程宽度能力。根据远程宽度能力，本地端口和远程端口之间的链路以多个链路宽度进行操作。

3. 发明授权

US07056760B2 On chip CMOS optical element 失效
公开(公告)号：US07056760B2
公开(公告)日：2006-06-06
申请号：US10984598
申请日：2004-11-08
申请人： Ken Drottar , David Dunning
发明人： Ken Drottar , David Dunning
IPC分类号： H01L21/00
CPC分类号： H04B10/801 , H01L27/14643
摘要： CMOS optical receiver and optical transmitters are described. The optical receiver is formed from a CMOS CCD which is modified to immediately output all information indicative of incoming light, i.e., with no transfer gate. The optical transmitter is formed of a modulation window device. Both the optical transmitter and optical receiver are located on-chip with a microprocessor and form the I/O for the microprocessor. Since the modified I/O is serial, a serial to parallel converter, and parallel to serial converter are provided.

4. 发明申请

US20050262336A1 Methods and apparatuses for resetting the physical layers of two agents interconnected through a link-based interconnection 有权
标题翻译：用于重置通过基于链路的互连互联的两个代理的物理层的方法和装置
公开(公告)号：US20050262336A1
公开(公告)日：2005-11-24
申请号：US10850783
申请日：2004-05-21
申请人： Naveen Cherukuri , Sanjay Dabral , David Dunning , Tim Frodsham , Theodore Schoenborn
发明人： Naveen Cherukuri , Sanjay Dabral , David Dunning , Tim Frodsham , Theodore Schoenborn
IPC分类号： G06F15/177 , H04L29/08
CPC分类号： H04L69/32
摘要： A method for effecting an in-band reset of the physical layers of two agents interconnected through a link-based interconnection scheme. In accordance with one embodiment of the invention, a first of the two agents ceases its forwarded clock to initiate the in-band reset. Upon realization of the cessation, a second agent ceases its forwarded clock and proceeds to a reset state. The first agent then proceeds to a reset state. Subsequently, after waiting a specified period of time, both agents proceed with a re-initialization of the physical layer. In accordance with one embodiment of the invention, the re-initialization of the physical layer is effected without impacting other layers of the interconnection hierarchy.
摘要翻译：一种用于实现通过基于链路的互连方案互联的两个代理的物理层的带内复位的方法。根据本发明的一个实施例，两个代理中的第一个停止其转发的时钟以启动带内复位。在停止实现时，第二代理程序停止其转发的时钟并进入复位状态。然后第一个代理进入复位状态。随后，等待指定的时间段后，两个代理进行物理层的重新初始化。根据本发明的一个实施例，实现物理层的重新初始化而不影响互连层次结构的其他层。

5. 发明申请

US20050095004A1 On chip CMOS optical element 失效
标题翻译：片上CMOS光学元件
公开(公告)号：US20050095004A1
公开(公告)日：2005-05-05
申请号：US10984598
申请日：2004-11-08
申请人： Ken Drottar , David Dunning
发明人： Ken Drottar , David Dunning
IPC分类号： H01L27/146 , H01L27/15 , H01L29/26 , H01L31/12 , H04B10/00
CPC分类号： H04B10/801 , H01L27/14643
摘要： CMOS optical receiver and optical transmitters are described. The optical receiver is formed from a CMOS CCD which is modified to immediately output all information indicative of incoming light, i.e., with no transfer gate. The optical transmitter is formed of a modulation window device. Both the optical transmitter and optical receiver are located on-chip with a microprocessor and form the I/O for the microprocessor. Since the modified I/O is serial, a serial to parallel converter, and parallel to serial converter are provided.
摘要翻译：描述了CMOS光接收机和光发射机。光接收器由CMOS CCD形成，其被修改为立即输出指示入射光的所有信息，即没有传输门。光发射机由调制窗口装置构成。光发射机和光接收机均采用微处理器位于芯片上，形成微处理器的I / O。由于修改的I / O是串行的，因此提供串并转换器和串并转换器。

6. 发明申请

US20070280121A1 PHYSICAL LAYER LOOPBACK 有权
标题翻译：物理层回滚
公开(公告)号：US20070280121A1
公开(公告)日：2007-12-06
申请号：US11842280
申请日：2007-08-21
申请人： Theodore Schoenborn , Andrew Martwick , David Dunning
发明人： Theodore Schoenborn , Andrew Martwick , David Dunning
IPC分类号： H04L12/26
CPC分类号： G06F11/27 , G01R31/31716 , H04L43/50
摘要： In some embodiments, a chip comprises control circuitry to provide inband signals, inband output ports, and transmitters to transmit the inband signals to the inband output ports. The control circuitry selectively includes loopback initiating commands in the inband signals. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，芯片包括控制电路，以提供带内信号，带内输出端口和发射器，以将带内信号传输到带内输出端口。控制电路选择性地包括带内信号中的回送启动命令。描述和要求保护其他实施例。

7. 发明申请

US20070115831A1 Method and apparatus for meeting compliance for debugging and testing a multi-speed, point-to-point link 失效
标题翻译：满足多速度点对点链路调试和测试的依从性的方法和装置
公开(公告)号：US20070115831A1
公开(公告)日：2007-05-24
申请号：US11283303
申请日：2005-11-18
申请人： Debendra Sharma , Ajay Bhatt , David Dunning
发明人： Debendra Sharma , Ajay Bhatt , David Dunning
IPC分类号： H04L12/26
CPC分类号： H04L43/50
摘要： A method and apparatus for meeting compliance for debugging and testing a multi-speed, point-to-point link. In one embodiment, the method includes the selection of a compliance speed for a point-to-point link from at least two link frequencies supported by the point-to-point link. Once the compliance speed is selected for the point-to-point link, the point-to-point link is caused to enter a compliance testing mode. During compliance testing mode, a controller of the point-to-point link sets a compliance speed of the point-to-point link to the selected compliance speed. Once a compliance speed is set, a transmitter of the point-to-point link transmits a compliance pattern at the selected compliance speed. In one embodiment, the transmission of the compliance pattern at the selected compliance speed is used to generate a worst case eye diagram to determine compliance of the point-to-point link to a link specification. Other embodiments are described and claimed.
摘要翻译：一种用于满足调试和测试多速点对点链路的符合性的方法和装置。在一个实施例中，该方法包括从点对点链路所支持的至少两个链路频率中选择点对点链路的遵从速度。一旦为点对点链路选择了合规性速度，点对点链路便进入合规性测试模式。在合规测试模式期间，点对点链路的控制器将点对点链路的合规速度设置为所选择的合规速度。一旦达到合规速度，点对点链路的发射机就以所选择的合规速度传输合规模式。在一个实施例中，以所选择的合规速度传输合规性模式用于生成最坏情况的眼图，以确定点对点链路对链路规范的顺从性。描述和要求保护其他实施例。

8. 发明申请

US20060020861A1 Method, system, and apparatus for loopback entry and exit 有权
标题翻译：用于环回进入和退出的方法，系统和设备
公开(公告)号：US20060020861A1
公开(公告)日：2006-01-26
申请号：US10897596
申请日：2004-07-23
申请人： Tim Frodsham , Naveen Cherukuri , Sanjay Dabral , David Dunning , Theodore Schoenborn , Lakshminarayan Krishnamurty
发明人： Tim Frodsham , Naveen Cherukuri , Sanjay Dabral , David Dunning , Theodore Schoenborn , Lakshminarayan Krishnamurty
IPC分类号： G01R31/28
CPC分类号： G01R31/31716
摘要： A loopback test to test a communication link for a layered interface where in a master agent programs the electrical parameters for the slave agent, such as, the offset, timing, and current compensation with a loopback control register. The slave and master agent to support an entry into the loopback test based on detection of a header within a packet. The slave and master agent to support exit out of the loopback test based on whether the loop count is finite.
摘要翻译：用于测试分层接口的通信链路的环回测试，其中主代理程序使用环回控制寄存器编程用于从属代理的电参数，例如偏移，定时和电流补偿。从属和主代理支持根据检测到报文头中的报文进入环回测试。根据循环计数是否有限，从站和主代理程序支持退出环回测试。

9. 发明申请

US20060020843A1 Technique to create link determinism 有权
标题翻译：技术创造链接决定论
公开(公告)号：US20060020843A1
公开(公告)日：2006-01-26
申请号：US10897225
申请日：2004-07-21
申请人： Tim Frodsham , Michael Tripp , David O'Brien , Muraleedhara Navada , Naveen Cherukuri , Sanjay Dabral , David Dunning , Theodore Schoenborn
发明人： Tim Frodsham , Michael Tripp , David O'Brien , Muraleedhara Navada , Naveen Cherukuri , Sanjay Dabral , David Dunning , Theodore Schoenborn
IPC分类号： G06F5/00 , G06F13/36 , G06F1/12 , G06F1/04
CPC分类号： G06F13/4273 , G06F5/06
摘要： A technique for promoting determinism among bus agents within a point-to-point (PtP) network. More particularly, embodiments of the invention relate to techniques to compensate for link latency, data skew, and clock shift within a PtP network of common system interface (CSI) bus agents.
摘要翻译：一种促进点对点（PtP）网络中总线代理之间确定性的技术。更具体地，本发明的实施例涉及补偿公共系统接口（CSI）总线代理的PtP网络内的链路延迟，数据偏移和时钟偏移的技术。

10. 发明申请

US20060005092A1 Cache based physical layer self test 有权
标题翻译：基于缓存的物理层自检
公开(公告)号：US20060005092A1
公开(公告)日：2006-01-05
申请号：US10882966
申请日：2004-06-30
申请人： Tim Frodsham , Lakshminarayan Krishnamurty , Naveen Cherukuri , Sanjay Dabral , David Dunning , Theodore Schoenborn
发明人： Tim Frodsham , Lakshminarayan Krishnamurty , Naveen Cherukuri , Sanjay Dabral , David Dunning , Theodore Schoenborn
IPC分类号： G01R31/28
CPC分类号： G06F11/27
摘要： A software self test engine is executed from a cache of a processor. The software self test engine is executed using an execution engine of the processor to perform a physical layer self test. The physical layer self test is performed by transmitting a test vector from the execution engine under control of the self test engine to an input/output (“I/O”) unit of the processor along a datapath coupling the execution engine to the I/O unit. The test vector is transmitted along a loop back path including the I/O unit and the datapath to test a hardware device along the loop back path.
摘要翻译：从处理器的缓存执行软件自检引擎。使用处理器的执行引擎执行软件自检引擎，以执行物理层自检。通过在自检引擎的控制下将来自执行引擎的测试向量发送到处理器的输入/输出（“I / O”）单元，沿着将执行引擎耦合到I / O的数据通路执行物理层自检， O单位。测试向量沿着包括I / O单元和数据通路的环回路径传输，以沿着循环路径测试硬件设备。

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