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1. 发明申请

US20160172451A1 SEMICONDUCTOR ARRANGEMENT 审中-公开
标题翻译：半导体安排
公开(公告)号：US20160172451A1
公开(公告)日：2016-06-16
申请号：US14879394
申请日：2015-10-09
申请人： NXP B.V.
发明人： Thomas Igel-Holtzendorff , Reza Behtash , Tim Boettcher
IPC分类号： H01L29/40 , H01L21/02 , H01L21/3105 , H01L21/321
CPC分类号： H01L29/407 , H01L21/02255 , H01L21/02271 , H01L21/28017 , H01L21/31051 , H01L21/32115 , H01L29/401 , H01L29/4236 , H01L29/7813 , H01L29/861
摘要： A semiconductor arrangement comprising a substrate having a first trench formed therein, a field plate layer arranged to extend within the first trench and coat the first trench, the field plate layer having a thickness such that it defines a second trench within the first trench, a barrier layer arranged to coat an internal surface of the second trench; and a trench fill material configured to substantially planarize the first and second trenches.
摘要翻译：一种半导体装置，包括其中形成有第一沟槽的衬底，场板层布置成在第一沟槽内延伸并涂覆第一沟槽，场板层具有使得其在第一沟槽内限定第二沟槽的厚度，阻挡层，布置成涂覆第二沟槽的内表面; 以及沟槽填充材料，其构造成基本上平坦化所述第一和第二沟槽。

2. 发明授权

US09911816B2 Semiconductive device and associated method of manufacture 有权
公开(公告)号：US09911816B2
公开(公告)日：2018-03-06
申请号：US14693756
申请日：2015-04-22
申请人： NXP B.V.
发明人： Tim Boettcher , Reza Behtash , Thomas Igel-Holtzendorff , Linpei Zhu
IPC分类号： H01L29/40 , H01L29/06 , H01L21/67 , H01L29/66 , H01L29/872
CPC分类号： H01L29/404 , H01L21/67069 , H01L29/063 , H01L29/0696 , H01L29/407 , H01L29/66143 , H01L29/8725
摘要： A semiconductive device comprising a body having: a first surface and an opposing second surface; a first semiconductive layer adjacent to the first surface; an active region comprising: a plurality of active trenches in the first surface, extending from the first surface into the first semiconductive layer, and having an active trench width, and a plurality of active cells; and a termination region at a periphery of the first surface comprising: at least one termination trench extending from the first surface into the first semiconductive layer, wherein the termination region has a width that is greater than the active trench width; and a number of termination trench separators having a width that is less than a width of the active cells, wherein the active trenches and the at least one termination trench each comprise a first insulator layer adjacent to the first semiconductive layer of the body.

3. 发明申请

US20150333133A1 SEMICONDUCTIVE DEVICE AND ASSOCIATED METHOD OF MANUFACTURE 有权
标题翻译：半导体器件及相关制造方法
公开(公告)号：US20150333133A1
公开(公告)日：2015-11-19
申请号：US14693756
申请日：2015-04-22
申请人： NXP B.V.
发明人： Tim Boettcher , Reza Behtash , Thomas Igel-Holtzendorff , Linpei Zhu
IPC分类号： H01L29/40 , H01L21/67 , H01L29/06
CPC分类号： H01L29/404 , H01L21/67069 , H01L29/063 , H01L29/0696 , H01L29/407 , H01L29/66143 , H01L29/8725
摘要： The disclosure relates to a semiconductive device comprising a body having: a first surface and an opposing second surface; a first semiconductive layer adjacent to the first surface; an active region comprising: a plurality of active trenches in the first surface, the plurality of active trenches extending from the first surface into the first semiconductive layer and having an active trench width, and a plurality of active cells, each active cell provided in the first semiconductive layer adjacent to an active trench, the active cells having an active cell width; and a termination region at a periphery of the first surface comprising: at least one termination trench, the at least one termination trench extending from the first surface into the first semiconductive layer, wherein the termination region has a width that is greater than the active trench width; and a number of termination trench separators having a width that is less than the active cell width, wherein the active trenches and the at least one termination trench each comprise a first insulator layer adjacent to the first semiconductive layer of the body, and wherein conductive material is disposed on the first insulating layer within each of the active trenches.
摘要翻译：本发明涉及一种半导体装置，其包括主体，其具有：第一表面和相对的第二表面; 与所述第一表面相邻的第一半导体层; 有源区域包括：在第一表面中的多个有源沟槽，多个有源沟槽从第一表面延伸到第一半导体层并具有有源沟槽宽度，以及多个活性单元，每个活性单元设置在与活性沟槽相邻的第一半导体层，所述活性单元具有活性单元宽度; 以及在所述第一表面的周边处的端接区域，包括：至少一个端接沟槽，所述至少一个端接沟槽从所述第一表面延伸到所述第一半导体层，其中所述端接区域的宽度大于所述有源沟槽宽度; 以及多个端接沟槽隔离器，其宽度小于有源单元宽度，其中有源沟槽和至少一个端接沟槽各自包括与本体的第一半导体层相邻的第一绝缘体层，并且其中导电材料设置在每个有源沟槽内的第一绝缘层上。

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