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1. 发明公开

EP4447224A1 ANTENNA PACKAGE 审中-公开
公开(公告)号：EP4447224A1
公开(公告)日：2024-10-16
申请号：EP23167315.3
申请日：2023-04-11
申请人： NXP B.V.
发明人： Acar, Mustafa , Gong, Zhiwei , Wenzel, Robert Joseph , Zhou, Tingdong
IPC分类号： H01Q1/22 , H01Q1/52 , H01Q9/04 , H01Q21/06
CPC分类号： H01Q1/2283 , H01Q1/523 , H01Q9/0414 , H01Q21/065
摘要： An antenna package and method of manufacturing an antenna package is disclosed. The antenna package includes a first substrate and second substrate in a stacked arrangement. A first plurality of patch antennas and a plurality of decoupling capacitors is arranged on a first major surface of the first substrate. One or more decoupling capacitor of the plurality of decoupling capacitors is located between adjacent patch antennas of the first plurality of patch antennas. The second substrate includes a second plurality of patch antennas. One or more decoupling capacitors of the plurality of decoupling capacitors includes a first terminal configured to be in contact with the first substrate and a second terminal configured to be in contact with the first substrate and the second substrate.

2. 发明公开

EP4287514A1 BEAMFORMER AND METHOD OF OPERATION OF A BEAMFORMER FOR MIMO ANTENNA SYSTEM 审中-实审
公开(公告)号：EP4287514A1
公开(公告)日：2023-12-06
申请号：EP22176157.0
申请日：2022-05-30
申请人： NXP B.V.
发明人： Mattheijssen, Paul , Acar, Mustafa , De Maaijer, Lucas Maria Florentinus
IPC分类号： H04B1/04 , H04B7/06
摘要： A beamformer device for a multiple-input, multiple-output (MIMO) antenna system and method of operating a beamformer device is described. the beamformer device includes a number of beamformer channels. Each beamformer channel includes a RF terminal, an antenna connection terminal ; and a power detector having a power detector output, The beamformer device includes a digital control interface comprising a serial data input and a serial data output; a control input coupled to the serial data input; and a beamformer monitor output configured to be selectively coupled to either the serial data output or the power detector output of one of the beamformer channels.

3. 发明公开

EP2667409A1 Amplifier circuit with a low inductance bond wire arrangement 审中-公开
标题翻译：维修工程师
公开(公告)号：EP2667409A1
公开(公告)日：2013-11-27
申请号：EP12168696.8
申请日：2012-05-21
申请人： NXP B.V.
发明人： Van der Heijden, Mark , Acar, Mustafa , Apostolidou, Melina , De Langen, Michel
IPC分类号： H01L23/66
CPC分类号： H01L24/49 , H01L24/48 , H01L2223/6611 , H01L2224/45014 , H01L2224/45015 , H01L2224/48091 , H01L2224/48137 , H01L2224/49052 , H01L2224/49096 , H01L2224/49097 , H01L2224/49174 , H01L2224/49175 , H01L2224/49176 , H01L2924/00014 , H01L2924/2065 , H01L2924/20752 , H01L2924/30107 , H01L2924/30111 , H01L2924/00 , H01L2924/2076 , H01L2224/45099 , H01L2224/05599
摘要： An amplifier circuit is disclosed. The amplifier circuit comprises an amplifier IC (22); a control IC (24); a signal connections connected between the amplifier IC (22) and the control IC (24), the signal connections (44, 54) being adapted to communicate control signals between the control IC (24) and the amplifier IC (22); and a reference connections (42, 52) connected between the amplifier IC (22) and the control IC (24), the reference connections (42, 52) being adapted to communicate a reference voltage between the amplifier IC (22) and the control IC (24). The reference connections (42, 52) are substantially parallel to the signal connections (44 , 52). Both the reference connections (42, 52) and the signal connections (44, 54) are comprised of either wire or ribbon bonds.
摘要翻译：公开了放大器电路。放大器电路包括放大器IC（22）; 控制IC（24）; 连接在放大器IC（22）和控制IC（24）之间的信号连接，信号连接（44,54）适于在控制IC（24）和放大器IC（22）之间传送控制信号; 以及连接在所述放大器IC（22）和所述控制IC（24）之间的参考连接（42,52），所述参考连接（42,52）适于在所述放大器IC（22）和所述控制IC IC（24）。参考连接（42,42）基本上平行于信号连接（44,45）。参考连接（42,42）和信号连接（44,54）都由线或带状结合组成。

4. 发明公开

EP2251974A1 Quad LINC transmitter comprising switchable Chireix amplifiers 审中-公开
标题翻译：四线LINC发信人schaltbaren Chireix-Verstärkern
公开(公告)号：EP2251974A1
公开(公告)日：2010-11-17
申请号：EP09160364.7
申请日：2009-05-15
申请人： NXP B.V.
发明人： Vromans, Jan Sophia , van der Heijden, Mark Pieter , Acar, Mustafa
IPC分类号： H03F1/02 , H03F3/72
CPC分类号： H03F1/0294 , H03F3/72 , H03F2200/336
摘要： A quad LINC transmitter (200) comprises an in-phase branch (202) and a quadrature phase branch (204) which are interconnected by a separator unit (210), a complex mixer unit (218) and an output signal combining network. The in-phase branch comprises a first Chireix compensation circuit (A1,A2), a second Chireix compensation circuit (A3,A4) and switches (226). The quadrature phase branch comprises a third Chireix compensation circuit (B1,B2), a fourth Chireix compensation circuit (B3,B4) and switches (226). A quadrature input signal (206,208) is converted by the separator unit (210) and the complex mixer unit (218) into two constant envelope in-phase signals (I 1 ,I 2 ) and two constant envelope quadrature phase signals (Q 1 ,Q 2 ). The separator unit (210) outputs furthermore first and second phase signals (sign(I), sign(Q)) controlling the respective switches (226). Depending on the first phase signal (sign(I)), the two constant envelope in-phase signals (I 1 ,I 2 ) are steered through the switches (226) to either the first Chireix compensation circuit (A1,A2) or the second Chireix compensation circuit (A3,A4). Also in the quadrature branch, depending on the second phase signal (sign(Q)), the two constant envelope quadrature phase signals (Q 1 ,Q 2 ) are steered through the switches (226) to either the third Chireix compensation circuit (B1,B2) or the fourth Chireix compensation circuit (B3,B4).
摘要翻译：四线LINC发射机（200）包括通过分离器单元（210），复合混合器单元（218）和输出信号组合网络互连的同相分支（202）和正交相位分支（204）。同相分支包括第一Chireix补偿电路（A1，A2），第二Chireix补偿电路（A3，A4）和开关（226）。正交相分支包括第三Chireix补偿电路（B1，B2），第四Chireix补偿电路（B3，B4）和开关（226）。正交输入信号（206,208）由分离器单元（210）和复合混频器单元（218）转换成两个恒定包络同相信号（I 1，I 2）和两个恒定包络正交相位信号（Q 1， Q 2）。分离器单元（210）还输出控制各个开关（226）的第一和第二相位信号（符号（I），符号（Q））。根据第一相位信号（符号（I）），将两个恒定包络同相信号（I 1，I 2）通过开关（226）转向到第一Chireix补偿电路（A1，A2）或第二个Chireix补偿电路（A3，A4）。同样在正交分支中，根据第二相位信号（sign（Q）），两个恒包络正交相位信号（Q 1，Q 2）通过开关（226）转向到第三Chireix补偿电路（B1 ，B2）或第四Chireix补偿电路（B3，B4）。

5. 发明公开

EP4344061A1 WILKINSON SPLITTER WITH ADDED VARIABLE ATTENUATION AND SWITCHING CAPABILITY 审中-公开
公开(公告)号：EP4344061A1
公开(公告)日：2024-03-27
申请号：EP22196946.2
申请日：2022-09-21
申请人： NXP B.V.
发明人： Yang, Xin , Acar, Mustafa , Chen, Zhe , Leenaerts, Dominicus Martinus Wilhelmus
IPC分类号： H03H7/25 , H03H7/48 , H01P1/22 , H01P5/16 , H01Q3/28
摘要： A variable, switchable Wilkinson branching circuit comprising: a common terminal (701), first terminal (702) and second terminal (703), wherein the common terminal is coupled to a first (704) and second circuit branch (706) at a branch node(705); wherein the first/second circuit branches include a respective first/second quarter wavelength transmission line (707,708) having a first end coupled to the branch node and a second end respectively coupled to the first/second terminal; wherein the first and second terminals are coupled together via a branch-interconnection arrangement; wherein the circuit comprises: a first switched arrangement (713) comprising a first switch (714) having a first and second switch-terminal, wherein the first switch-terminal is coupled to the common terminal, and wherein a first resistor (715) and a first capacitor (716) are arranged in parallel and coupled between the second switch-terminal and a reference terminal; and a second switched arrangement (723) coupled to the first terminal, wherein the first quarter wavelength transmission line is coupled between the first and second switched arrangements.

6. 发明授权

EP2388912B1 Power control of reconfigurable outphasing Chireix amplifiers and methods 失效转让
标题翻译：可重构的异相，希莱克斯放大器和方法的功率控制
公开(公告)号：EP2388912B1
公开(公告)日：2013-11-20
申请号：EP11164673.3
申请日：2011-05-03
申请人： NXP B.V.
发明人： Van der Heijden, Mark Pieter , Acar, Mustafa , Vromans, Jan Sophia , Apostolidou, Melina
IPC分类号： H03F1/02
CPC分类号： H03F1/0294
摘要： Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L 1 C 1 , L 2 C 2 ), a broadband combiner having Chireix compensation elements, and an impedance matching filter. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described. In some embodiments, a variable supply voltage may power the transistor circuitry based on the desired output power of the Chireix power amplifier. In some embodiments, the variable supply voltage may depend upon an out-phasing angle between the two drivers in the transistor circuitry.

7. 发明公开

EP2618481A1 Power amplifier circuit and control method 审中-公开
标题翻译： Leistungsverstärkerschaltungund Steuerverfahren
公开(公告)号：EP2618481A1
公开(公告)日：2013-07-24
申请号：EP12151787.4
申请日：2012-01-19
申请人： NXP B.V.
发明人： Acar, Mustafa , Van Der Heijden, Mark
IPC分类号： H03F1/22 , H03F3/217
CPC分类号： H03F3/2171 , H03F1/223 , H03F2200/108
摘要： A power amplifier circuit uses an output transistor (10) and a transistor (30'). First and second drive circuits apply gate control signals to the two transistors, which rise and fall in synchronism, and this is such that the voltage drop across the transistor (30') is reduced if compared to a constant gate voltage being applied to the output transistor (10).
摘要翻译：功率放大器电路使用输出晶体管（10）和晶体管（30'）。第一和第二驱动电路将栅极控制信号施加到同步上升和下降的两个晶体管，这是因为与施加到输出端的恒定栅极电压相比，晶体管（30'）两端的电压降降低晶体管（10）。

8. 发明公开

EP2388912A1 Power control of reconfigurable outphasing Chireix amplifiers and methods 失效转让
标题翻译： Leistungssteuerung von rekonfigurierbaren Outphasing-Chireix-Verstärkernund Verfahren
公开(公告)号：EP2388912A1
公开(公告)日：2011-11-23
申请号：EP11164673.3
申请日：2011-05-03
申请人： NXP B.V.
发明人： Van der Heijden, Mark Pieter , Acar, Mustafa , Vromans, Jan Sophia , Apostolidou, Melina
IPC分类号： H03F1/02
CPC分类号： H03F1/0294
摘要： Various embodiments relate to a reconfigurable integrated digital Chireix out-phasing power amplifier for use in high power base stations is described and a related method of said design. The power amplifier may include a power transistor circuitry having plurality of power transistors and shunt-series circuitry (L 1 C 1 , L 2 C 2 ), a broadband combiner having Chireix compensation elements, and an impedance matching filter. In one embodiment, the power amplifier is implemented in a real switch-mode to facilitate integration of the Chireix compensation elements so as to make the Chireix power amplifier tunable. A method of driving Chireix power amplifier structure is also described. In some embodiments, a variable supply voltage may power the transistor circuitry based on the desired output power of the Chireix power amplifier. In some embodiments, the variable supply voltage may depend upon an out-phasing angle between the two drivers in the transistor circuitry.
摘要翻译：描述了用于高功率基站的可重新配置的集成数字Chireix输出相位功率放大器的各种实施例以及所述设计的相关方法。功率放大器可以包括具有多个功率晶体管和分流电路（L 1 C 1，L 2 C 2）的功率晶体管电路，具有Chireix补偿元件的宽带组合器和阻抗匹配滤波器。在一个实施例中，功率放大器以实际开关模式实现，以便于Chireix补偿元件的集成，从而使Chireix功率放大器可调谐。还描述了驱动Chireix功率放大器结构的方法。在一些实施例中，可变电源电压可以基于Chireix功率放大器的期望输出功率为晶体管电路供电。在一些实施例中，可变电源电压可以取决于晶体管电路中的两个驱动器之间的相位相位角。

9. 发明公开

EP4344060A1 DIGITAL, INDUCTIVE STEP ATTENUATOR WITH CAPACITIVE PHASE-GAIN COMPENSATION AND INCORPORATION INTO QUARTER-WAVE TX / RX SWITCH 审中-公开
公开(公告)号：EP4344060A1
公开(公告)日：2024-03-27
申请号：EP22196939.7
申请日：2022-09-21
申请人： NXP B.V.
发明人： Yang, Xin , Acar, Mustafa , Chen, Zhe , Leenaerts, Dominicus Martinus Wilhelmus
IPC分类号： H03H7/25 , H03H7/46 , H01P1/22 , H04B1/44
摘要： An attenuator circuit (100) comprising: a digital attenuator part (101) comprising: a first (102) and second attenuator terminal (103); a first inductor (104) having a first terminal coupled to the first attenuator terminal and a second terminal coupled to the second attenuator terminal; a first switched arrangement comprising a first switch (110) having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the first terminal of the first inductor, and a first resistor (111) and a first capacitor (112) are arranged in parallel, coupled between the second switch-terminal and a reference voltage; and a second switched arrangement comprising a second switch (114) having a first switch-terminal and a second switch-terminal, wherein the first switch-terminal is coupled to the second terminal of the first inductor, and wherein a second resistor (115) and a second capacitor (116) are arranged in parallel and coupled between the second switch-terminal and the reference voltage. The first and second capacitors are for compensation different capacitive load due to switching on and off of first and second switches to thereby reduce gain-phase variations in different attenuation states.

10. 发明公开

EP4293817A1 RF PACKAGE AND METHOD OF MANUFACTURE OF AN RF PACKAGE 审中-公开
公开(公告)号：EP4293817A1
公开(公告)日：2023-12-20
申请号：EP22178737.7
申请日：2022-06-13
申请人： NXP B.V.
发明人： Acar, Mustafa , Mattheijssen, Paul , Freidl, Philipp Franz , Mandamparambil, Rajesh , Bergman, Jan Willem , Kamphuis, Antonius Hendrikus Jozef
IPC分类号： H01Q1/22 , H01L23/48 , H05K1/02 , H01Q21/06 , H01Q21/24
摘要： An RF package assembly includes a stacked package-on-package arrangement of a first substrate and a second substrate. Each of the first and second substrates include RF signal pads and ground pads. An interface region between the stacked substrates couples the RF signal pads and ground pads of the first substrate to corresponding pads of the second substrate. The interface region includes galvanic connection regions providing a galvanic connection between the each of the first substrate ground pads and each of the corresponding second substrate ground pads. The interface region includes dielectric regions between each of the first substrate RF signal pads and the corresponding second substrate RF signal pads so that RF signals transmitted between the two substrates are capacitively coupled.

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