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1. 发明专利

JPS56123191A INTERRPROCESSOR COMMUNICATION CONTROL SYSTEM 失效
公开(公告)号：JPS56123191A
公开(公告)日：1981-09-28
申请号：JP2709880
申请日：1980-03-04
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： NAKADA TATSUO , OZEKI HIRONAO , KAWASAKI TAKESHI , SUYAMA MASATO , MUNEKATA HIDENAO , KOIZUMI TADASHI , KUSABA AKIRA
IPC分类号： H04Q3/545
摘要： PURPOSE:To prevent the delay of call processing in a decentralized control type electronic switching system, by providing each processor with a means of distributing communication information to an information transfer device for transfer between in-use and stand-by processors. CONSTITUTION:Each processor has a communication mode flag controllable by itself and another processor and, according to this information, distributes communication information to information transfer devices (IPC) 3-0 and 3-1 for transfer between in-use and stand-by processors. In normal call processing, the communication mode flag of each processor is set in normal mode and those pieces of call processing information are transmitted via in-use IPC3-0. In case of communication for a great amount of information except the call processing information, stand-by IPC3-1 performs the communication for the information except the call processing one and at the same time, in-use IPC3-0 performs that for the call processing information, thereby preventing the delay of the call processing.

2. 发明专利

JPS56123050A FILE REPLACING SYSTEM 失效
公开(公告)号：JPS56123050A
公开(公告)日：1981-09-26
申请号：JP2531380
申请日：1980-03-03
申请人： HITACHI LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , FUJITSU LTD
发明人： SHINPO ISAO , GENPEI SOUICHIROU , ARIHARA SHIYUNICHI , TACHIMORI MICHI , NAKADA TATSUO
IPC分类号： G06F11/16 , G06F15/16 , G06F15/177
摘要： PURPOSE:To replace files without the interrupt of the processing, by constituting the file replacement processing system independent of the essential processing system with a part of plural processors, in the information processing system constituted with plural processors. CONSTITUTION:The channel adapter of the processor to be disconnected from the processing system is operated to disconnect network processor 3n+1 in stand-by channel sub-unit 1n+1 and control processor 101. Next, a new file is written-in network processor 3n+1 and the memory of control processor 101 from I/O device 130 through stand-by communication device 101 out of duplex communication devices 110 and 120, and the new file is operated, thereby constituting the testing processing system independently of the essential processing system. Consequently, the essential processing system does not interrupt the processing even for replacement of a new file, and normalcy of the new file is checked by the new constituted testing processing system.

3. 发明专利

JPS5553721A COMMUNICATION SYSTEM BETWEEN INFORMATION PROCESSORS 失效
公开(公告)号：JPS5553721A
公开(公告)日：1980-04-19
申请号：JP12747478
申请日：1978-10-17
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： YAZAWA KATSUHIKO , ITOU YOSHITAKA , YAJIMA TOSHIO , SUZUKI MASAHIKO , TOKUNAGA KAORU , NAKADA TATSUO
IPC分类号： G06F13/00 , G06F3/00 , G06F13/38 , G06F15/10 , G06F15/16 , G06F15/167 , G06F15/173
摘要： PURPOSE:To secure the economical, efficient and quick transfer of the information between processor by using separately the main memory and the communication memory based on the command given from the controlling processor. CONSTITUTION:Control information 50 (comprising control order ODR and data DATA) sent from processor CPO is set to buffer register BR os processor NPO via common bus BS, and the DATA part within BR is written directly into main memory NMM of NPO via control circuit CTL and memory control circuit DMA. Then the ODR within BR is decoded by CTL to find out the DATA writing to writing queue WQ, and thus CTL gives writing command l21 to WQ to write DATA into WQ via connection line l22. In the same way, the information can be sent back to CPO from NPO, and the information transfer is possible between CP and NP via WQ and RQ via the hardware in addition to the system to give the direct access to NMM. As a result, the information transfer can be accelerated between CP and NP, and at the same time the transfer efficiency can be increased since the control is possible for the transfer sequence via WQ and RQ.

4. 发明专利

JPS5537082A FAULT PROCESS SYSTEM 失效
公开(公告)号：JPS5537082A
公开(公告)日：1980-03-14
申请号：JP11054478
申请日：1978-09-08
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： INOUE AKIRA , NAKADA TATSUO , NISHIGAWARA KENJI
IPC分类号： H04M3/22 , H04M3/08 , H04Q3/54
摘要： PURPOSE:To omit the synchronous processor and to enable swithcing of the devices by carrying out the regeneration and restoration process of the state at the switching time of the channel system devices when the fault process is carried out. CONSTITUTION:The process system is formed by installing the channel device state regeneration means comprising trunk memory 102, call process control information 103 and regeneration pattern converter 104 to the trunk, several units of channel terminal device 1, stand-by channel system device 2 and central processor CPU3 of the program control electronic exchange system containing the switching function to device 2 when the fault occurs at device 1. CPU3 discontinues the call process action when receiving the fault information from device 1 and gives the initial setting to device 2 to secure the correspondence to the circuit stored in device 1, and then regenerates the call process information via the channel system device regeneration means and based on only the call information to be controlled at CPU3. In such way, the regenerated state is restored to channel device 21, trunk 22 and terminal processor 23 by the channel system order via signal reception distributor 25 and transmission/reception buffer 24. As a result, the process system can be simplified, at the same time shortening the switching time.

5. 发明专利

JPS5537081A EXCHANGE CONTROL SYSTEM 失效
公开(公告)号：JPS5537081A
公开(公告)日：1980-03-14
申请号：JP11054378
申请日：1978-09-08
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE
发明人： KOBAYASHI TAKASHI , NAKADA TATSUO , USHIDA FUMIAKI
IPC分类号： H04Q3/54 , G06F9/52 , G06F15/16 , G06F15/177 , H04Q3/545
摘要： PURPOSE:To prevent the erroneous process without lowering the processing capacity of the main processor by securing the synchronization with every process block for the synchronous control between the main and secondary processors. CONSTITUTION:The control system comprises several units of secondary processor 5 which give the control to channel system device 6 including the exchange terminal and main processor 1 which controls these secondary processors. The control information for the exchange terminal is transmitted from processor 1 to processor 5 with every process block to give the announcement of the operation result every process block. Then the synchronous process becomes possible with every block between the main and secondary processors by confirming the result of every process block to be sent back. In such way, the synchronization is not required with every control information, and furthermore the integrated control can be given to the call station between processors 1 and 5 without lowering the processing capacity of processor 1, thus causing no erroneous process.

6. 发明专利

JPH09218742A COORDINATE INPUT DISPLAY PROCESSOR 失效
公开(公告)号：JPH09218742A
公开(公告)日：1997-08-19
申请号：JP2428296
申请日：1996-02-09
申请人： HITACHI LTD
发明人： ITO RYUICHI , SUGANUMA YUJI , SATO MAKOTO , NAKADA TATSUO
IPC分类号： G06F3/041 , G06F3/03 , G06F3/033
摘要： PROBLEM TO BE SOLVED: To provide a pen-type coordinate input device which can easily input a minute coordinate such as lithography in the same way as a pen operation with a small space and which is superior in portability and to provide an information processor which faces to it. SOLUTION: The pen-type coordinate input device 1 which is provided with a pen tip position output part 5 outputting position information on a pen tip 2 and a pressure detection part 3 detecting that the pen tip 2 touches an arbitrary face and which emits position information of the pen tip from the pen tip position output part 5 when the pen tip 2 touches the arbitrary face, and the information processor 13 provided with an operation part 15 receiving emitted position information of the pen tip 2 in a reception part, opening the track of the pen tip 2 and making the actual track of the pen tip 2 correspond to a position on a display screen 20a and with a display part 20 displaying data on the display screen in accordance with an output signal from the operation part 15 are provided. The information processor 13 displays the track until the pen tip 2 is detached from when it is brought into contact with the arbitrary face.

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