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    • 1. 发明申请
    • EQUALIZING FILTER CIRCUIT
    • 均衡滤波器电路
    • WO2006028288B1
    • 2006-05-04
    • PCT/JP2005017077
    • 2005-09-09
    • NEC CORPWADA SHIGEKISUZUKI YASUYUKI
    • WADA SHIGEKISUZUKI YASUYUKI
    • H03H15/00H04B3/04
    • H04B3/142
    • An equalizing filter circuit comprising an input terminal (101); an output terminal (102); multistage delay elements (104) connected to the input terminal (101); and a plurality of weighting circuits (105) branching from the multiple delay elements; wherein output signals from the weighting circuits (105) are combined. The equalizing filter circuit is arranged such that the gain adjustment of the weighting circuits that decides the coefficient of the equalizing filter circuit can be set independently of a load connected to the output terminal, thereby increasing the amount of waveform distortion compensation. For this purpose, an impedance converting circuit (108) is connected between at least one of the weighting circuits (105) and the output terminal (102).
    • 一种均衡滤波器电路,包括一个输入端(101); 一个输出端(102); 连接到输入端子(101)的多级延迟元件(104); 以及多个从多个延迟元件分支的加权电路(105) 其中来自加权电路(105)的输出信号被组合。 均衡滤波器电路被设置为使得可以独立于连接到输出端子的负载来设置决定均衡滤波器电路的系数的加权电路的增益调整,从而增加波形失真补偿量。 为此,阻抗转换电路(108)连接在至少一个加权电路(105)和输出端子(102)之间。