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    • 2. 发明申请
    • METHODS FOR FORMING PATTERNED STRUCTURES
    • 形成图案化结构的方法
    • WO2008022097A3
    • 2008-07-03
    • PCT/US2007075856
    • 2007-08-14
    • API NANOFABRICATION AND RES CODENG XUEDONGWANG JIAN JIMCHEN LEINIKOLOV ANGUEL NO'BRIEN NADALIU XIAOMING
    • DENG XUEDONGWANG JIAN JIMCHEN LEINIKOLOV ANGUEL NO'BRIEN NADALIU XIAOMING
    • H01L21/3205H01L21/4763
    • G02B5/1857
    • In general, in a first aspect, the invention features a method that includes forming a first layer comprising a first material over a surface of a second layer, wherein forming the first layer includes sequentially forming a plurality of monolayers of the second material over the surface of the second layer, the second layer comprises a plurality of rows of a second material extending along a first direction and spaced from one another in a second direction orthogonal to the first direction, and the first layer conforms to the surface of the second layer. The method further includes removing portions of the first layer to produce a plurality of rows of the first material extending along the first direction and spaced from one another in the second direction and removing portions of a third layer comprising a third material, where the portions correspond to intervals between the second plurality of rows so that removing the portions forms a plurality of rows of the third material extending along the first direction and spaced apart from one another. The first and second materials are different.
    • 通常,在第一方面,本发明的特征在于一种方法,该方法包括在第二层的表面上方形成包含第一材料的第一层,其中形成第一层包括在表面上顺序地形成多个单层的第二材料 第二层包括沿第一方向延伸且在与第一方向正交的第二方向上彼此间隔开的多行第二材料,并且第一层符合第二层的表面。 该方法进一步包括去除第一层的多个部分以产生沿着第一方向延伸且在第二方向上彼此间隔开的多行第一材料并且去除包括第三材料的第三层的部分,其中这些部分对应于 到第二多个行之间的间隔,使得去除这些部分形成沿着第一方向延伸并且彼此间隔开的多行第三材料。 第一种和第二种材料是不同的。
    • 10. 发明申请
    • APPARATUS, METHOD AND COMPUTER-READABLE MEDIUM FOR TESTING A PANEL OF INTERFEROMETRIC MODULATORS
    • 用于测试干涉仪调制器面板的装置,方法和计算机可读介质
    • WO2010008759A3
    • 2011-03-24
    • PCT/US2009047847
    • 2009-06-18
    • QUALCOMM MEMS TECHNOLOGIES INCNACHMAN RAMEZCHEN LEIYU TAO
    • NACHMAN RAMEZCHEN LEIYU TAO
    • B81C1/00
    • G02B26/001B81C99/0045G01R31/302
    • In some embodiments, each interferometric modulator has a stiction threshold voltage. If a voltage above the stiction threshold voltage is applied to the interferometric modulator, the interferometric modulator enters a stiction state permanently, i.e., becomes "stuck," and the interferometric modulator becomes inoperable. Disclosed are apparatuses, methods and computer-readable media for testing a panel of interferometric modulators. A ramped voltage waveform is applied to a plurality of interferometric modulators of the panel. In response to applying the ramped voltage, the stiction threshold voltage is identified. At or above this voltage, the number of stuck interferometric modulators in the panel reaches or exceeds a first threshold number, for example, 50% of the total number of the interferometric modulators constituting the panel. The embodiments can be used to establish stiction benchmark for panel manufacturing processes, to collect data for generating statistical distribution, etc.
    • 在一些实施例中,每个干涉式调制器具有静态阈值电压。 如果高于静态阈值电压的电压被施加到干涉式调制器,则干涉式调制器永久地进入静态状态,即变得“卡住”,并且干涉式调制器变得不可操作。 公开了用于测试一组干涉式调制器的装置,方法和计算机可读介质。 斜坡电压波形被施加到面板的多个干涉式调制器。 响应于施加斜坡电压,识别出静态阈值电压。 在该电压以上时,面板中的卡住的干涉式调制器的数量达到或超过第一阈值数,例如构成面板的干涉式调制器总数的50%。 这些实施例可以用于建立面板制造过程的静态基准,收集用于生成统计分布的数据等。