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1. 发明申请

US20080018384A1 Internal voltage generating apparatus and method for semiconductor integrated circuit 审中-公开
标题翻译：用于半导体集成电路的内部电压产生装置和方法
公开(公告)号：US20080018384A1
公开(公告)日：2008-01-24
申请号：US11819422
申请日：2007-06-27
申请人： Myung Kim , Yong An
发明人： Myung Kim , Yong An
IPC分类号： G05F1/10
CPC分类号： G05F1/465
摘要： An internal voltage generating apparatus for a semiconductor integrated circuit includes a detecting circuit configured to detect levels of a plurality of internal voltages, to generate a plurality of voltage enable signals and a pump enable signal. A pump circuit performs a voltage pumping operation in response to the pump enable signal and outputs the plurality of internal voltages in response to the plurality of voltage enable signals.
摘要翻译：一种用于半导体集成电路的内部电压产生装置包括检测电路，其被配置为检测多个内部电压的电平，以产生多个电压使能信号和泵使能信号。泵电路响应于泵使能信号执行电压抽运操作，并且响应于多个电压使能信号而输出多个内部电压。

2. 发明授权

US08868979B1 Host disaster recovery system 有权
标题翻译：主机灾难恢复系统
公开(公告)号：US08868979B1
公开(公告)日：2014-10-21
申请号：US13301604
申请日：2011-11-21
申请人： Zhihe Zhang , Zhifei Tao , Min Zhang , Yong An , Xiaodong Huang
发明人： Zhihe Zhang , Zhifei Tao , Min Zhang , Yong An , Xiaodong Huang
IPC分类号： G06F11/00
CPC分类号： G06F11/0706 , G06F11/079 , G06F11/1417 , G06F11/1446 , G06F21/56 , G06F21/575
摘要： Critical resources are identified within a computer system such as operating system files, drivers, modules and registry keys that are used to bootstrap the computer. During a successful bootstrap, these resources are saved into persistent storage during the bootstrap phase. Changes to critical resources are monitored and these resources are backed up if they are changed. Upon computer system failure, steps of identifying the type of failure and an analysis of its root cause are optionally performed. A user is presented with a bootstrap menu and critical resources necessary to bootstrap the computer are retrieved from persistent storage and saved into their appropriate locations. A successful bootstrap is then performed of the computer system in order to recover from the failure.
摘要翻译：在计算机系统中识别关键资源，例如用于引导计算机的操作系统文件，驱动程序，模块和注册表项。在成功的引导过程中，这些资源在引导阶段被保存到持久存储器中。监视对关键资源的更改，如果更改这些资源，则备份这些资源。在计算机系统故障时，可选地执行识别故障类型和分析其根本原因的步骤。向用户呈现引导菜单，并从永久存储器检索引导计算机所需的关键资源，并将其保存到适当的位置。然后对计算机系统执行成功的引导，以便从故障中恢复。

3. 发明申请

US20070294462A1 MEMORY DEVICE INCLUDING SELF-ID INFORMATION 有权
标题翻译：包含自我身份信息的记忆设备
公开(公告)号：US20070294462A1
公开(公告)日：2007-12-20
申请号：US11845264
申请日：2007-08-27
申请人： Yong An
发明人： Yong An
IPC分类号： G06F12/00
CPC分类号： G11C29/48 , G11C11/401 , G11C29/44 , G11C2029/1208 , G11C2029/4402
摘要： Disclosed is a memory device including self-ID information. The memory device has a storage unit for storing information related to the memory device, such as a manufacturing factory, a manufacturing date, a wafer number, coordinates on a wafer and the like. Each bank of the memory device stores self-ID information related to the memory device and outputs the self-ID information out of a chip when an address is applied thereto during a test mode.
摘要翻译：公开了包括自身ID信息的存储装置。存储装置具有用于存储与诸如制造工厂，制造日期，晶片号，晶片上的坐标等存储装置有关的信息的存储单元。存储装置的每个存储体存储与存储装置相关的自身ID信息，并且在测试模式期间向其施加地址时，将芯片的自身ID信息输出。

4. 发明申请

US20050063243A1 Decoding circuit for memory device 有权
标题翻译：存储器件解码电路
公开(公告)号：US20050063243A1
公开(公告)日：2005-03-24
申请号：US10941552
申请日：2004-09-15
申请人： Yong An
发明人： Yong An
IPC分类号： G11C5/06 , G11C8/10
CPC分类号： G11C8/10
摘要： Provided is a decoding circuit for a memory device which is improved in an operation of chip so as to enable the operation to be predictable by making a decoded result corresponding to an undefined code get a specific value. The decoding circuit for a memory device generates address signals by control signals set with a mode, and comprises a first logical circuit for decoding and outputting a result value defined by logically-combining the address signals corresponding to a first group and a second logical circuit for performing a decoding operation to have address signals with a specific value included in the defined result value by logically-combining address signals corresponding to a second group, by dividing the address signals into the first group corresponding to at least one defined result value and the second group corresponding to an undefined result value.
摘要翻译：提供了一种用于存储器件的解码电路，其在芯片的操作中得到改进，以便通过使与未定义的代码相对应的解码结果获得特定值来使得操作是可预测的。用于存储器件的解码电路通过以模式设置的控制信号产生地址信号，并且包括第一逻辑电路，用于解码和输出通过逻辑组合对应于第一组的地址信号和第二逻辑电路定义的结果值，通过将对应于第二组的地址信号逻辑组合，将地址信号分成对应于至少一个定义的结果值的第一组，执行解码操作，以具有包含在定义的结果值中的具有特定值的地址信号，组对应于未定义的结果值。

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