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    • 4. 发明授权
    • Stable parallel loop systems
    • 稳定并联回路系统
    • US09002765B1
    • 2015-04-07
    • US13295013
    • 2011-11-11
    • Muralidhar Ravuri
    • Muralidhar Ravuri
    • G06N3/04G06N3/08
    • G06N3/04G06N3/082
    • Stable Parallel Loop (SPL) systems and exemplary embodiments are described with reference to both software and hardware platforms. A SPL network includes an input surface, internal nodes, connections that selectively link internal nodes, and an output surface. Signals from the environment are received on the input surface. The received signals excite internal nodes of the SPL network. The internal nodes exhibit their own dynamic behavior. As a result of the interconnected network structure and operational characteristics of each node, dynamic loops are formed among certain internal nodes. A dynamic loop is formed when all of internal nodes within an interconnected loop are active. Output from the SPL network is generated based on the dynamic loops that are formed. Tools to develop and implement a SPL network are presented.
    • 参考软件和硬件平台来描述稳定并行环路(SPL)系统和示例性实施例。 SPL网络包括输入表面,内部节点,选择性地链接内部节点的连接和输出表面。 来自环境的信号在输入表面上被接收。 接收的信号激发SPL网络的内部节点。 内部节点表现出自己的动态行为。 由于每个节点的互联网络结构和操作特性,在某些内部节点之间形成动态环路。 当互连环路中的所有内部节点都处于活动状态时,形成动态环路。 基于形成的动态循环生成来自SPL网络的输出。 介绍了开发和实施SPL网络的工具。