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    • 1. 发明申请
    • WIDEBAND LOW-NOISE AMPLIFIER
    • 宽带低噪声放大器
    • US20100066452A1
    • 2010-03-18
    • US12595163
    • 2008-05-16
    • Munenari KawashimaYo YamaguchiKazuhiro UeharaKenjiro Nishikawa
    • Munenari KawashimaYo YamaguchiKazuhiro UeharaKenjiro Nishikawa
    • H03F1/34
    • H03F1/34H03F1/26H03F1/42H03F1/56H03F3/19H03F2200/108H03F2200/144H03F2200/151H03F2200/222H03F2200/294H03F2200/36H03F2200/451
    • A wideband low-noise amplifier of the present invention is designed such that an input terminal is connected to a base of a first transistor, one terminal of a first passive element, and one terminal of a third passive element; an emitter of the first transistor is grounded; a collector of the first transistor is connected to an output terminal, a base of a second transistor, one terminal of a capacitor, and one terminal of a second passive element; the other terminal of the first passive element is connected to the other terminal of the capacitor; an emitter of the second transistor is connected to the other terminal of the third passive element; and a power terminal is connected to a collector of the second transistor and the other terminal of the second passive element, wherein impedance of the third passive element is determined based on impedance of the first transistor whose emitter size is determined to suite desired saturation level of amplification, thus establishing input impedance matching.
    • 本发明的宽带低噪声放大器被设计成使得输入端子连接到第一晶体管的基极,第一无源元件的一个端子和第三无源元件的一个端子; 第一晶体管的发射极接地; 第一晶体管的集电极连接到输出端子,第二晶体管的基极,电容器的一个端子和第二无源元件的一个端子; 第一无源元件的另一个端子连接到电容器的另一个端子; 第二晶体管的发射极连接到第三无源元件的另一个端子; 并且电源端子连接到所述第二晶体管的集电极和所述第二无源元件的另一端子,其中所述第三无源元件的阻抗基于所述第一晶体管的阻抗来确定,所述第一晶体管的发射极尺寸被确定为将所需的饱和电平 放大,从而建立输入阻抗匹配。
    • 2. 发明授权
    • Wideband low-noise amplifier
    • 宽带低噪声放大器
    • US08004363B2
    • 2011-08-23
    • US12595163
    • 2008-05-16
    • Munenari KawashimaYo YamaguchiKazuhiro UeharaKenjiro Nishikawa
    • Munenari KawashimaYo YamaguchiKazuhiro UeharaKenjiro Nishikawa
    • H03F1/34
    • H03F1/34H03F1/26H03F1/42H03F1/56H03F3/19H03F2200/108H03F2200/144H03F2200/151H03F2200/222H03F2200/294H03F2200/36H03F2200/451
    • A wideband low-noise amplifier of the present invention is designed such that an input terminal is connected to a base of a first transistor, one terminal of a first passive element, and one terminal of a third passive element; an emitter of the first transistor is grounded; a collector of the first transistor is connected to an output terminal, a base of a second transistor, one terminal of a capacitor, and one terminal of a second passive element; the other terminal of the first passive element is connected to the other terminal of the capacitor; an emitter of the second transistor is connected to the other terminal of the third passive element; and a power terminal is connected to a collector of the second transistor and the other terminal of the second passive element, wherein impedance of the third passive element is determined based on impedance of the first transistor whose emitter size is determined to suite desired saturation level of amplification, thus establishing input impedance matching.
    • 本发明的宽带低噪声放大器被设计成使得输入端子连接到第一晶体管的基极,第一无源元件的一个端子和第三无源元件的一个端子; 第一晶体管的发射极接地; 第一晶体管的集电极连接到输出端子,第二晶体管的基极,电容器的一个端子和第二无源元件的一个端子; 第一无源元件的另一个端子连接到电容器的另一个端子; 第二晶体管的发射极连接到第三无源元件的另一个端子; 并且电源端子连接到所述第二晶体管的集电极和所述第二无源元件的另一端子,其中所述第三无源元件的阻抗基于所述第一晶体管的阻抗来确定,所述第一晶体管的发射极尺寸被确定为将所需的饱和电平 放大,从而建立输入阻抗匹配。
    • 5. 发明授权
    • Programmable delay generator and application circuits having said delay generator
    • 具有所述延迟发生器的可编程延迟发生器和应用电路
    • US06188261B1
    • 2001-02-13
    • US09233427
    • 1999-01-20
    • Hideyuki NosakaAkira MinakawaYo YamaguchiAkihiro Yamagishi
    • Hideyuki NosakaAkira MinakawaYo YamaguchiAkihiro Yamagishi
    • H03K301
    • H03L7/081G06F1/025G06F7/68H03K4/502H03K5/00006H03K5/131H03K5/135H03K5/156H03L7/18H03L2207/10H03M1/822
    • A programmable delay generator comprises a first ramp wave generator and a second ramp wave generator, each having the same structure as each other, each of them operating with external common clock pulses, and each of them providing potential gradient and final potential incorporated with an external set data; a comparator for comparing an output (Vs) of the first ramp wave generator and an output (Vk) of the second ramp wave generator so that an output pulse is provided when the outputs of two ramp wave generators coincide with each other; said first ramp wave generator providing a first ramp voltage (Vs) upon receipt of a first set data (S) at a predetermined time (t0); said second ramp wave generator providing a threshold voltage (Vk) upon receipt of a second set data (K) at a time which preceds at least one clock time (T) than said predetermined time (t0); said comparator providing an output pulse delayed by delay time (td) which is proportional to ratio (K/S) of said second set data (K) and said first set data (S) from said predetermined time. An application circuit using said programmable delay generator, including a frequency synthesizer, a frequency multiplier, a duty ratio converter, and a PLL frequency synthesizer is also provided.
    • 可编程延迟发生器包括第一斜坡波发生器和第二斜波发生器,每个具有彼此相同的结构,它们中的每一个以外部公共时钟脉冲进行操作,并且它们中的每一个提供与外部 设置数据; 比较器,用于比较第一斜坡波发生器的输出(Vs)和第二斜坡波发生器的输出(Vk),使得当两个斜波发生器的输出彼此一致时提供输出脉冲; 所述第一斜坡波发生器在预定时间(t0)接收到第一设定数据(S)时提供第一斜坡电压(Vs); 所述第二斜波发生器在比所述预定时间(t0)至少一个时钟时间(T)之前的时间接收到第二设置数据(K)时提供阈值电压(Vk); 所述比较器提供延迟延迟时间(td)的输出脉冲,该延迟时间(td)与所述第二设定数据(K)和所述第一设定数据(S)的比率(K / S)成比例。 还提供了使用包括频率合成器,倍频器,占空比转换器和PLL频率合成器的所述可编程延迟发生器的应用电路。