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1. 发明申请

US20110248272A1 ORGANIC EL DISPLAY DEVICE REFLECTIVE ANODE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：有机EL显示装置反射阳极及其制造方法
公开(公告)号：US20110248272A1
公开(公告)日：2011-10-13
申请号：US13126126
申请日：2009-11-09
申请人： Mototaka Ochi , Hiroshi Goto , Tomoya Kishi , Nobuyuki Kawakami
发明人： Mototaka Ochi , Hiroshi Goto , Tomoya Kishi , Nobuyuki Kawakami
IPC分类号： H01L29/786 , C23C14/34 , H01L33/60
CPC分类号： H01L51/5218 , H01L27/3244 , H01L2251/5315
摘要： Provided is a reflective anode for an organic EL display device having a reflective film made from an Al-based alloy which can realize a low contact resistance with an oxide conductive film and achieve an excellent reflectivity. Provided is also a method for manufacturing the reflective anode for an organic EL display device. The method includes: a step of forming an Al-based alloy film containing 0.1 to 2 atomic % of Ni or Co on a substrate; a step of subjecting the Al-based alloy film to a thermal treatment in a vacuum or an inactive gas atmosphere at the temperature of 150 degrees C. or above; and a step of forming an oxide conductive film so as to be in direct contact with the Al-based alloy film.
摘要翻译：本发明提供一种有机EL显示装置的反射性阳极，其具有由Al系合金制成的反射膜，该反射膜能够实现与氧化物导电膜的低接触电阻，并获得良好的反射率。还提供了一种用于制造有机EL显示装置的反射式阳极的方法。该方法包括：在基板上形成含有0.1〜2原子％的Ni或Co的Al系合金膜的工序; 在150℃以上的温度下在真空或惰性气体气氛中对Al系合金膜进行热处理的工序; 以及形成与Al系合金膜直接接触的氧化物导电膜的工序。

2. 发明申请

US20090242394A1 AL-BASED ALLOY SPUTTERING TARGET AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：基于AL的合金喷射目标及其制造方法
公开(公告)号：US20090242394A1
公开(公告)日：2009-10-01
申请号：US12414877
申请日：2009-03-31
申请人： Katsutoshi Takagi , Yuki Iwasaki , Masaya Ehira , Hiroshi Goto , Aya Miki , Hiroyuki Okuno , Mototaka Ochi , Tomoya Kishi
发明人： Katsutoshi Takagi , Yuki Iwasaki , Masaya Ehira , Hiroshi Goto , Aya Miki , Hiroyuki Okuno , Mototaka Ochi , Tomoya Kishi
IPC分类号： C23C14/34 , C21D1/00
CPC分类号： C23C14/3414 , C22C21/00 , C22F1/04
摘要： The present invention provides an Al—(Ni, Co)—(Cu, Ge)—(La, Gd, Nd) alloy sputtering target capable of decreasing a generation of splashing in an initial stage of using the sputtering target, preventing defects caused thereby in interconnection films or the like and improving a yield and operation performance of an FPD, as well as a manufacturing method thereof. The invention relates to an Al-based alloy sputtering target which is an Al—(Ni, Co)—(Cu, Ge)—(La, Gd, Nd) alloy sputtering target comprising at least one member selected from the group A (Ni, Co), at least one member selected from the group B (Cu, Ge), and at least one member selected from the group C (La, Gd, Nd) wherein a Vickers hardness (HV) thereof is 35 or more.
摘要翻译：本发明提供能够在使用溅射靶的初始阶段减少飞溅产生的Al-（Ni，Co） - （Cu，Ge） - （La，Gd，Nd）合金溅射靶，从而防止由此引起的缺陷在互连膜等中，提高FPD的成品率和操作性能，以及其制造方法。本发明涉及一种Al基合金溅射靶，它是Al-（Ni，Co） - （Cu，Ge） - （La，Gd，Nd）合金溅射靶，其包含至少一种选自A ，Co），选自B族（Cu，Ge）中的至少一种以及选自维氏硬度（HV）为35以上的C（La，Gd，Nd）中的至少一种。

3. 发明授权

US08299614B2 Interconnection structure, a thin film transistor substrate, and a manufacturing method thereof, as well as a display device 有权
标题翻译：互连结构，薄膜晶体管基板及其制造方法以及显示装置
公开(公告)号：US08299614B2
公开(公告)日：2012-10-30
申请号：US12936572
申请日：2009-04-17
申请人： Nobuyuki Kawakami , Mototaka Ochi , Aya Miki , Shinya Morita , Yoshihiro Yokota , Shinya Fukuma , Hiroshi Goto
发明人： Nobuyuki Kawakami , Mototaka Ochi , Aya Miki , Shinya Morita , Yoshihiro Yokota , Shinya Fukuma , Hiroshi Goto
IPC分类号： H01L23/48
CPC分类号： H01L21/26506 , H01L21/2236 , H01L21/76829 , H01L21/76838 , H01L27/124 , H01L29/458 , H01L29/66575 , H01L2924/0002 , H01L2924/00
摘要： An interconnection structure, containing a substrate and, in the following order from a side of the substrate: (I) a semiconductor layer; (II) a multilayer structure including (II-a) a first layer containing at least one type of an element selected from the group consisting of nitrogen, carbon and fluorine and (II-b) an Al—Si diffusion layer containing Al and Si; and (III) an Al film of pure Al or an Al alloy, wherein the at least one of element selected from the group consisting of nitrogen, carbon, and fluorine in the first layer is bonded with Si contained in the semiconductor layer.
摘要翻译：一种互连结构，其包含基板，并且从所述基板的侧面按以下顺序：（I）半导体层; （II）包括（II-a）含有选自氮，碳和氟中的至少一种元素的第一层和（II-b）含有Al和Si的Al-Si扩散层的多层结构 ; 和（III）纯Al或Al合金的Al膜，其中在第一层中选自氮，碳和氟的至少一种元素与包含在半导体层中的Si结合。

4. 发明授权

US08217397B2 Thin film transistor substrate and display device 有权
标题翻译：薄膜晶体管基板和显示装置
公开(公告)号：US08217397B2
公开(公告)日：2012-07-10
申请号：US12812913
申请日：2009-01-15
申请人： Mototaka Ochi , Nobuyuki Kawakami , Katsufumi Tomihisa , Hiroshi Goto
发明人： Mototaka Ochi , Nobuyuki Kawakami , Katsufumi Tomihisa , Hiroshi Goto
IPC分类号： H01L27/14 , H01L29/04 , H01L29/15 , H01L31/036
CPC分类号： H01L29/458
摘要： The present invention provides a thin film transistor substrate and a display device in which a decrease in the dry etching rate of a source electrode and drain electrode is not caused; no etching residues are generated; and a barrier metal can be eliminated between a semiconductor layer and metal wires such as the source and drain electrodes. The present invention is a thin film transistor substrate having a semiconductor layer 1, a source electrode 2, a drain electrode 3, and a transparent conductive film 4, in which the source electrode 2 and drain electrode 3 are formed by patterning by means of dry etching and comprises an Al alloy thin film comprising 0.1 to 1.5 atom % of Si and/or Ge, 0.1 to 3.0 atom % of Ni and/or Co, and 0.1 to 0.5 atom % of La and/or Nd, and the thin film transistor is directly connected with the semiconductor layer 1.
摘要翻译：本发明提供一种薄膜晶体管基板和显示装置，其中不会引起源电极和漏电极的干蚀刻速率的降低; 不产生蚀刻残留物; 并且可以在半导体层和诸如源极和漏极之类的金属线之间消除阻挡金属。本发明是一种具有半导体层1，源电极2，漏电极3和透明导电膜4的薄膜晶体管基板，其中源电极2和漏电极3通过干式图案形成并且包括包含0.1至1.5原子％的Si和/或Ge，0.1至3.0原子％的Ni和/或Co，以及0.1至0.5原子％的La和/或Nd的Al合金薄膜，并且薄膜晶体管与半导体层1直接连接。

5. 发明申请

US20110024761A1 INTERCONNECTION STRUCTURE, A THIN FILM TRANSISTOR SUBSTRATE, AND A MANUFACTURING METHOD THEREOF, AS WELL AS A DISPLAY DEVICE 有权
标题翻译：互连结构，薄膜晶体管基板及其制造方法，作为显示器件
公开(公告)号：US20110024761A1
公开(公告)日：2011-02-03
申请号：US12936572
申请日：2009-04-17
申请人： Nobuyuki Kawakami , Mototaka Ochi , Aya Miki , Shinya Morita , Yoshihiro Yokota , Shinya Fukuma , Hiroshi Goto
发明人： Nobuyuki Kawakami , Mototaka Ochi , Aya Miki , Shinya Morita , Yoshihiro Yokota , Shinya Fukuma , Hiroshi Goto
IPC分类号： H01L33/16 , H01L21/20
CPC分类号： H01L21/26506 , H01L21/2236 , H01L21/76829 , H01L21/76838 , H01L27/124 , H01L29/458 , H01L29/66575 , H01L2924/0002 , H01L2924/00
摘要： Provided is a direct contact technology by which a barrier metal layer between an Al alloy interconnection composed of pure Al or an Al alloy and a semiconductor layer can be eliminated and the Al alloy interconnection can be directly and surely connected to the semiconductor layer within a wide process margin. In an interconnection structure, the semiconductor layer, and the Al alloy film composed of the pure Al or the Al alloy are provided on the substrate in this order from the substrate side. A multilayer structure of an (N, C, F) layer containing at least one type of an element selected from among a group composed of nitrogen, carbon and fluorine, and an Al—Si diffusion layer containing Al and Si is included in this order from the substrate side, between the semiconductor layer and the Al alloy film. At least the one type of the element, i.e., nitrogen, carbon or fluorine contained in the (N, C, F) layer is bonded with Si contained in the semiconductor layer.
摘要翻译：提供了一种直接接触技术，通过该技术可以消除由纯Al或Al合金构成的Al合金互连与半导体层之间的阻挡金属层，并且Al合金互连可以在宽的范围内直接且可靠地连接到半导体层过程保证金在互连结构中，从衬底侧依次从衬底上提供由纯Al或Al合金构成的半导体层和Al合金膜。包含选自由氮，碳和氟组成的组中的至少一种元素和包含Al和Si的Al-Si扩散层的（N，C，F）层的多层结构按此顺序包括从衬底侧在半导体层和Al合金膜之间。（N，C，F）层中所含的至少一种元素即氮，碳或氟与包含在半导体层中的Si键合。

6. 发明授权

US08535997B2 Wiring structure, thin film transistor substrate, method for manufacturing thin film transistor substrate, and display device 有权
标题翻译：接线结构，薄膜晶体管基板，薄膜晶体管基板的制造方法以及显示装置
公开(公告)号：US08535997B2
公开(公告)日：2013-09-17
申请号：US12999034
申请日：2009-07-03
申请人： Nobuyuki Kawakami , Shinya Fukuma , Aya Miki , Mototaka Ochi , Shinya Morita , Yoshihiro Yokota , Hiroshi Goto
发明人： Nobuyuki Kawakami , Shinya Fukuma , Aya Miki , Mototaka Ochi , Shinya Morita , Yoshihiro Yokota , Hiroshi Goto
IPC分类号： H01L21/84
CPC分类号： H01L23/53238 , G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L21/28525 , H01L21/76843 , H01L27/124 , H01L29/458 , H01L2924/0002 , H01L2924/00
摘要： Provided is a direct contact technology by which a barrier metal layer between a Cu alloy wiring composed of pure Cu or a Cu alloy and a semiconductor layer can be eliminated, and the Cu alloy wiring can be directly and surely connected to the semiconductor layer within a wide process margin. The wiring structure is provided with the semiconductor layer and the Cu alloy film composed of pure Cu or the Cu alloy on a substrate in this order from the substrate side. A laminated structure is included between the semiconductor layer and the Cu alloy film. The laminated structure is composed of an (N, C, F) layer, which contains at least one element selected from among a group composed of nitrogen, carbon and fluorine, and a Cu—Si diffusion layer, which contains Cu and Si, in this order from the substrate side. Furthermore, at least the one element selected from among the group composed of nitrogen, carbon and fluorine is bonded to Si contained in the semiconductor layer.
摘要翻译：提供一种直接接触技术，通过该技术可以消除由纯Cu或Cu合金构成的Cu合金布线与半导体层之间的阻挡金属层，并且Cu合金布线可以直接和可靠地连接到半导体层内加工边缘宽布线结构从衬底侧依次设置有半导体层和由纯Cu或Cu合金构成的Cu合金膜。在半导体层和Cu合金膜之间包含层叠结构。层叠结构由（N，C，F）层构成，其含有选自由氮，碳和氟组成的组中的至少一种元素，以及含有Cu和Si的Cu-Si扩散层，这个顺序是从衬底一侧。此外，至少从由氮，碳和氟组成的组中选择的一种元素与包含在半导体层中的Si键合。

7. 发明申请

US20110121297A1 WIRING STRUCTURE, THIN FILM TRANSISTOR SUBSTRATE, METHOD FOR MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE, AND DISPLAY DEVICE 有权
标题翻译：导线结构，薄膜晶体管基板，制造薄膜晶体管基板的方法和显示装置
公开(公告)号：US20110121297A1
公开(公告)日：2011-05-26
申请号：US12999034
申请日：2009-07-03
申请人： Nobuyuki Kawakami , Shinya Fukuma , Aya Miki , Mototaka Ochi , Shinya Morita , Yoshihiro Yokota , Hiroshi Goto
发明人： Nobuyuki Kawakami , Shinya Fukuma , Aya Miki , Mototaka Ochi , Shinya Morita , Yoshihiro Yokota , Hiroshi Goto
IPC分类号： H01L29/02 , H01L23/48 , H01L33/00
CPC分类号： H01L23/53238 , G02F1/136286 , G02F2001/13629 , G02F2001/136295 , H01L21/28525 , H01L21/76843 , H01L27/124 , H01L29/458 , H01L2924/0002 , H01L2924/00
摘要： Provided is a direct contact technology by which a barrier metal layer between a Cu alloy wiring composed of pure Cu or a Cu alloy and a semiconductor layer can be eliminated, and the Cu alloy wiring can be directly and surely connected to the semiconductor layer within a wide process margin. The wiring structure is provided with the semiconductor layer and the Cu alloy film composed of pure Cu or the Cu alloy on a substrate in this order from the substrate side. A laminated structure is included between the semiconductor layer and the Cu alloy film. The laminated structure is composed of an (N, C, F) layer, which contains at least one element selected from among a group composed of nitrogen, carbon and fluorine, and a Cu—Si diffusion layer, which contains Cu and Si, in this order from the substrate side. Furthermore, at least the one element selected from among the group composed of nitrogen, carbon and fluorine is bonded to Si contained in the semiconductor layer.
摘要翻译：提供一种直接接触技术，通过该技术可以消除由纯Cu或Cu合金构成的Cu合金布线与半导体层之间的阻挡金属层，并且Cu合金布线可以直接和可靠地连接到半导体层内加工边缘宽在基板侧依次配置半导体层和由纯Cu或Cu合金构成的Cu合金膜。在半导体层和Cu合金膜之间包含层叠结构。层叠结构由（N，C，F）层构成，其含有选自由氮，碳和氟组成的组中的至少一种元素，以及含有Cu和Si的Cu-Si扩散层，这个顺序是从衬底一侧。此外，至少从由氮，碳和氟组成的组中选择的一种元素与包含在半导体层中的Si键合。

8. 发明授权

US08163143B2 Al-Ni-La-Si system Al-based alloy sputtering target and process for producing the same 有权
标题翻译： Al-Ni-La-Si系Al基合金溅射靶及其制造方法
公开(公告)号：US08163143B2
公开(公告)日：2012-04-24
申请号：US12172442
申请日：2008-07-14
申请人： Katsutoshi Takagi , Yuki Iwasaki , Masaya Ehira , Akira Nanbu , Mototaka Ochi , Hiroshi Goto , Nobuyuki Kawakami
发明人： Katsutoshi Takagi , Yuki Iwasaki , Masaya Ehira , Akira Nanbu , Mototaka Ochi , Hiroshi Goto , Nobuyuki Kawakami
IPC分类号： C23C14/00
CPC分类号： C23C14/3414 , B22F2998/10 , C22C1/0491 , C22C21/00 , C22F1/04 , B22F9/082 , B22F3/115 , B22F3/15 , B22F3/17 , B22F3/18
摘要： The present invention relates to an Al—Ni—La—Si system Al-based alloy sputtering target including Ni, La and Si, in which, when a section from (¼)t to (¾)t (t: thickness) in a cross section vertical to a plane of the sputtering target is observed with a scanning electron microscope at a magnification of 2000 times, (1) a total area of an Al—Ni system intermetallic compound having an average particle diameter of 0.3 μm to 3 μm with respect to a total area of the entire Al—Ni system intermetallic compound is 70% or more in terms of an area fraction, the Al—Ni system intermetallic compound being mainly composed of Al and Ni; and (2) a total area of an Al—Ni—La—Si system intermetallic compound having an average particle diameter of 0.2 μm to 2 μm with respect to a total area of the entire Al—Ni—La—Si system intermetallic compound is 70% or more in terms of an area fraction, the Al—Ni—La—Si system intermetallic compound being mainly composed of Al, Ni, La, and Si.
摘要翻译：本发明涉及包含Ni，La和Si的Al-Ni-La-Si系Al基合金溅射靶，其中当在（a）中的（¼）t至（¾）t（t：厚度）用扫描电子显微镜观察垂直于溅射靶的平面的横截面为2000倍，（1）平均粒径为0.3μm〜3μm的Al-Ni系金属间化合物的总面积与 Al-Ni系金属间化合物主要由Al和Ni构成，Al-Ni体系金属间化合物的总面积为面积率的70％以上，和（2）相对于Al-Ni-La-Si体系金属间化合物的总面积，平均粒径为0.2μm〜2μm的Al-Ni-La-Si系金属间化合物的总面积为 Al-Ni-La-Si系金属间化合物主要由Al，Ni，La和Si组成，面积分数为70％以上。

9. 发明申请

US20090026072A1 AL-NI-LA-SI SYSTEM AL-BASED ALLOY SPUTTERING TARGET AND PROCESS FOR PRODUCING THE SAME 有权
标题翻译： AL-NI-LA-SI系统AL合金喷射靶及其生产方法
公开(公告)号：US20090026072A1
公开(公告)日：2009-01-29
申请号：US12172442
申请日：2008-07-14
申请人： Katsutoshi Takagi , Yuki Iwasaki , Masaya Ehira , Akira Nanbu , Mototaka Ochi , Hiroshi Goto , Nobuyuki Kawakami
发明人： Katsutoshi Takagi , Yuki Iwasaki , Masaya Ehira , Akira Nanbu , Mototaka Ochi , Hiroshi Goto , Nobuyuki Kawakami
IPC分类号： C23C14/34 , C23C16/00
CPC分类号： C23C14/3414 , B22F2998/10 , C22C1/0491 , C22C21/00 , C22F1/04 , B22F9/082 , B22F3/115 , B22F3/15 , B22F3/17 , B22F3/18
摘要： The present invention relates to an Al—Ni—La—Si system Al-based alloy sputtering target including Ni, La and Si, in which, when a section from (¼)t to (¾)t (t: thickness) in a cross section vertical to a plane of the sputtering target is observed with a scanning electron microscope at a magnification of 2000 times, (1) a total area of an Al—Ni system intermetallic compound having an average particle diameter of 0.3 μm to 3 μm with respect to a total area of the entire Al—Ni system intermetallic compound is 70% or more in terms of an area fraction, the Al—Ni system intermetallic compound being mainly composed of Al and Ni; and (2) a total area of an Al—Ni—La—Si system intermetallic compound having an average particle diameter of 0.2 μm to 2 μm with respect to a total area of the entire Al—Ni—La—Si system intermetallic compound is 70% or more in terms of an area fraction, the Al—Ni—La—Si system intermetallic compound being mainly composed of Al, Ni, La, and Si.
摘要翻译：本发明涉及包含Ni，La和Si的Al-Ni-La-Si系Al基合金溅射靶，其中当在（a）中的（¼）t至（¾）t（t：厚度）用扫描电子显微镜以2000倍的倍数观察垂直于溅射靶的平面的横截面，（1）平均粒径为0.3μm〜3μm的Al-Ni系金属间化合物的总面积， Al-Ni系金属间化合物主要由Al和Ni构成，Al-Ni体系金属间化合物的总面积为面积率的70％以上，和（2）相对于Al-Ni-La-Si体系金属间化合物的总面积，平均粒径为0.2μm〜2μm的Al-Ni-La-Si系金属间化合物的总面积为 Al-Ni-La-Si系金属间化合物主要由Al，Ni，La和Si组成，面积分数为70％以上。

10. 发明申请

US20100295053A1 THIN FILM TRANSISTOR SUBSTRATE AND DISPLAY DEVICE 有权
标题翻译：薄膜晶体管基板和显示器件
公开(公告)号：US20100295053A1
公开(公告)日：2010-11-25
申请号：US12812913
申请日：2009-01-15
申请人： Mototaka Ochi , Nobuyuki Kawakami , Katsufumi Tomihisa , Hiroshi Goto
发明人： Mototaka Ochi , Nobuyuki Kawakami , Katsufumi Tomihisa , Hiroshi Goto
IPC分类号： H01L33/00 , H01L29/786
CPC分类号： H01L29/458
摘要： The present invention provides a thin film transistor substrate and a display device in which a decrease in the dry etching rate of a source electrode and drain electrode is not caused; no etching residues are generated; and a barrier metal can be eliminated between a semiconductor layer and metal wires such as the source and drain electrodes. The present invention is a thin film transistor substrate having a semiconductor layer 1, a source electrode 2, a drain electrode 3, and a transparent conductive film 4, in which the source electrode 2 and drain electrode 3 are formed by patterning by means of dry etching and comprises an Al alloy thin film comprising 0.1 to 1.5 atom % of Si and/or Ge, 0.1 to 3.0 atom % of Ni and/or Co, and 0.1 to 0.5 atom % of La and/or Nd, and the thin film transistor is directly connected with the semiconductor layer 1.
摘要翻译：本发明提供一种薄膜晶体管基板和显示装置，其中不会引起源电极和漏电极的干蚀刻速率的降低; 不产生蚀刻残留物; 并且可以在半导体层和诸如源极和漏极之类的金属线之间消除阻挡金属。本发明是一种具有半导体层1，源电极2，漏电极3和透明导电膜4的薄膜晶体管基板，其中源电极2和漏电极3通过干式图案形成并且包括包含0.1至1.5原子％的Si和/或Ge，0.1至3.0原子％的Ni和/或Co，以及0.1至0.5原子％的La和/或Nd的Al合金薄膜，并且薄膜晶体管与半导体层1直接连接。

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