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1. 发明申请

US20110090615A1 CAPACITOR TO BE INCORPORATED IN WIRING SUBSTRATE, METHOD FOR MANUFACTURING THE CAPACITOR, AND WIRING SUBSTRATE 有权
公开(公告)号：US20110090615A1
公开(公告)日：2011-04-21
申请号：US12951739
申请日：2010-11-22
申请人： Motohiko SATO , Kazuhiro Hayashi , Kenji Murakami , Motonobu Karahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
发明人： Motohiko SATO , Kazuhiro Hayashi , Kenji Murakami , Motonobu Karahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
IPC分类号： H01G4/30
CPC分类号： H05K1/0231 , H01G4/228 , H01G4/30 , H01G4/38 , H01L23/49822 , H01L2924/0002 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10712 , H01L2924/00
摘要： A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.

2. 发明授权

US08304321B2 Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate 有权
标题翻译：配线基板中的电容器，电容器的制造方法以及布线基板
公开(公告)号：US08304321B2
公开(公告)日：2012-11-06
申请号：US12951895
申请日：2010-11-22
申请人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
发明人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
IPC分类号： H01L21/20
CPC分类号： H05K1/0231 , H01G4/228 , H01G4/30 , H01G4/38 , H01L23/49822 , H01L2924/0002 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10712 , H01L2924/00
摘要： A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.
摘要翻译：一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中，从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

3. 发明授权

US08697534B2 Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate 有权
标题翻译：配线基板中的电容器，电容器的制造方法以及布线基板
公开(公告)号：US08697534B2
公开(公告)日：2014-04-15
申请号：US13610936
申请日：2012-09-12
申请人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
发明人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
IPC分类号： H01L21/20
CPC分类号： H05K1/0231 , H01G4/228 , H01G4/30 , H01G4/38 , H01L23/49822 , H01L2924/0002 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10712 , H01L2924/00
摘要： A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.
摘要翻译：一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中，从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

4. 发明授权

US07863662B2 Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate 有权
标题翻译：配线基板中的电容器，电容器的制造方法以及布线基板
公开(公告)号：US07863662B2
公开(公告)日：2011-01-04
申请号：US11643871
申请日：2006-12-22
申请人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
发明人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
IPC分类号： H01L21/02
CPC分类号： H05K1/0231 , H01G4/228 , H01G4/30 , H01G4/38 , H01L23/49822 , H01L2924/0002 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10712 , H01L2924/00
摘要： A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.
摘要翻译：一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中，从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

5. 发明申请

US20070145449A1 Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate 有权
标题翻译：配线基板中的电容器，电容器的制造方法以及布线基板
公开(公告)号：US20070145449A1
公开(公告)日：2007-06-28
申请号：US11643871
申请日：2006-12-22
申请人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
发明人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
IPC分类号： H01L29/94
CPC分类号： H05K1/0231 , H01G4/228 , H01G4/30 , H01G4/38 , H01L23/49822 , H01L2924/0002 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10712 , H01L2924/00
摘要： A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.
摘要翻译：一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中，从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

6. 发明授权

US08350306B2 Capacitor to be incorporated in wiring substrate, method for manufacturing the capacitor, and wiring substrate 有权
标题翻译：配线基板中的电容器，电容器的制造方法以及布线基板
公开(公告)号：US08350306B2
公开(公告)日：2013-01-08
申请号：US12951739
申请日：2010-11-22
申请人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
发明人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
IPC分类号： H01L21/02
CPC分类号： H05K1/0231 , H01G4/228 , H01G4/30 , H01G4/38 , H01L23/49822 , H01L2924/0002 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10712 , H01L2924/00
摘要： A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.
摘要翻译：一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中，从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

7. 发明申请

US20110083794A1 CAPACITOR TO BE INCORPORATED IN WIRING SUBSTRATE, METHOD FOR MANUFACTURING THE CAPACITOR, AND WIRING SUBSTRATE 有权
标题翻译：在配线基板中并入的电容器，制造电容器的方法和接线基板
公开(公告)号：US20110083794A1
公开(公告)日：2011-04-14
申请号：US12951895
申请日：2010-11-22
申请人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
发明人： Motohiko Sato , Kazuhiro Hayashi , Kenji Murakami , Motonobu Kurahashi , Yusuke Kaieda , Jun Otsuka , Manabu Sato
IPC分类号： B29C65/02
CPC分类号： H05K1/0231 , H01G4/228 , H01G4/30 , H01G4/38 , H01L23/49822 , H01L2924/0002 , H01L2924/3511 , H05K1/185 , H05K3/4602 , H05K2201/10712 , H01L2924/00
摘要： A wiring substrate in which a capacitor is provided, the capacitor comprising a capacitor body including a plurality of dielectric layers and internal electrode layers provided between the different dielectric layers, wherein said capacitor body has, in at least one side face of said capacitor body, recesses extending in a thickness direction of said capacitor body from at least one of a first principal face of said capacitor body and a second principal face positioned on the side opposite to the first principal face.
摘要翻译：一种电容器，其具有电容器，所述电容器包括：电容器主体，包括多个电介质层和设置在所述不同电介质层之间的内部电极层，其中所述电容器本体在所述电容器主体的至少一个侧面中，从所述电容器主体的第一主面和位于与所述第一主面相反的一侧的第二主面中的至少一个在所述电容器本体的厚度方向上延伸的凹部。

8. 发明授权

US07932471B2 Capacitor for incorporation in wiring board, wiring board, method of manufacturing wiring board, and ceramic chip for embedment 有权
标题翻译：用于布线板的电容器，布线板，制造布线板的方法和用于嵌入的陶瓷芯片
公开(公告)号：US07932471B2
公开(公告)日：2011-04-26
申请号：US11498785
申请日：2006-08-04
申请人： Hiroshi Yamamoto , Toshitake Seki , Shinji Yuri , Masaki Muramatsu , Motohiko Sato , Kazuhiro Hayashi , Jun Otsuka , Manabu Sato
发明人： Hiroshi Yamamoto , Toshitake Seki , Shinji Yuri , Masaki Muramatsu , Motohiko Sato , Kazuhiro Hayashi , Jun Otsuka , Manabu Sato
IPC分类号： H05K1/16
CPC分类号： H01G4/232 , H01G4/30 , H01L23/49822 , H01L2224/05568 , H01L2224/05573 , H01L2224/16225 , H01L2224/16235 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/15311 , H01L2924/3511 , H05K1/0231 , H05K1/112 , H05K1/185 , H05K3/4602 , H05K2201/096 , H05K2201/09781 , H05K2201/10674 , H05K2201/10712 , H01L2224/05599
摘要： A capacitor comprising: a capacitor body including a plurality of laminated dielectric layers, a plurality of inner electrode layers which are respectively disposed between mutually adjacent ones of the dielectric layers, a first main surface located in a laminated direction of the dielectric layers, and a second main surface opposite to the first main surface; a first outer electrode formed on the first main surface of the capacitor body and electrically connected to the inner electrode layers; a second outer electrode formed on the second main surface of the capacitor body and electrically connected to the inner electrode layers; a first dummy electrode formed on the first main surface of the capacitor body; and a second dummy electrode formed on the second main surface of the capacitor body.
摘要翻译：一种电容器，包括：电容器主体，包括多个叠层电介质层，多个内部电极层，分别设置在相互相邻的电介质层之间，第一主表面位于电介质层的层叠方向上，第二主表面与第一主表面相对; 第一外电极，形成在所述电容器主体的所述第一主表面上并电连接到所述内电极层; 形成在所述电容器主体的所述第二主表面上并与内部电极层电连接的第二外部电极; 形成在所述电容器主体的所述第一主表面上的第一虚拟电极; 以及形成在电容器主体的第二主表面上的第二虚拟电极。

9. 发明授权

US07327554B2 Assembly of semiconductor device, interposer and substrate 有权
标题翻译：半导体器件，插入器和衬底的组装
公开(公告)号：US07327554B2
公开(公告)日：2008-02-05
申请号：US10801867
申请日：2004-03-17
申请人： Jun Otsuka , Manabu Sato , Junichi Ito , Kazuhiro Hayashi , Motohiko Sato
发明人： Jun Otsuka , Manabu Sato , Junichi Ito , Kazuhiro Hayashi , Motohiko Sato
IPC分类号： H01G4/228
CPC分类号： H01L24/16 , H01L23/49805 , H01L23/49816 , H01L23/49822 , H01L23/50 , H01L24/81 , H01L2224/13099 , H01L2224/13111 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/45124 , H01L2224/81801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01029 , H01L2924/01033 , H01L2924/01038 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01055 , H01L2924/01056 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/15174 , H01L2924/15311 , H01L2924/15747 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/19103 , H01L2924/30105 , H01L2924/30107 , H01L2924/351 , H05K1/0231 , H05K1/145 , H05K1/183 , H05K2201/10378 , H01L2924/00 , H01L2224/48
摘要： An assembly includes a semiconductor device having surface-connecting terminals, a substrate having surface-connecting pads, and a capacitor having an approximately plate-shaped capacitor main body having a first surface on which the semiconductor device is mounted and a second surface at which the capacitor main body is mounted on the substrate and a plurality of electrically conductive vias penetrating the capacitor main body between the first and second surfaces and connected to the surface-connecting terminals and the surface-connecting pads.
摘要翻译：组件包括具有表面连接端子的半导体器件，具有表面连接焊盘的衬底和具有大致平板状电容器主体的电容器，该电容器主体具有安装半导体器件的第一表面和第二表面，电容器主体安装在基板上，并且在第一和第二表面之间穿过电容器主体并连接到表面连接端子和表面连接焊盘的多个导电通孔。

10. 发明授权

US07072169B2 Capacitor and method for manufacturing the same 失效
标题翻译：电容器及其制造方法
公开(公告)号：US07072169B2
公开(公告)日：2006-07-04
申请号：US11003767
申请日：2004-12-06
申请人： Kazuhiro Hayashi , Akifumi Tosa , Motohiko Sato , Jun Otsuka , Manabu Sato
发明人： Kazuhiro Hayashi , Akifumi Tosa , Motohiko Sato , Jun Otsuka , Manabu Sato
IPC分类号： H01G4/228
CPC分类号： H01G4/30 , H01G4/12
摘要： A laminated ceramic capacitor 10 divided into a first laminate 11, a second laminate 12, a third laminate 13, and a fourth laminate 14. The first laminate 11 includes a ceramic layer 15 serving as a dielectric layer. The ceramic layer 15 is thicker than a ceramic layer 17 sandwiched between internal electrodes 16a in the second laminate 12 or the fourth laminate 14, and thinner than 20 times the thickness of the ceramic layer 17. The third laminate 13 includes dielectric layers, which serve as the ceramic layers 17, and has a thickness of 5% of the total thickness of the second laminate 12 and the fourth laminate 14. Accordingly, the third laminate 13 achieves the function of absorbing an electrode-induced thickness differential. Also, by means of regulating the thickness of the first laminate 11, portions of via electrodes 18 that extend without being electrically connected to the internal electrodes 16b can be shortened.
摘要翻译：层叠陶瓷电容器10分为第一层压体11，第二层压体12，第三层压体13和第四层压体14.第一层压体11包括用作电介质层的陶瓷层15。陶瓷层15比夹在第二层叠体12或第四层叠体14的内部电极16a之间的陶瓷层17厚，比陶瓷层17的厚度薄20倍以上。第三层叠体13包括电介质层，用作陶瓷层17，并且具有第二层压体12和第四层压体14的总厚度的5％的厚度。因此，第三层压体13具有吸收电极引起的厚度差的功能。此外，通过调节第一层压体11的厚度，可以缩短延伸而不与内部电极16b电连接的通孔电极18的部分。

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