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    • 3. 发明授权
    • Method and apparatus for image formation that can handle simultaneously input data without causing a delay
    • 用于图像形成的方法和装置,其可以同时处理输入数据而不引起延迟
    • US06449064B1
    • 2002-09-10
    • US09247589
    • 1999-02-10
    • Yasuhiro HattoriNorio Michiie
    • Yasuhiro HattoriNorio Michiie
    • H04N100
    • H04N1/00384H04N1/00411H04N1/32358H04N1/32443H04N1/32512H04N1/32529H04N1/32587H04N1/32603H04N2201/0081H04N2201/0082H04N2201/0087H04N2201/3287
    • An image forming apparatus includes a plurality of memory devices, each including at least one image memory which stores image data. A controller controls input and output operations for the image data relative to the at least one image memory. An image reading device generates image data by scanning and reading an original document. At least one data input device inputs image data generated by an external source. A plurality of input paths transmit the image data generated by the image reading device and the image data input by the at least one data input device. An image memory switching device connects the plurality of input paths to the plurality of memory devices, receives the image data generated by the image reading device and the image data input by the at least one data input device, and switches the plurality of memory devices to transmit consecutive image data, which is consecutively sent through one of the plurality of input paths, to a same memory device among the plurality of memory devices when the image memory switching device receives the image data and the image data through the plurality of input paths.
    • 图像形成装置包括多个存储器件,每个存储器件包括存储图像数据的至少一个图像存储器。 控制器控制图像数据相对于至少一个图像存储器的输入和输出操作。 图像读取装置通过扫描和读取原稿来生成图像数据。 至少一个数据输入设备输入由外部源产生的图像数据。 多个输入路径发送由图像读取装置生成的图像数据和由至少一个数据输入装置输入的图像数据。 图像存储器切换装置将多个输入路径连接到多个存储装置,接收由图像读取装置生成的图像数据和由至少一个数据输入装置输入的图像数据,并将多个存储装置切换为 当图像存储器切换装置通过多个输入路径接收图像数据和图像数据时,将通过多个输入路径之一连续发送的连续图像数据发送到多个存储器件中的相同存储器件。
    • 10. 发明授权
    • Data processing apparatus and DMA data transfer method
    • 数据处理设备和DMA数据传输方式
    • US06708234B2
    • 2004-03-16
    • US09964464
    • 2001-09-28
    • Kiyotaka MotekiNorio MichiieYasuhiro HattoriHiromitsu ShimizuTakao Okamura
    • Kiyotaka MotekiNorio MichiieYasuhiro HattoriHiromitsu ShimizuTakao Okamura
    • G06F1328
    • G06F13/28
    • In a data processing apparatus, an image memory has a descriptor region and an image region, the image region storing a plurality of blocks of image data, the descriptor region storing a corresponding number of descriptor information blocks for the plurality of image data blocks. A DMA controller controls DMA data transfer of the image data blocks from the image region according to each descriptor information block in the descriptor region. The DMA controller comprises a register which stores one of the descriptor information blocks from the descriptor region of the image memory, and a control unit which determines, at a time of occurrence of a CPU interrupt, a start timing of a DMA data output operation of the DMA controller during a DMA data input operation of the DMA controller when an image editing request contained in input image data is received, the CPU interrupt being caused to occur by an interrupt request bit of the descriptor information block read from the register.
    • 在数据处理装置中,图像存储器具有描述符区域和图像区域,所述图像区域存储多个图像数据块,所述描述符区域存储用于所述多个图像数据块的相应数量的描述符信息块。 DMA控制器根据描述符区域中的每个描述符信息块来控制来自图像区域的图像数据块的DMA数据传输。 DMA控制器包括存储来自图像存储器的描述符区域的描述符信息块之一的寄存器,以及控制单元,其在执行CPU中断时确定DMA数据输出操作的开始定时 当接收到包含在输入图像数据中的图像编辑请求时DMA DMA控制器的DMA数据输入操作期间的DMA控制器,由从寄存器读取的描述符信息块的中断请求位引起CPU中断。