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1. 发明授权

US09275784B2 Electronic circuits using coupled multi-inductors 有权
标题翻译：使用耦合多电感器的电子电路
公开(公告)号：US09275784B2
公开(公告)日：2016-03-01
申请号：US14346299
申请日：2012-08-29
申请人： Mohammad Hekmat , Farshid Aryanfar , Kambiz Kaviani
发明人： Mohammad Hekmat , Farshid Aryanfar , Kambiz Kaviani
IPC分类号： H03B5/12 , H01F27/00 , H03B27/00 , H03K5/24
CPC分类号： H03B27/00 , H01F27/006 , H01F27/2804 , H03B5/1212 , H03B5/1215 , H03B5/1228 , H03B15/00 , H03K5/145 , H03K5/24 , H03K2005/00052
摘要： Coupled multi-inductors and their applications. An apparatus includes several circuit stages. Each circuit stage includes an inductive element that overlaps with the inductive elements of its adjacent circuit stages, forming a loop of coupled circuit stages. The apparatus may be, for example, a multi-phase oscillator with multiple oscillators that are magnetically coupled to each other for generating oscillation signals at different phases. The apparatus may also be, for example, a phase interpolator for combining input signals.
摘要翻译：耦合多电感及其应用。一种装置包括几个电路级。每个电路级包括与其相邻电路级的电感元件重叠的电感元件，形成耦合电路级的回路。该装置可以是例如具有彼此磁耦合的多个振荡器的多相振荡器，用于在不同相位产生振荡信号。该装置也可以是例如用于组合输入信号的相位插值器。

2. 发明申请

US20140218120A1 ELECTRONIC CIRCUITS USING COUPLED MULTI-INDUCTORS 有权
标题翻译：使用耦合多电感器的电子电路
公开(公告)号：US20140218120A1
公开(公告)日：2014-08-07
申请号：US14346299
申请日：2012-08-29
申请人： Mohammad Hekmat , Farshid Aryanfar , Kambiz Kaviani
发明人： Mohammad Hekmat , Farshid Aryanfar , Kambiz Kaviani
IPC分类号： H01F27/00 , H03K5/24 , H03B5/12
CPC分类号： H03B27/00 , H01F27/006 , H01F27/2804 , H03B5/1212 , H03B5/1215 , H03B5/1228 , H03B15/00 , H03K5/145 , H03K5/24 , H03K2005/00052
摘要： Coupled multi-inductors and their applications. An apparatus includes several circuit stages. Each circuit stage includes an inductive element that overlaps with the inductive elements of its adjacent circuit stages, forming a loop of coupled circuit stages. The apparatus may be, for example, a multi-phase oscillator with multiple oscillators that are magnetically coupled to each other for generating oscillation signals at different phases. The apparatus may also be, for example, a phase interpolator for combining input signals.
摘要翻译：耦合多电感及其应用。一种装置包括几个电路级。每个电路级包括与其相邻电路级的电感元件重叠的电感元件，形成耦合电路级的回路。该装置可以是例如具有彼此磁耦合的多个振荡器的多相振荡器，用于在不同相位产生振荡信号。该装置也可以是例如用于组合输入信号的相位插值器。

3. 发明授权

US08817863B2 Linear equalizer with passive network and embedded level shifter 有权
标题翻译：线性均衡器，无源网络和嵌入式电平转换器
公开(公告)号：US08817863B2
公开(公告)日：2014-08-26
申请号：US13357736
申请日：2012-01-25
申请人： Kambiz Kaviani , Jason Chia-Jen Wei , Farshid Aryanfar
发明人： Kambiz Kaviani , Jason Chia-Jen Wei , Farshid Aryanfar
IPC分类号： H03H7/30
CPC分类号： H04L25/03885
摘要： The disclosed embodiments relate to the design of a linear equalizer that supports low-power, high-speed data transfers. In some embodiments, this linear equalizer contains a passive network that provides selective frequency peaking in a frequency range associated with a falling edge of a frequency response of the channel. It also includes a level shifter coupled between the channel and the passive network, wherein the level shifter is an active component that provides amplification and/or level-shifting. Moreover, the linear equalizer is designed so that power from the level shifter facilitates the selective frequency peaking of the passive network.
摘要翻译：所公开的实施例涉及支持低功率，高速数据传输的线性均衡器的设计。在一些实施例中，该线性均衡器包含无源网络，其在与频道的频率响应的下降沿相关联的频率范围内提供选择性频率峰化。它还包括耦合在通道和无源网络之间的电平移位器，其中电平移位器是提供放大和/或电平转换的有源部件。此外，线性均衡器被设计成使得来自电平移位器的功率有助于无源网络的选择性频率峰化。

4. 发明申请

US20120200375A1 LINEAR EQUALIZER WITH PASSIVE NETWORK AND EMBEDDED LEVEL SHIFTER 有权
标题翻译：线性均衡器与被动网络和嵌入式电平变换器
公开(公告)号：US20120200375A1
公开(公告)日：2012-08-09
申请号：US13357736
申请日：2012-01-25
申请人： Kambiz Kaviani , Jason Chia-Jen Wei , Farshid Aryanfar
发明人： Kambiz Kaviani , Jason Chia-Jen Wei , Farshid Aryanfar
IPC分类号： H04B15/00
CPC分类号： H04L25/03885
摘要： The disclosed embodiments relate to the design of a linear equalizer that supports low-power, high-speed data transfers. In some embodiments, this linear equalizer contains a passive network that provides selective frequency peaking in a frequency range associated with a falling edge of a frequency response of the channel. It also includes a level shifter coupled between the channel and the passive network, wherein the level shifter is an active component that provides amplification and/or level-shifting. Moreover, the linear equalizer is designed so that power from the level shifter facilitates the selective frequency peaking of the passive network.
摘要翻译：所公开的实施例涉及支持低功率，高速数据传输的线性均衡器的设计。在一些实施例中，该线性均衡器包含无源网络，其在与频道的频率响应的下降沿相关联的频率范围内提供选择性频率峰化。它还包括耦合在通道和无源网络之间的电平移位器，其中电平移位器是提供放大和/或电平转换的有源部件。此外，线性均衡器被设计成使得来自电平移位器的功率有助于无源网络的选择性频率峰化。

5. 发明授权

US09606223B2 High-accuracy and low-power tracking system for mobile devices 有权
公开(公告)号：US09606223B2
公开(公告)日：2017-03-28
申请号：US14235783
申请日：2012-08-01
申请人： Farshid Aryanfar , Marko Aleksić , Kambiz Kaviani
发明人： Farshid Aryanfar , Marko Aleksić , Kambiz Kaviani
IPC分类号： G01S5/02 , G01S13/00 , G01S7/35 , G01S13/42 , G01S13/75
CPC分类号： G01S13/00 , G01S7/352 , G01S13/424 , G01S13/756
摘要： An electronic device for wirelessly tracking the position of a second electronic device is disclosed. The electronic device includes transceiver circuitry having a beacon generator to generate a beacon at a particular frequency and direction. An antenna array transmits the beacon, and receives at least one reflected beacon from the second electronic device. The reflected beacon is received if a position of the second electronic device lies within a range of directions of the beacon. The transceiver circuitry further includes an injection-locked oscillator having an input coupled to the antenna array to receive reflected beacons, and to lock to the reflected beacon when the reflected beacon has a frequency value within locking range of the oscillator. Processing circuitry coupled to the transceiver circuitry tracks the position of the second device based on the lock condition of the oscillator.

6. 发明申请

US20140176365A1 HIGH-ACCURACY AND LOW-POWER TRACKING SYSTEM FOR MOBILE DEVICES 有权
标题翻译：用于移动设备的高精度和低功率跟踪系统
公开(公告)号：US20140176365A1
公开(公告)日：2014-06-26
申请号：US14235783
申请日：2012-08-01
申请人： Farshid Aryanfar , Marko Aleksic , Kambiz Kaviani
发明人： Farshid Aryanfar , Marko Aleksic , Kambiz Kaviani
IPC分类号： G01S13/00
CPC分类号： G01S13/00 , G01S7/352 , G01S13/424 , G01S13/756
摘要： An electronic device for wirelessly tracking the position of a second electronic device is disclosed. The electronic device includes transceiver circuitry having a beacon generator to generate a beacon at a particular frequency and direction. An antenna array transmits the beacon, and receives at least one reflected beacon from the second electronic device. The reflected beacon is received if a position of the second electronic device lies within a range of directions of the beacon. The transceiver circuitry further includes an injection-locked oscillator having an input coupled to the antenna array to receive reflected beacons, and to lock to the reflected beacon when the reflected beacon has a frequency value within locking range of the oscillator. Processing circuitry coupled to the transceiver circuitry tracks the position of the second device based on the lock condition of the oscillator.
摘要翻译：公开了一种用于无线跟踪第二电子设备的位置的电子设备。电子设备包括具有信标发生器以在特定频率和方向上生成信标的收发器电路。天线阵列发送信标，并从第二电子设备接收至少一个反射信标。如果第二电子设备的位置位于信标的方向范围内，则接收到反射信标。收发器电路还包括注入锁定振荡器，其具有耦合到天线阵列的输入以接收反射信标，并且当反射的信标具有在振荡器的锁定范围内的频率值时锁定到反射的信标。耦合到收发器电路的处理电路基于振荡器的锁定状态跟踪第二设备的位置。

7. 发明申请

US20130063191A1 Methods and Circuits for Duty-Cycle Correction 审中-公开
标题翻译：用于周期校正的方法和电路
公开(公告)号：US20130063191A1
公开(公告)日：2013-03-14
申请号：US13612540
申请日：2012-09-12
申请人： Dinesh Patil , Mohammad Hekmat , Kambiz Kaviani , Amir Amirkhany
发明人： Dinesh Patil , Mohammad Hekmat , Kambiz Kaviani , Amir Amirkhany
IPC分类号： H03K3/017 , H03L7/08
CPC分类号： H03L7/0812 , H03K5/1565
摘要： A duty-cycle correction circuit calibrates the duty cycle of a periodic input signal. The correction circuit includes a state machine that samples the input signal using a sample signal of a sample period. The sample period is selected to scan a period of the input signal over a number of sample periods. The resultant difference between the number of high and low samples provides a measure of the duty cycle deviation from e.g. 50%. An adjustable delay circuit adjusts the relative timing of the rising and falling edges of the input signal, and thus the duty cycle, responsive to the measure of duty cycle.
摘要翻译：占空比校正电路校准周期性输入信号的占空比。校正电路包括使用采样周期的采样信号对输入信号进行采样的状态机。选择采样周期以在多个采样周期上扫描输入信号的周期。所得到的高和低样本数之间的差异提供了与例如数据的占空比偏差的度量。 50％。可调节延迟电路调整输入信号的上升沿和下降沿的相对定时，从而根据占空比的测量来调整占空比。

8. 发明授权

US09035677B2 High-speed low power stacked transceiver 有权
标题翻译：高速低功率堆叠收发器
公开(公告)号：US09035677B2
公开(公告)日：2015-05-19
申请号：US14130756
申请日：2012-06-11
申请人： Huy Nguyen , Kambiz Kaviani , Yohan Usthavvia Frans
发明人： Huy Nguyen , Kambiz Kaviani , Yohan Usthavvia Frans
IPC分类号： H03K19/0175 , H04L25/02 , H04L25/03
CPC分类号： H03K19/017509 , H04L25/0274 , H04L25/0282 , H04L25/0294 , H04L25/03146 , H04L25/03878
摘要： A transceiver includes a transmitter and receiver that form a series current path between two power-supply nodes. Powering both the transmitter and receiver with the same supply current saves power. The transmitter functions as a resistive load for the receiver, and thus performs useful work with power that would otherwise be dissipated as waste heat.
摘要翻译：收发器包括在两个电源节点之间形成串联电流路径的发射器和接收器。以相同的电源电流为发射机和接收机供电节省电力。发射器作为接收器的电阻负载起作用，因此可以用功率进行有用的工作，否则这些功率将作为废热消散。

9. 发明申请

US20130051162A1 CODED DIFFERENTIAL INTERSYMBOL INTERFERENCE REDUCTION 审中-公开
标题翻译：编码差分干扰减少
公开(公告)号：US20130051162A1
公开(公告)日：2013-02-28
申请号：US13636515
申请日：2011-03-14
申请人： Amir Amirkhany , Aliazam Abbasfar , Kambiz Kaviani , Wendemagegnehu Beyene , Carl Werner
发明人： Amir Amirkhany , Aliazam Abbasfar , Kambiz Kaviani , Wendemagegnehu Beyene , Carl Werner
IPC分类号： G11C7/22
CPC分类号： G11C7/1006 , G11C7/02
摘要： Encoder and decoder circuits that encode and decode a series of data words to/from a series of code words. The data words include L symbols. The code words include M symbols, where M is larger than L. A set of tightly coupled M links to convey respective symbols in each of the series of code words. The code words are selected such that between every two consecutive code words in a series of code words, an equal number of transitions from low to high and high to low occur on a subset of the M-links.
摘要翻译：编码器和解码器电路，用于对一系列代码字进行编码和解码一系列数据字。数据字包括L个符号。代码字包括M个符号，其中M大于L.一组紧密耦合的M个链路，用于在每一个码字序列中传送相应的符号。选择码字使得在一系列码字中的每两个连续码字之间，在M链路的子集上出现从低到高和高到低的相等数量的转换。

10. 发明授权

US07489176B2 Clock distribution circuit 有权
标题翻译：时钟分配电路
公开(公告)号：US07489176B2
公开(公告)日：2009-02-10
申请号：US11414766
申请日：2006-04-28
申请人： Kambiz Kaviani , Tsu-Ju Chin
发明人： Kambiz Kaviani , Tsu-Ju Chin
IPC分类号： G06F1/04
CPC分类号： G06F1/10
摘要： A circuit includes a clock generator to provide a clock signal, and a clock distribution circuit coupled to the clock generator and a plurality of pairs of outputs. The clock distribution circuit includes a plurality of adjustment circuits to generate a plurality of pairs of clock signals in accordance with the clock signal. A respective adjustment circuit in the plurality of adjustment circuits is to provide a respective pair of clock signals in the plurality of pairs of clock signals to a respective pair of outputs in the plurality of pairs of outputs. The respective pair of clock signals includes a first clock signal and a second clock signal. The first clock signal is a complement of the second clock signal and duty-cycle and skew errors in the first clock signal and the second clock signal are less than corresponding pre-determined values.
摘要翻译：电路包括提供时钟信号的时钟发生器和耦合到时钟发生器和多对输出的时钟分配电路。时钟分配电路包括多个调整电路，以根据时钟信号产生多对时钟信号。多个调整电路中的相应的调节电路是将多对时钟信号中的相应的一对时钟信号提供给多对输出中的相应输出对。相应的一对时钟信号包括第一时钟信号和第二时钟信号。第一时钟信号是第二时钟信号的补码，并且第一时钟信号和第二时钟信号中的占空比和偏斜误差小于相应的预定值。

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