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1. 发明授权

US07795675B2 Termination for trench MIS device 有权
标题翻译：沟槽MIS器件的终止
公开(公告)号：US07795675B2
公开(公告)日：2010-09-14
申请号：US11233145
申请日：2005-09-21
申请人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
发明人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
IPC分类号： H01L27/088
CPC分类号： H01L29/7813 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/42368 , H01L29/7811
摘要： A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. Preferably, the drain-drift region is formed at least in part by fabricating spacers on the sidewalls of the trench and implanting an N-type dopant between the sidewall spacers and through the bottom of the trench. The drain-drift region can be doped more heavily than the conventional “drift region” that is formed in an N-epitaxial layer. Thus, the device has a low on-resistance. The device can be terminated by a plurality of polysilicon-filled termination trenches located near the edge of the die, with the polysilicon in each termination trench being connected to the mesa adjacent the termination trench.
摘要翻译：沟槽MIS器件形成在覆盖在N外延层和N +衬底上的P外延层中。在一个实施例中，器件包括从沟槽的底部延伸到N外延层的N型漏 - 漂移区。优选地，漏极漂移区域至少部分地通过在沟槽的侧壁上制造间隔物并且在侧壁间隔物之间并通过沟槽的底部注入N型掺杂剂而形成。漏极漂移区可以比在N外延层中形成的常规“漂移区”更重的掺杂。因此，器件具有低导通电阻。该器件可以由位于管芯边缘附近的多个多晶硅填充的端接沟槽端接，每个端接沟槽中的多晶硅与邻近端接沟槽的台面连接。

2. 发明授权

US07268032B2 Termination for trench MIS device having implanted drain-drift region 有权
标题翻译：具有植入漏极漂移区域的沟槽MIS器件的端接
公开(公告)号：US07268032B2
公开(公告)日：2007-09-11
申请号：US11232613
申请日：2005-09-21
申请人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
发明人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
IPC分类号： H01L21/8238
CPC分类号： H01L29/7813 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/42368 , H01L29/7811
摘要： A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. Preferably, the drain-drift region is formed at least in part by fabricating spacers on the sidewalls of the trench and implanting an N-type dopant between the sidewall spacers and through the bottom of the trench. The drain-drift region can be doped more heavily than the conventional “drift region” that is formed in an N-epitaxial layer. Thus, the device has a low on-resistance. The device can be terminated by a plurality of polysilicon-filled termination trenches located near the edge of the die, with the polysilicon in each termination trench being connected to the mesa adjacent the termination trench. The polysilicon material in each termination trenches.
摘要翻译：沟槽MIS器件形成在覆盖在N外延层和N +衬底上的P外延层中。在一个实施例中，器件包括从沟槽的底部延伸到N外延层的N型漏 - 漂移区。优选地，漏极漂移区域至少部分地通过在沟槽的侧壁上制造间隔物并且在侧壁间隔物之间并通过沟槽的底部注入N型掺杂剂而形成。漏极漂移区可以比在N外延层中形成的常规“漂移区”更重的掺杂。因此，器件具有低导通电阻。该器件可以由位于管芯边缘附近的多个多晶硅填充的端接沟槽端接，每个端接沟槽中的多晶硅与邻近端接沟槽的台面连接。每个终端沟槽中的多晶硅材料。

3. 发明授权

US07045857B2 Termination for trench MIS device having implanted drain-drift region 有权
公开(公告)号：US07045857B2
公开(公告)日：2006-05-16
申请号：US10810031
申请日：2004-03-26
申请人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
发明人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi , Qufei Chen
IPC分类号： H01L29/76 , H01L29/00
CPC分类号： H01L29/7813 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/42368 , H01L29/7811
摘要： A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. Preferably, the drain-drift region is formed at least in part by fabricating spacers on the sidewalls of the trench and implanting an N-type dopant between the sidewall spacers and through the bottom of the trench. The drain-drift region can be doped more heavily than the conventional “drift region” that is formed in an N-epitaxial layer. Thus, the device has a low on-resistance. The device can be terminated by a plurality of polysilicon-filled termination trenches located near the edge of the die, with the polysilicon in each termination trench being connected to the mesa adjacent the termination trench. The polysilicon material in each termination trenches.

4. 发明授权

US07435650B2 Process for manufacturing trench MIS device having implanted drain-drift region and thick bottom oxide 有权
标题翻译：用于制造具有注入漏极漂移区域和厚底部氧化物的沟槽MIS器件的工艺
公开(公告)号：US07435650B2
公开(公告)日：2008-10-14
申请号：US10872931
申请日：2004-06-21
申请人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi
发明人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L21/2253 , H01L21/28185 , H01L21/28194 , H01L21/28211 , H01L21/823487 , H01L29/0634 , H01L29/0847 , H01L29/086 , H01L29/0878 , H01L29/1095 , H01L29/42368
摘要： A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes a thick oxide layer at the bottom of the trench and an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. The thick insulating layer reduces the capacitance between the gate and the drain and therefore improves the ability of the device to operate at high frequencies. Preferably, the drain-drift region is formed at least in part by fabricating spacers on the sidewalls of the trench and implanting an N-type dopant between the sidewall spacers and through the bottom of the trench. The thick bottom oxide layer is formed on the bottom of the trench while the sidewall spacers are still in place. The drain-drift region can be doped more heavily than the conventional “drift region” that is formed in an N-epitaxial layer. Thus, the device has a low on-resistance. The N-epitaxial layer increases the breakdown voltage of the MIS device. In alternative embodiments, the thick bottom oxide layer can be omitted.
摘要翻译：沟槽MIS器件形成在覆盖在N外延层和N +衬底上的P外延层中。在一个实施例中，器件包括在沟槽底部的厚氧化物层和从沟槽的底部延伸到N外延层的N型漏 - 漂移区。厚的绝缘层减小了栅极和漏极之间的电容，从而提高了器件在高频下工作的能力。优选地，漏极漂移区域至少部分地通过在沟槽的侧壁上制造间隔物并且在侧壁间隔物之间并通过沟槽的底部注入N型掺杂剂而形成。厚的底部氧化物层形成在沟槽的底部，同时侧壁间隔物仍然在位。漏极漂移区可以比在N外延层中形成的常规“漂移区”更重的掺杂。因此，器件具有低导通电阻。 N外延层增加了MIS器件的击穿电压。在替代实施例中，可以省略厚的底部氧化物层。

5. 发明授权

US07291884B2 Trench MIS device having implanted drain-drift region and thick bottom oxide 有权
标题翻译：沟槽MIS器件具有植入漏极漂移区域和厚底部氧化物
公开(公告)号：US07291884B2
公开(公告)日：2007-11-06
申请号：US10454031
申请日：2003-06-04
申请人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi
发明人： Mohamed N. Darwish , Kyle W. Terrill , Jainhai Qi
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L21/2253 , H01L21/28185 , H01L21/28194 , H01L21/28211 , H01L21/823487 , H01L29/0634 , H01L29/0847 , H01L29/086 , H01L29/0878 , H01L29/1095 , H01L29/42368
摘要： A trench MIS device is formed in a P-epitaxial layer that overlies an N-epitaxial layer and an N+ substrate. In one embodiment, the device includes a thick oxide layer at the bottom of the trench and an N-type drain-drift region that extends from the bottom of the trench to the N-epitaxial layer. The thick insulating layer reduces the capacitance between the gate and the drain and therefore improves the ability of the device to operate at high frequencies. Preferably, the drain-drift region is formed at least in part by fabricating spacers on the sidewalls of the trench and implanting an N-type dopant between the sidewall spacers and through the bottom of the trench. The thick bottom oxide layer is formed on the bottom of the trench while the sidewall spacers are still in place. The drain-drift region can be doped more heavily than the conventional “drift region” that is formed in an N-epitaxial layer. Thus, the device has a low on-resistance. The N-epitaxial layer increases the breakdown voltage of the MIS device. In alternative embodiments, the thick bottom oxide layer can be omitted.
摘要翻译：沟槽MIS器件形成在覆盖在N外延层和N +衬底上的P外延层中。在一个实施例中，器件包括在沟槽底部的厚氧化物层和从沟槽的底部延伸到N外延层的N型漏 - 漂移区。厚的绝缘层减小了栅极和漏极之间的电容，从而提高了器件在高频下工作的能力。优选地，漏极漂移区域至少部分地通过在沟槽的侧壁上制造间隔物并且在侧壁间隔物之间并通过沟槽的底部注入N型掺杂剂而形成。厚的底部氧化物层形成在沟槽的底部，同时侧壁间隔物仍然在位。漏极漂移区可以比在N外延层中形成的常规“漂移区”更重的掺杂。因此，器件具有低导通电阻。 N外延层增加了MIS器件的击穿电压。在替代实施例中，可以省略厚的底部氧化物层。

6. 发明授权

US08680607B2 Trench gated power device with multiple trench width and its fabrication process 有权
标题翻译：具有多沟槽宽度的沟槽门控功率器件及其制造工艺
公开(公告)号：US08680607B2
公开(公告)日：2014-03-25
申请号：US13525908
申请日：2012-06-18
申请人： Jun Zeng , Mohamed N. Darwish
发明人： Jun Zeng , Mohamed N. Darwish
IPC分类号： H01L29/78
CPC分类号： H01L29/7813 , H01L29/0623 , H01L29/063 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/404 , H01L29/407 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/66719 , H01L29/66727 , H01L29/66734
摘要： Power devices, and related process, where both gate and field plate trenches have multiple stepped widths, using self-aligned process steps.
摘要翻译：功率器件和相关工艺，其中栅极和场板沟槽都具有多个阶梯宽度，采用自对准工艺步骤。

7. 发明授权

US08344451B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08344451B2
公开(公告)日：2013-01-01
申请号：US11971152
申请日：2008-01-08
申请人： Mohamed N. Darwish
发明人： Mohamed N. Darwish
IPC分类号： H01L29/66
CPC分类号： H01L29/7802 , H01L21/02164 , H01L21/0217 , H01L21/02321 , H01L21/2003 , H01L21/265 , H01L21/2658 , H01L21/26586 , H01L21/28008 , H01L21/30604 , H01L21/324 , H01L21/76224 , H01L21/823885 , H01L29/0619 , H01L29/0634 , H01L29/0649 , H01L29/0653 , H01L29/0661 , H01L29/0692 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/408 , H01L29/4236 , H01L29/42368 , H01L29/66537 , H01L29/66666 , H01L29/66734 , H01L29/7809 , H01L29/7811 , H01L29/7813 , H01L29/7827 , H01L29/7835
摘要： A semiconductor device includes a semiconductor layer of a first conductivity type having a first surface and a second surface, a source region disposed on the first surface, a gate region disposed on the first surface adjacent the source region, and a drain region disposed on the first surface. The semiconductor device also includes a pair of charge control trenches disposed between the gate region and the drain region. Each of the pair of charge control trenches is characterized by a width and includes a first dielectric material disposed therein and a second material disposed internal to the first dielectric material. Additionally, a concentration of doping impurities present in the semiconductor layer of the first conductivity type and a distance between the pair of charge control trenches define an electrical characteristic of the semiconductor device that is independent of the width of each of the pair of charge control trenches.
摘要翻译：半导体器件包括具有第一表面和第二表面的第一导电类型的半导体层，设置在第一表面上的源极区域，设置在与源极区域相邻的第一表面上的栅极区域和设置在源极区域上的漏极区域第一表面。半导体器件还包括设置在栅极区域和漏极区域之间的一对电荷控制沟槽。一对电荷控制沟槽中的每一个的特征在于宽度并且包括设置在其中的第一电介质材料和设置在第一电介质材料内部的第二材料。此外，存在于第一导电类型的半导体层中的掺杂杂质的浓度和一对电荷控制沟槽之间的距离限定了与一对电荷控制沟槽中的每一个的宽度无关的半导体器件的电特性。

8. 发明申请

US20120187473A1 Edge Termination With Improved Breakdown Voltage 有权
标题翻译：边缘终端具有改进的击穿电压
公开(公告)号：US20120187473A1
公开(公告)日：2012-07-26
申请号：US13085317
申请日：2011-04-12
申请人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
发明人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
IPC分类号： H01L29/78 , H01L29/02
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/41741 , H01L29/4238
摘要： A MOSFET switch which has a low surface electric field at an edge termination area, and also has increased breakdown voltage. The MOSFET switch has a new edge termination structure employing an N-P-N sandwich structure. The MOSFET switch also has a polysilicon field plate configuration operative to enhance any spreading of any depletion layer located at an edge of a main PN junction of the N-P-N sandwich structure.
摘要翻译： MOSFET开关，其在边缘终端区域具有低表面电场，并且还具有增加的击穿电压。 MOSFET开关具有采用N-P-N夹层结构的新边缘端接结构。 MOSFET开关还具有可操作地增强位于N-P-N夹层结构的主PN结的边缘处的任何耗尽层的任何扩展的多晶硅场板结构。

9. 发明授权

US08203180B2 Devices containing permanent charge 有权
标题翻译：设备包含永久充电
公开(公告)号：US08203180B2
公开(公告)日：2012-06-19
申请号：US13114224
申请日：2011-05-24
申请人： Mohamed N. Darwish , Amit Paul
发明人： Mohamed N. Darwish , Amit Paul
IPC分类号： H01L29/66
CPC分类号： H01L29/7811 , H01L21/2256 , H01L21/2257 , H01L21/26506 , H01L21/26513 , H01L21/2658 , H01L21/26586 , H01L29/0615 , H01L29/0619 , H01L29/0638 , H01L29/0653 , H01L29/1095 , H01L29/402 , H01L29/408 , H01L29/41741 , H01L29/42368 , H01L29/66734 , H01L29/7813 , H01L29/7827
摘要： An edge termination structure includes a final dielectric trench containing permanent charge. The final dielectric trench is surrounded by first conductivity type semiconductor material (doped by lateral outdiffusion from the trenches), which in turn is laterally surrounded by second conductivity type semiconductor material.
摘要翻译：边缘终端结构包括包含永久电荷的最终介电沟槽。最终的电介质沟槽由第一导电类型的半导体材料（从沟槽的侧向外扩散掺杂）围绕，其又由第二导电型半导体材料横向包围。

10. 发明授权

US07923804B2 Edge termination with improved breakdown voltage 有权
标题翻译：边缘端接，具有改善的击穿电压
公开(公告)号：US07923804B2
公开(公告)日：2011-04-12
申请号：US12367716
申请日：2009-02-09
申请人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
发明人： Jun Zeng , Mohamed N. Darwish , Shih-Tzung Su
IPC分类号： H01L27/095 , H01L29/47 , H01L29/812 , H01L31/07 , H01L31/108
CPC分类号： H01L29/7811 , H01L29/0615 , H01L29/0619 , H01L29/0623 , H01L29/0634 , H01L29/0661 , H01L29/0696 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/41741 , H01L29/4238
摘要： A MOSFET switch which has a low surface electric field at an edge termination area, and also has increased breakdown voltage. The MOSFET switch has a new edge termination structure employing an N-P-N sandwich structure. The MOSFET switch also has a polysilicon field plate configuration operative to enhance any spreading of any depletion layer located at an edge of a main PN junction of the N-P-N sandwich structure.
摘要翻译： MOSFET开关，其在边缘终端区域具有低表面电场，并且还具有增加的击穿电压。 MOSFET开关具有采用N-P-N夹层结构的新边缘端接结构。 MOSFET开关还具有可操作地增强位于N-P-N夹层结构的主PN结的边缘处的任何耗尽层的任何扩展的多晶硅场板结构。

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