专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20080100566A1 Electrooptic device and electronic apparatus 有权
标题翻译：电光设备和电子设备
公开(公告)号：US20080100566A1
公开(公告)日：2008-05-01
申请号：US11923959
申请日：2007-10-25
申请人： Mitsutoshi Miyasaka , Nobuhiko Kenmochi
发明人： Mitsutoshi Miyasaka , Nobuhiko Kenmochi
IPC分类号： G09G3/34
CPC分类号： G09G3/3446 , G09G2300/0426 , G09G2300/0439 , G09G2300/0842 , G09G2310/0251 , G09G2320/029
摘要： An electrooptic device having an image display period and an information gathering period includes a panel unit and a data processing unit. The panel unit includes a first substrate, a second substrate, an electrooptic material interposed between the first and second substrates, a plurality of first scan lines provided above the first substrate, a plurality of second scan lines provided above the first substrate and disposed in parallel to the first scan lines, a plurality of signal lines provided above the first substrate and intersecting the first scan lines and the second scan lines, and a plurality of pixels provided above the first substrate and disposed at intersections of the first scan lines and the second scan lines and signal lines. Each pixel located in an i-th row and a j-th column (i and j are both natural numbers) includes a first transistor, a second transistor, and a pixel electrode. The plurality of pixels are formed in a matrix on the first substrate. A gate of the first transistor is coupled to the first scan line in the i-th row. One of a source and a drain of the first transistor is coupled to the signal line on the j-th column. A gate of the second transistor is coupled to the second scan line in the i-th row. One of a source and a drain of the second transistor is coupled to the other of the source and drain of the first transistor. The other of the source and drain of the first transistor is coupled to the pixel electrode.
摘要翻译：具有图像显示周期和信息收集周期的电光装置包括面板单元和数据处理单元。面板单元包括第一基板，第二基板，插入在第一和第二基板之间的电光材料，设置在第一基板上方的多个第一扫描线，设置在第一基板上方并且平行设置的多个第二扫描线设置在第一基板上并与第一扫描线和第二扫描线相交的多个信号线，以及设置在第一基板上方并设置在第一扫描线和第二扫描线的第二扫描线的交点处的多个像素扫描线和信号线。位于第i行和第j列（i和j都是自然数）的每个像素包括第一晶体管，第二晶体管和像素电极。多个像素在第一基板上以矩阵形式形成。第一晶体管的栅极耦合到第i行中的第一扫描线。第一晶体管的源极和漏极之一耦合到第j列上的信号线。第二晶体管的栅极耦合到第i行中的第二扫描线。第二晶体管的源极和漏极之一耦合到第一晶体管的源极和漏极中的另一个。第一晶体管的源极和漏极中的另一个耦合到像素电极。

2. 发明授权

US07961171B2 Electrooptic device and electronic apparatus 有权
标题翻译：电光设备和电子设备
公开(公告)号：US07961171B2
公开(公告)日：2011-06-14
申请号：US11923959
申请日：2007-10-25
申请人： Mitsutoshi Miyasaka , Nobuhiko Kenmochi
发明人： Mitsutoshi Miyasaka , Nobuhiko Kenmochi
IPC分类号： G09G3/36
CPC分类号： G09G3/3446 , G09G2300/0426 , G09G2300/0439 , G09G2300/0842 , G09G2310/0251 , G09G2320/029
摘要： An electrooptic device having an image display period and an information gathering period includes a panel unit and a data processing unit. The panel unit includes a first substrate, a second substrate, an electrooptic material interposed between the first and second substrates, a plurality of first scan lines provided above the first substrate, a plurality of second scan lines provided above the first substrate and disposed in parallel to the first scan lines, a plurality of signal lines provided above the first substrate and intersecting the first scan lines and the second scan lines, and a plurality of pixels provided above the first substrate and disposed at intersections of the first scan lines and the second scan lines and signal lines. Each pixel located in an i-th row and a j-th column (i and j are both natural numbers) includes a first transistor, a second transistor, and a pixel electrode. The plurality of pixels are formed in a matrix on the first substrate. A gate of the first transistor is coupled to the first scan line in the i-th row. One of a source and a drain of the first transistor is coupled to the signal line on the j-th column. A gate of the second transistor is coupled to the second scan line in the i-th row. One of a source and a drain of the second transistor is coupled to the other of the source and drain of the first transistor. The other of the source and drain of the first transistor is coupled to the pixel electrode.
摘要翻译：具有图像显示周期和信息收集周期的电光装置包括面板单元和数据处理单元。面板单元包括第一基板，第二基板，插入在第一和第二基板之间的电光材料，设置在第一基板上方的多个第一扫描线，设置在第一基板上方并且平行设置的多个第二扫描线设置在第一基板上并与第一扫描线和第二扫描线相交的多个信号线，以及设置在第一基板上方并设置在第一扫描线和第二扫描线的第二扫描线的交点处的多个像素扫描线和信号线。位于第i行和第j列（i和j都是自然数）的每个像素包括第一晶体管，第二晶体管和像素电极。多个像素在第一基板上以矩阵形式形成。第一晶体管的栅极耦合到第i行中的第一扫描线。第一晶体管的源极和漏极之一耦合到第j列上的信号线。第二晶体管的栅极耦合到第i行中的第二扫描线。第二晶体管的源极和漏极之一耦合到第一晶体管的源极和漏极中的另一个。第一晶体管的源极和漏极中的另一个耦合到像素电极。

3. 发明授权

US07755711B2 Liquid crystal device and electronic apparatus 有权
标题翻译：液晶装置及电子仪器
公开(公告)号：US07755711B2
公开(公告)日：2010-07-13
申请号：US11956095
申请日：2007-12-13
申请人： Nobuhiko Kenmochi , Mitsutoshi Miyasaka
发明人： Nobuhiko Kenmochi , Mitsutoshi Miyasaka
IPC分类号： G02F1/136
CPC分类号： G02F1/13624 , G02F1/13338 , G02F1/136209 , G02F2001/13312 , G06F3/0412 , G06F3/042
摘要： A liquid crystal device includes: a first scan line, a second scan line parallel to first scan line, a signal line intersecting the first scan line, a pixel arranged in a matrix; and a first light-shielding film. The pixel includes: a first transistor having a gate coupled to the first scan line, a source, and a drain, wherein either the source or drain is coupled to the signal line; a pixel electrode coupled to remaining source or drain of the first transistor; a common electrode disposed facing the pixel electrode; a liquid crystal layer disposed between the pixel electrode and common electrode; a second transistor having a gate coupled to the second scan line, wherein a source or drain of the second transistor is coupled to a source or drain of the first transistor, and the other source or drain is coupled to a power source line.
摘要翻译：液晶装置包括：第一扫描线，与第一扫描线平行的第二扫描线，与第一扫描线相交的信号线，以矩阵排列的像素; 和第一遮光膜。像素包括：具有耦合到第一扫描线的栅极的第一晶体管，源极和漏极，其中源极或漏极耦合到信号线; 耦合到所述第一晶体管的剩余源极或漏极的像素电极; 与所述像素电极相对设置的公共电极; 设置在像素电极和公共电极之间的液晶层; 第二晶体管，具有耦合到第二扫描线的栅极，其中第二晶体管的源极或漏极耦合到第一晶体管的源极或漏极，而另一个源极或漏极耦合到电源线。

4. 发明授权

US08248697B2 Method for manufacturing an optical element to polarize and split incident light 有权
标题翻译：光学元件的制造方法，用于使入射光偏振和分离
公开(公告)号：US08248697B2
公开(公告)日：2012-08-21
申请号：US12633981
申请日：2009-12-09
申请人： Nobuhiko Kenmochi
发明人： Nobuhiko Kenmochi
IPC分类号： G02B5/30
CPC分类号： B29D11/00634 , G02B5/1857 , G02B5/1861 , G02B5/3058
摘要： A method for manufacturing an optical element that has a function to polarize and split incident light includes: a) forming a grid portion on a face of a substrate in a plural number with a predetermined pitch; b) forming a diffractive structure resist pattern on the face of the substrate; c) forming the diffractive structure by etching the substrate anisotropically in a thickness direction with the diffractive structure resist pattern; and d) forming a fine line on the grid portion by depositing a reflective material from an oblique direction onto the face of the substrate where the diffractive structure is provided.
摘要翻译：具有使入射光偏振和分离功能的光学元件的制造方法包括：a）以预定间距在多个基板的表面上形成格栅部分; b）在所述基材的表面上形成衍射结构抗蚀剂图案; c）通过用衍射结构抗蚀剂图案在厚度方向上各向异性地蚀刻所述衬底来形成所述衍射结构; 以及d）通过从倾斜方向沉积反射材料到设置有衍射结构的基板的表面上，在栅格部分上形成细线。

5. 发明授权

US07061975B2 Noncyclic digital filter and radio reception apparatus comprising the filter 失效
标题翻译：非循环数字滤波器和包括滤波器的无线电接收装置
公开(公告)号：US07061975B2
公开(公告)日：2006-06-13
申请号：US09913791
申请日：2000-12-18
申请人： Nobuhiko Kenmochi
发明人： Nobuhiko Kenmochi
IPC分类号： H03K1/159 , G06F17/15 , H04B1/707
CPC分类号： H04B1/7093 , G11C19/00
摘要： In accordance with the invention, in a nonrecursive digital filter, the number of times each bit of input data passes through a shift register is reduced to save power. Despreading data is sent to a first shift register and a second shift register, each having a number of stages obtained by dividing the usual number of stages by two, and both shift registers alternately perform a shift operation at both edges of a shift clock. Multiplexers are provided for selecting the odd-numbered codes of reference codes stored in a reference-code register when the shift clock is in an OFF state and for selecting the even-numbered codes when the shift clock is in an ON state, and multiplexers are provided that perform the selections analogous to the above. The exclusive-OR output of the output of each stage of the first shift register and the outputs of the multiplexers, and the exclusive-OR output of the output of each stage of the second shift register, and the outputs of the multiplexers are added by the adder to obtain a correlation-strength output.
摘要翻译：根据本发明，在非递归数字滤波器中，减少输入数据的每一位通过移位寄存器的次数以节省功率。解扩数据被发送到第一移位寄存器和第二移位寄存器，每个移位寄存器和第二移位寄存器具有通过将通常的级数除以2而获得的级数，并且两个移位寄存器在移位时钟的两个边沿交替执行移位操作。提供多路复用器，用于当移位时钟处于OFF状态时选择存储在参考码寄存器中的奇数编码代码，并且当移位时钟处于ON状态时选择偶数代码，并且多路复用器是只要执行类似于上述的选择。第一移位寄存器的每一级的输出和多路复用器的输出的异或输出，以及第二移位寄存器的每一级的输出的异或输出和多路复用器的输出相加，加法器来获得相关强度输出。

6. 发明授权

US06587452B1 High performance signal structure with multiple modulation formats 有权
标题翻译：具有多种调制格式的高性能信号结构
公开(公告)号：US06587452B1
公开(公告)日：2003-07-01
申请号：US09224722
申请日：1999-01-04
申请人： Sorin Davidovici , Emmanuel Kanterakis , Izumi Iida , Norio Hama , Nobuhiko Kenmochi
发明人： Sorin Davidovici , Emmanuel Kanterakis , Izumi Iida , Norio Hama , Nobuhiko Kenmochi
IPC分类号： H04Q728
CPC分类号： H03G3/3042 , H04W52/34
摘要： A mapping memory, for use with a transmitter, for mapping a first signal segment and a second signal segment of a packet so that each signal segment has the same average power level. Each signal segment is characterized by a different modulation format. The first signal segment might use BPSK, while the second signal segment might use QAM, having multiple amplitude levels.
摘要翻译：用于与发射机一起使用的映射存储器，用于映射分组的第一信号段和第二信号段，使得每个信号段具有相同的平均功率电平。每个信号段的特征在于不同的调制格式。第一信号段可以使用BPSK，而第二信号段可以使用具有多个幅度电平的QAM。

7. 发明授权

US06212244B1 Fast response automatic gain control 失效
标题翻译：快速响应自动增益控制
公开(公告)号：US06212244B1
公开(公告)日：2001-04-03
申请号：US09005071
申请日：1998-01-09
申请人： Sorin Davidovici , Emmanuel Kanterakis , Izumi Iida , Norio Hama , Nobuhiko Kenmochi
发明人： Sorin Davidovici , Emmanuel Kanterakis , Izumi Iida , Norio Hama , Nobuhiko Kenmochi
IPC分类号： H04L2708
CPC分类号： H04W52/52 , H03G3/3052
摘要： A two-step automatic-gain-control (AGC) loop for use with a receiver. An AGC amplifier amplifies a received signal. From an output signal from the AGC amplifier, a received-signal-strength-indicator (RSSI) circuit generates an RSSI signal proportional to a received-signal-power level of the received signal. An RSSI-mapping circuit has an RSSI-mapping table. From the RSSI signal, the RSSI-mapping circuit, using the RSSI-mapping table, generates an AGC signal. An AGC-storing circuit stores the AGC signal. The AGC amplifier uses the stored-AGC signal to adjust the AGC gain. A converter circuit converts the output signal from the AGC amplifier to an in-phase component and a quadrature-phase component at a processing frequency. The error circuit determines an error signal from the in-phase component and the quadrature-phase component. When the error signal indicates the in-phase component and the quadrature-phase component are high, the integrate-and-dump circuit increments a counter of the integrate-and-dump circuit. When the error signal indicates the in-phase component and the quadrature-phase component are low, the integrate-and-dump circuit decrements the counter of the integrate-and-dump circuit. An AGC-convergence-rate multiplier normalizes an output of the integrate-and-dump circuit, thereby generating a normalized signal. The AGC-storing circuit updates the AGC signal from the normalized signal. From the updated AGC signal, the AGC circuit adjusts the AGC gain.
摘要翻译：用于接收机的两步自动增益控制（AGC）回路。 AGC放大器放大接收信号。从AGC放大器的输出信号，接收信号强度指示器（RSSI）电路产生与接收信号的接收信号功率电平成比例的RSSI信号。 RSSI映射电路具有RSSI映射表。根据RSSI信号，使用RSSI映射表的RSSI映射电路产生AGC信号。 AGC存储电路存储AGC信号。 AGC放大器使用存储的AGC信号来调整AGC增益。 A转换器电路将来自AGC放大器的输出信号以处理频率转换成同相分量和正交相分量。误差电路确定来自同相分量和正交相分量的误差信号。当误差信号表示同相分量且正交相位分量较高时，积分和转储电路会增加积分和转储电路的计数器。当误差信号表示同相分量并且正交相位分量低时，积分和转储电路使积分和转储电路的计数器递减。 AGC收敛速率乘法器对积分和转储电路的输出进行归一化，从而产生归一化信号。 AGC存储电路从归一化信号更新AGC信号。 AGC电路根据更新的AGC信号调整AGC增益。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式