专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US07992445B2 Pressure sensor 有权
标题翻译：压力传感器
公开(公告)号：US07992445B2
公开(公告)日：2011-08-09
申请号：US12441620
申请日：2007-09-27
申请人： Mitsuru Kobayashi , Hiroshi Inoue , Hitoshi Makinaga , Junji Imai , Yasufumi Masaki , Naoto Ikegawa , Youichiro Nakahara
发明人： Mitsuru Kobayashi , Hiroshi Inoue , Hitoshi Makinaga , Junji Imai , Yasufumi Masaki , Naoto Ikegawa , Youichiro Nakahara
IPC分类号： G01L9/12
CPC分类号： G01L9/0075
摘要： In a pressure sensor including a pressure detecting element in an intermediate portion or at a deep side of a through hole formed in a protrusion, a body portion (a base portion and the protrusion) is made of ceramic or an insulative resin material and molded into a predetermined shape, and the pressure sensor is constituted as a molded interconnect device in which a conductive pattern is formed on a surface thereof. Accordingly, a smaller pressure sensor can be obtained.
摘要翻译：在包括形成在突起中的通孔的中间部分或深侧的压力检测元件的压力传感器中，主体部（基部和突起）由陶瓷或绝缘树脂材料制成并成型为预定形状，并且压力传感器构成为其表面上形成有导电图案的模制互连装置。因此，可以获得较小的压力传感器。

2. 发明申请

US20090266173A1 PRESSURE SENSOR 有权
标题翻译：压力传感器
公开(公告)号：US20090266173A1
公开(公告)日：2009-10-29
申请号：US12441620
申请日：2007-09-27
申请人： Mitsuru Kobayashi , Hiroshi Inoue , Hitoshi Makinaga , Junji Imai , Yasufumi Masaki , Naoto Ikegawa , Youichiro Nakahara
发明人： Mitsuru Kobayashi , Hiroshi Inoue , Hitoshi Makinaga , Junji Imai , Yasufumi Masaki , Naoto Ikegawa , Youichiro Nakahara
IPC分类号： G01L9/12
CPC分类号： G01L9/0075
摘要： In a pressure sensor including a pressure detecting element in an intermediate portion or at a deep side of a through hole formed in a protrusion, a body portion (a base portion and the protrusion) is made of ceramic or an insulative resin material and molded into a predetermined shape, and the pressure sensor is constituted as a molded interconnect device in which a conductive pattern is formed on a surface thereof. Accordingly, a smaller pressure sensor can be obtained.
摘要翻译：在包括形成在突起中的通孔的中间部分或深侧的压力检测元件的压力传感器中，主体部（基部和突起）由陶瓷或绝缘树脂材料制成并成型为预定形状，并且压力传感器构成为其表面上形成有导电图案的模制互连装置。因此，可以获得较小的压力传感器。

3. 发明申请

US20100263921A1 CIRCUIT BOARD AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：电路板及其制造方法
公开(公告)号：US20100263921A1
公开(公告)日：2010-10-21
申请号：US12741105
申请日：2008-11-04
申请人： Youichiro Nakahara , Naoto Ikegawa , Kyohei Uemura , Yoshiyuki Uchinono
发明人： Youichiro Nakahara , Naoto Ikegawa , Kyohei Uemura , Yoshiyuki Uchinono
IPC分类号： H05K1/09 , H05K3/46
CPC分类号： H05K3/027 , H05K3/108 , H05K3/244 , H05K2201/09363 , H05K2203/0723 , H05K2203/107
摘要： A circuit board includes: an insulating substrate; and a circuit formed on the insulating substrate. The circuit includes: a undercoat layer with a circuit pattern formed by irradiating a metal thin film covering a surface of the insulating substrate with a laser along an outer shape of the circuit so as to partly remove the metal thin film along the outer shape of the circuit; a Cu plating layer, a Ni plating layer and a Au plating layer formed by metal plating and sequentially provided on a surface of the undercoat layer. A first middle plating layer and a second middle plating layer are provided between the Ni plating layer and the Au plating layer. The first middle plating layer includes metal with a less noble standard electrode potential with respect to Au and is in contact with the Au plating layer. The second middle plating layer includes metal with a noble standard electrode potential with respect to the metal in the first middle plating layer and is in contact with the first middle plating layer.
摘要翻译：电路板包括：绝缘基板; 以及形成在绝缘基板上的电路。该电路包括：具有电路图案的底涂层，其通过沿电路的外形以激光照射覆盖绝缘基板的表面的金属薄膜而形成，以沿着外部形状部分去除金属薄膜电路 Cu镀层，Ni镀层和通过金属电镀形成的Au镀层，并依次设置在底涂层的表面上。在Ni镀层和Au镀层之间设置第一中间镀层和第二中间镀层。第一中间镀层包括相对于Au具有较低贵族标准电极电位的金属，并与Au镀层接触。第二中间镀层包括相对于第一中间镀层中的金属具有贵族标准电极电位并与第一中间镀层接触的金属。

4. 发明授权

US08062765B2 Silver layer formed by electrosilvering substrate material 失效
标题翻译：银层通过电镀银衬底材料形成
公开(公告)号：US08062765B2
公开(公告)日：2011-11-22
申请号：US11773692
申请日：2007-07-05
申请人： Youichiro Nakahara , Naoto Ikegawa
发明人： Youichiro Nakahara , Naoto Ikegawa
IPC分类号： B32B15/01 , B32B15/20 , C25D3/46
CPC分类号： C25D5/02 , C25D3/46 , C25D5/10 , C25D5/50 , H01L33/60 , Y10T428/12882 , Y10T428/12896 , Y10T428/12993
摘要： The inventors have conducted vigorous studies, and discovered as a result that it is possible to form a silver layer having a high reflectance of about 90 to 99% in a visible light area by setting a grain size of an outermost surface of a silver plated layer within a range of 0.5 μm or more to 30 μm or less.
摘要翻译：发明人进行了深入研究，结果发现通过设定银镀层的最外表面的粒径，可以在可见光区域形成具有约90〜99％的高反射率的银层在0.5μm以上且30μm以下的范围内。

5. 发明授权

US08338716B2 Circuit board and method of manufacturing the same 有权
标题翻译：电路板及其制造方法
公开(公告)号：US08338716B2
公开(公告)日：2012-12-25
申请号：US12741105
申请日：2008-11-04
申请人： Youichiro Nakahara , Naoto Ikegawa , Kyohei Uemura , Yoshiyuki Uchinono
发明人： Youichiro Nakahara , Naoto Ikegawa , Kyohei Uemura , Yoshiyuki Uchinono
IPC分类号： H05K1/09
CPC分类号： H05K3/027 , H05K3/108 , H05K3/244 , H05K2201/09363 , H05K2203/0723 , H05K2203/107
摘要： A circuit board includes: an insulating substrate; and a circuit formed on the insulating substrate. The circuit includes: a undercoat layer with a circuit pattern formed by irradiating a metal thin film covering a surface of the insulating substrate with a laser along an outer shape of the circuit so as to partly remove the metal thin film along the outer shape of the circuit; a Cu plating layer, a Ni plating layer and a Au plating layer formed by metal plating and sequentially provided on a surface of the undercoat layer. A first middle plating layer and a second middle plating layer are provided between the Ni plating layer and the Au plating layer. The first middle plating layer includes metal with a less noble standard electrode potential with respect to Au and is in contact with the Au plating layer. The second middle plating layer includes metal with a noble standard electrode potential with respect to the metal in the first middle plating layer and is in contact with the first middle plating layer.
摘要翻译：电路板包括：绝缘基板; 以及形成在绝缘基板上的电路。该电路包括：具有电路图案的底涂层，其通过沿电路的外形以激光照射覆盖绝缘基板的表面的金属薄膜而形成，以沿着外部形状部分去除金属薄膜电路 Cu镀层，Ni镀层和通过金属电镀形成的Au镀层，并依次设置在底涂层的表面上。在Ni镀层和Au镀层之间设置第一中间镀层和第二中间镀层。第一中间镀层包括相对于Au具有较低贵族标准电极电位的金属，并与Au镀层接触。第二中间镀层包括相对于第一中间镀层中的金属具有贵族标准电极电位并与第一中间镀层接触的金属。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式