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1. 发明申请

US20110215473A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110215473A1
公开(公告)日：2011-09-08
申请号：US12886133
申请日：2010-09-20
申请人： Mitsuhiko Noda , Mitsuhiro Noguchi , Kenichi Fujii , Fumitaka Arai
发明人： Mitsuhiko Noda , Mitsuhiro Noguchi , Kenichi Fujii , Fumitaka Arai
IPC分类号： H01L23/532 , H01L21/768
CPC分类号： H01L21/768 , H01L23/532 , H01L2924/0002 , H01L2924/00
摘要： According to one embodiment, a semiconductor device includes a first contact, a second contact, and an intermediate interconnection. The first contact is made of a first conductive material. The second contact is made of a second conductive material. A lower end portion of the second contact is connected to an upper end portion of the first contact. The intermediate interconnection is made of a third conductive material and isolated from the first contact and the second contact. A lower face of the intermediate interconnection is positioned higher than a lower face of the first contact. An upper face of the intermediate interconnection is positioned lower than an upper face of the second contact. A diffusion coefficient of the first conductive material with respect to the second conductive material is lower than a diffusion coefficient of the third conductive material with respect to the second conductive material.
摘要翻译：根据一个实施例，半导体器件包括第一触点，第二触点和中间互连。第一接触由第一导电材料制成。第二接触由第二导电材料制成。第二触点的下端部连接到第一触点的上端部。中间互连由第三导电材料制成并且与第一接触和第二接触隔离。中间互连的下表面定位成高于第一触点的下表面。中间互连的上表面定位成低于第二触点的上表面。第一导电材料相对于第二导电材料的扩散系数低于第三导电材料相对于第二导电材料的扩散系数。

2. 发明授权

US08546909B2 Nonvolatile semiconductor memory device having air gap proximate to element isolation region and method of manufacturing the same 有权
标题翻译：具有靠近元件隔离区域的气隙的非易失性半导体存储器件及其制造方法
公开(公告)号：US08546909B2
公开(公告)日：2013-10-01
申请号：US13234644
申请日：2011-09-16
申请人： Mitsuhiko Noda , Hiroyuki Kutsukake , Mitsuhiro Noguchi
发明人： Mitsuhiko Noda , Hiroyuki Kutsukake , Mitsuhiro Noguchi
IPC分类号： H01L21/70 , H01L29/788 , H01L29/792 , H01L23/58 , H01L21/76
CPC分类号： H01L29/7881 , H01L21/28273 , H01L27/11543 , H01L29/42324
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes an element region, a gate insulating film, a first gate electrode, an intergate insulating film, a second gate electrode and an element isolation region. The gate insulating film is formed on the element region. The first gate electrode is formed on the gate insulating film. The intergate insulating film is formed on the first gate electrode and has an opening. The second gate electrode is formed on the intergate insulating film and in contact with the first gate electrode via the opening. The element isolation region encloses a laminated structure formed by the element region, the gate insulating film, and the first gate electrode. The air gap is formed between the element isolation region and side surfaces of the element region, the gate insulating film and the first gate electrode.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括元件区域，栅极绝缘膜，第一栅极电极，栅极间绝缘膜，第二栅极电极和元件隔离区域。栅极绝缘膜形成在元件区域上。第一栅电极形成在栅极绝缘膜上。栅极绝缘膜形成在第一栅电极上并具有开口。第二栅电极形成在栅间绝缘膜上并经由开口与第一栅电极接触。元件隔离区域包围由元件区域，栅极绝缘膜和第一栅极电极形成的层叠结构。在元件隔离区域和元件区域，栅极绝缘膜和第一栅极电极的侧表面之间形成气隙。

3. 发明授权

US09070743B2 Semiconductor memory and manufacturing method of the same 有权
标题翻译：半导体存储器及其制造方法相同
公开(公告)号：US09070743B2
公开(公告)日：2015-06-30
申请号：US13413952
申请日：2012-03-07
申请人： Yoshiko Kato , Masato Endo , Mitsuhiko Noda , Mitsuhiro Noguchi
发明人： Yoshiko Kato , Masato Endo , Mitsuhiko Noda , Mitsuhiro Noguchi
IPC分类号： H01L29/788 , H01L21/762 , H01L29/66 , H01L29/792 , H01L27/115
CPC分类号： H01L21/76229 , H01L27/11519 , H01L27/11529 , H01L27/11546 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： According to one embodiment, a semiconductor memory includes a memory cell in a memory cell array which is provided in a semiconductor substrate and which includes a first active region surrounded by a first isolation insulator, a transistor in a transistor region which is provided in the semiconductor substrate and which includes second active regions surrounded by a second isolation insulator. The second isolation insulator includes a first film, and a second film between the first film and the second active region, and the upper surface of the first film is located closer to the bottom of the semiconductor substrate than the upper surface of the second film.
摘要翻译：根据一个实施例，半导体存储器包括设置在半导体衬底中的存储单元阵列中的存储单元，其包括由第一隔离绝缘体围绕的第一有源区，设置在半导体中的晶体管区中的晶体管并且其包括由第二隔离绝缘体围绕的第二有源区。第二隔离绝缘体包括第一膜和在第一膜和第二有源区之间的第二膜，并且第一膜的上表面比第二膜的上表面更靠近半导体衬底的底部。

4. 发明申请

US20130062680A1 SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD OF THE SAME 有权
标题翻译：半导体存储器及其制造方法
公开(公告)号：US20130062680A1
公开(公告)日：2013-03-14
申请号：US13413952
申请日：2012-03-07
申请人： Yoshiko KATO , Masato Endo , Mitsuhiko Noda , Mitsuhiro Noguchi
发明人： Yoshiko KATO , Masato Endo , Mitsuhiko Noda , Mitsuhiro Noguchi
IPC分类号： H01L27/105 , H01L21/8239
CPC分类号： H01L21/76229 , H01L27/11519 , H01L27/11529 , H01L27/11546 , H01L27/11565 , H01L27/1157 , H01L27/11573 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： According to one embodiment, a semiconductor memory includes a memory cell in a memory cell array which is provided in a semiconductor substrate and which includes a first active region surrounded by a first isolation insulator, a transistor in a transistor region which is provided in the semiconductor substrate and which includes second active regions surrounded by a second isolation insulator. The second isolation insulator includes a first film, and a second film between the first film and the second active region, and the upper surface of the first film is located closer to the bottom of the semiconductor substrate than the upper surface of the second film.
摘要翻译：根据一个实施例，半导体存储器包括设置在半导体衬底中的存储单元阵列中的存储单元，其包括由第一隔离绝缘体围绕的第一有源区，设置在半导体中的晶体管区中的晶体管并且其包括由第二隔离绝缘体围绕的第二有源区。第二隔离绝缘体包括第一膜和在第一膜和第二有源区之间的第二膜，并且第一膜的上表面比第二膜的上表面更靠近半导体衬底的底部。

5. 发明授权

US08288751B2 Semiconductor memory device and manufacturing method of the same 有权
标题翻译：半导体存储器件及其制造方法
公开(公告)号：US08288751B2
公开(公告)日：2012-10-16
申请号：US12759107
申请日：2010-04-13
申请人： Mitsuhiko Noda , Mitsuhiro Noguchi , Hiroomi Nakajima , Masato Endo
发明人： Mitsuhiko Noda , Mitsuhiro Noguchi , Hiroomi Nakajima , Masato Endo
IPC分类号： H01L27/11
CPC分类号： H01L27/105 , H01L27/1021 , H01L27/1052 , H01L27/24
摘要： A semiconductor memory device includes a plurality of memory cell arrays each includes a plurality of memory cells, the plurality of memory cell arrays being stacked on a semiconductor substrate to form a three-dimensional structure, a first well formed in the semiconductor substrate and having a first conductivity type, an element isolation insulating film including a bottom surface shallower than a bottom surface of the first well in the first well, and buried in the semiconductor substrate, a second well including a bottom surface shallower than the bottom surface of the first well in the first well, formed along a bottom surface of at least a portion of the element isolation insulating film, and made of an impurity having a second conductivity type, and a contact line electrically connected to the first well.
摘要翻译：半导体存储器件包括多个存储单元阵列，每个存储单元阵列包括多个存储器单元，多个存储单元阵列堆叠在半导体衬底上以形成三维结构，第一阱形成在半导体衬底中并具有第一导电类型，元件隔离绝缘膜，其包括比第一阱中的第一阱的底表面浅的底表面，并且埋在半导体衬底中，第二阱包括比第一阱的底表面浅的底表面在第一阱中沿着元件隔离绝缘膜的至少一部分的底表面形成并由具有第二导电类型的杂质和与第一阱电连接的接触线形成。

6. 发明授权

US08294194B2 Nonvolatile semiconductor memory device and manufacturing method of the same 有权
标题翻译：非易失性半导体存储器件及其制造方法相同
公开(公告)号：US08294194B2
公开(公告)日：2012-10-23
申请号：US13052465
申请日：2011-03-21
申请人： Mitsuhiko Noda , Hidenobu Nagashima
发明人： Mitsuhiko Noda , Hidenobu Nagashima
IPC分类号： H01L21/76 , H01L29/788
CPC分类号： H01L27/11529 , H01L21/764 , H01L21/7682 , H01L29/42324
摘要： According to one embodiment, a nonvolatile semiconductor memory device includes memory transistors, an interlayer insulating film, a peripheral transistor and a sidewall. The memory transistors are formed on a semiconductor substrate. Each of the memory transistors includes a first stack gate which includes a floating gate electrode, a second gate insulating film, and a control gate electrode. The interlayer insulating film is formed between the first stack gates. The interlayer insulating film includes a first air gap. The peripheral transistor is formed on the substrate. The peripheral transistor includes a second stack gate which includes a first gate electrode, a third gate insulating film, and a second gate electrode. The sidewall is formed on a side surface of the second stack gate and includes a second air gap. An upper end of the second air gap is located at a position lower than the third gate insulating film.
摘要翻译：根据一个实施例，非易失性半导体存储器件包括存储晶体管，层间绝缘膜，外围晶体管和侧壁。存储晶体管形成在半导体衬底上。每个存储晶体管包括第一堆叠栅极，其包括浮置栅电极，第二栅极绝缘膜和控制栅电极。层间绝缘膜形成在第一堆叠栅极之间。层间绝缘膜包括第一气隙。外围晶体管形成在基板上。外围晶体管包括第二堆叠栅极，其包括第一栅极电极，第三栅极绝缘膜和第二栅极电极。侧壁形成在第二堆叠门的侧表面上并且包括第二气隙。第二气隙的上端位于比第三栅极绝缘膜低的位置。

7. 发明授权

US5457740A Cross point mixer for a telephone set 失效
标题翻译：交叉点混合器用于电话机
公开(公告)号：US5457740A
公开(公告)日：1995-10-10
申请号：US980257
申请日：1992-11-23
申请人： Mitsuhiko Noda
发明人： Mitsuhiko Noda
IPC分类号： H04M1/00 , H04M1/65 , H04M1/725 , H04Q3/52 , H04M1/26
CPC分类号： H04M1/651 , H04M1/725
摘要： Disclosed is a cross point mixer including a cross point switch and a mixing circuit provided on the output side. The cross point switch includes n.times.m switches arranged in a matrix manner. Each of the switches corresponds to one of a plurality of n input terminals receiving signals, and corresponds to one of a plurality of m output terminals outputting signals. When on, each of the switches forms a signal transmission path which connects a corresponding input terminal with a corresponding output terminal. The mixing circuit provided on the output side receives signals from the n switches correspondingly associated with the output terminal, and subjects the signals to mixing for output to the output terminal.
摘要翻译：公开了一种交叉点混合器，其包括设置在输出侧的交叉点开关和混合电路。交叉点开关包括以矩阵方式布置的n×m个开关。每个开关对应于多个n个输入端子中的一个接收信号，并且对应于输出信号的多个m个输出端子中的一个。当接通时，每个开关形成将相应的输入端子与相应的输出端子连接的信号传输路径。在输出侧设置的混合电路接收来自与输出端子相对应的n个开关的信号，并将信号混合输出到输出端子。

8. 发明授权

US5425094A Cross point switch with power failure mode 失效
标题翻译：具有断电模式的交叉点开关
公开(公告)号：US5425094A
公开(公告)日：1995-06-13
申请号：US102280
申请日：1993-08-05
申请人： Mitsuhiko Noda
发明人： Mitsuhiko Noda
IPC分类号： H03K17/00 , H03M1/00 , H04M19/08 , H04Q3/52 , H04M19/00
CPC分类号： H04M19/08
摘要： A cross point switch mounted on a telephone-related device such as a telephone. When an alternate power source request signal is low, switches are controlled in response to external data. When the signal is high, a predetermined switch or switches are forced to be turned on and other switches are forced to be turned off. As a supply voltage obtained from a commercial power supply drops, the request signal goes high. When the request signal is high, a voltage obtained from telephone line power is supplied only to necessary electric circuits. Only the most basic functions such as talking over a telephone line can be used such that power consumption can be minimized.
摘要翻译：安装在诸如电话的电话相关设备上的交叉点开关。当备用电源请求信号为低电平时，根据外部数据控制开关。当信号为高电平时，强制将预定的开关或开关导通，并且其他开关被强制关闭。由于从商用电源获得的电源电压下降，请求信号变高。当请求信号为高电平时，从电话线电源获得的电压仅供给必要的电路。只能使用最基本的功能，例如通过电话线进行通话，从而能够最大限度地降低功耗。

9. 发明授权

US4086164A Method of disposing of waste water containing emulsified oil 失效
标题翻译：处理含乳化油废水的方法
公开(公告)号：US4086164A
公开(公告)日：1978-04-25
申请号：US665480
申请日：1976-03-10
申请人： Mitsuhiko Noda , Kikuo Nomura
发明人： Mitsuhiko Noda , Kikuo Nomura
IPC分类号： C10M101/00 , B01D17/00 , B01D17/02 , B01D17/04 , B01D61/02 , B01D61/14 , C02F1/44 , C02F9/00 , C02F11/06 , F23G7/00 , F23G7/05 , C02C5/04
CPC分类号： C02F9/00 , B01D17/00 , B01D17/02 , C02F1/001 , C02F1/025 , C02F11/06 , F23G7/001 , F23G7/05 , C02F2101/20 , C02F2103/16 , Y02W10/40
摘要： A method of disposing of an oil containing emulsified waste water, for example, resulting from metal working processes, which comprises:(a) separating the oil and water present in the oil containing emulsified waste water while maintaining the state of the emulsion, thereby concentrating the oil without breaking the emulsion;(b) mixing the concentrate thus obtained at least with solid material filtered from the oil containing emulsified waste water during metal working, said concentrate being in a homogeneous, stable slurry state due to the action of a surfactant even when mixed with the solid material which contains water, unless said concentrate is dried;(c) subjecting the resulting homogeneous, stable mixture to combustion.
摘要翻译：一种处理例如由金属加工过程产生的乳化废水的油的方法，其包括：

10. 发明授权

US08514602B2 Nonvolatile semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US08514602B2
公开(公告)日：2013-08-20
申请号：US13017367
申请日：2011-01-31
申请人： Mitsuhiko Noda
发明人： Mitsuhiko Noda
IPC分类号： G11C5/06 , H01L27/06
CPC分类号： G11C16/0483 , G11C16/24 , G11C16/26
摘要： In one embodiment, a nonvolatile semiconductor memory device includes a substrate provided with a memory cell part and sense amplifiers on a surface of the substrate, first isolation regions and first device regions disposed in the substrate under the memory cell part, and second isolation regions and second device regions disposed in the substrate under the sense amplifiers. The device further includes a plurality of interconnects disposed on the substrate in the sense amplifiers, extending in a first direction parallel to the surface of the substrate, being adjacent to one another in a second direction perpendicular to the first direction, and arranged in the same interconnect layer. At least one of the second device regions includes first and second stripe portions extending in the first direction, being adjacent in the second direction, and having stripe shapes, and a connecting portion disposed to connect the first stripe portion and the second stripe portion. The device further includes a source contact disposed on the connecting portion, and electrically connected to one of the interconnects.
摘要翻译：在一个实施例中，非易失性半导体存储器件包括在衬底的表面上设置有存储单元部分和读出放大器的衬底，设置在存储单元部分下方的衬底中的第一隔离区域和第一器件区域，以及第二隔离区域和第二器件区域设置在读出放大器下面的衬底中。该装置还包括设置在感测放大器中的基板上的多个互连件，其在平行于基板的表面的第一方向上延伸，在垂直于第一方向的第二方向上彼此相邻，并且布置在该基板上互连层。所述第二装置区域中的至少一个包括沿所述第一方向延伸的第一和第二条纹部分，所述第一条纹部分和所述第二条纹部分在所述第二方向上相邻，并且具有条形形状;以及连接部分，设置成连接所述第一条纹部分和所述第二条纹部该装置还包括设置在连接部分上的电源触点，并且电连接到互连件之一。

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