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    • 6. 发明申请
    • Calibrated differential voltage crossing
    • 校准差分电压交叉
    • US20060116839A1
    • 2006-06-01
    • US11013255
    • 2004-12-15
    • John ZumkehrJames ChandlerRenjeng Chiang
    • John ZumkehrJames ChandlerRenjeng Chiang
    • G01R35/00G06F19/00
    • G01R25/00
    • In general, in one aspect, the disclosure describes an apparatus for calibrating signals. The apparatus includes a receiver pair to receive a differential signal and a reference signal and to generate at least one comparison signal reflecting where a first signal of the differential signal and a second signal of the differential signal cross each other with respect to the reference signal. The second signal is a negative compliment of the first signal. The apparatus further includes a phase detector to determine a phase error based on the at least one comparison signal. The apparatus also includes an edge delay control driver pair to adjust the differential signal based on the phase error.
    • 通常,在一个方面,本公开描述了一种用于校准信号的装置。 该装置包括接收对,以接收差分信号和参考信号,并产生反映差分信号的第一信号和差分信号的第二信号相对于参考信号彼此交叉的至少一个比较信号。 第二个信号是第一个信号的负值。 该装置还包括相位检测器,用于基于至少一个比较信号来确定相位误差。 该装置还包括边缘延迟控制驱动器对,以根据相位误差来调节差分信号。
    • 7. 发明申请
    • Internal voltage reference for memory interface
    • 存储器接口的内部参考电压
    • US20050104624A1
    • 2005-05-19
    • US10714075
    • 2003-11-14
    • John ZumkehrJames ChandlerRay Chiang
    • John ZumkehrJames ChandlerRay Chiang
    • G11C5/14G11C7/10H03K19/094
    • G11C5/147G11C2207/2254
    • Embodiments of the invention include a memory controller to interface to memory. In one embodiment, the memory controller includes a pull-up calibration terminal to couple to an external pull-up resistor, a pull-down calibration terminal to couple to an external pull-down resistor, a voltage reference node, a first switch coupled between the pull-up calibration terminal and the voltage reference node, and a second switch coupled between the pull-down calibration terminal and the voltage reference node. The first switch and the second switch may be selectively closed to generate an internal voltage reference on the voltage reference node in a normal mode that may be used for comparison with an input signal to receive data.
    • 本发明的实施例包括与存储器接口的存储器控​​制器。 在一个实施例中,存储器控制器包括耦合到外部上拉电阻器的上拉校准端子,耦合到外部下拉电阻器的下拉校准端子,电压参考节点,耦合在 上拉校准端子和电压参考节点,以及耦合在下拉校准端子和电压参考节点之间的第二开关。 可以选择性地关闭第一开关和第二开关以在正常模式下在电压参考节点上产生内部参考电压,该正常模式可用于与输入信号进行比较以接收数据。