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    • 1. 发明申请
    • PIXEL STRUCTURE AND FABRICATION METHOD THEREOF
    • 像素结构和制造方法
    • US20090001377A1
    • 2009-01-01
    • US11851392
    • 2007-09-07
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • H01L29/786H01L21/00
    • H01L29/78621H01L27/1255H01L27/1288
    • A pixel structure and a fabrication method thereof are provided, wherein a semiconductor pattern and a data line are defined simultaneously by performing a half-tone or grey-tone masking process. In addition, a self-alignment manner is further adopted to fabricate a lightly doped region with symmetric lengths on two sides of a channel region through steps such as photoresist ashing and etching, so as to prevent the problem of misalignment of mask generated when a mask is used to define the lightly doped region in the conventional art. Furthermore, a source pattern and a drain pattern are made to directly contact a source region and a drain region of the semiconductor pattern, such that a process of fabricating a via is omitted. Besides, in the present invention, a common line pattern surrounding the peripheral of the pixel region is also formed to improve the aperture ratio of the pixel structure.
    • 提供一种像素结构及其制造方法,其中通过执行半色调或灰度色调掩蔽处理同时定义半导体图案和数据线。 此外,进一步采用自对准方式,通过诸如光致抗蚀剂灰化和蚀刻的步骤在通道区域的两侧上制造具有对称长度的轻掺杂区域,以防止当掩模产生的掩模失配的问题 用于定义传统技术中的轻掺杂区域。 此外,使源极图案和漏极图案直接接触半导体图案的源极区域和漏极区域,从而省略了制造通孔的工艺。 此外,在本发明中,还形成围绕像素区域的周边的公共线图案,以提高像素结构的开口率。
    • 2. 发明授权
    • Pixel structure
    • 像素结构
    • US07763942B2
    • 2010-07-27
    • US11851392
    • 2007-09-07
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • H01L23/62H01L21/8238G02F1/1343
    • H01L29/78621H01L27/1255H01L27/1288
    • A pixel structure and a fabrication method thereof are provided, wherein a semiconductor pattern and a data line are defined simultaneously by performing a half-tone or grey-tone masking process. In addition, a self-alignment manner is further adopted to fabricate a lightly doped region with symmetric lengths on two sides of a channel region through steps such as photoresist ashing and etching, so as to prevent the problem of misalignment of mask generated when a mask is used to define the lightly doped region in the conventional art. Furthermore, a source pattern and a drain pattern are made to directly contact a source region and a drain region of the semiconductor pattern, such that a process of fabricating a via is omitted. Besides, in the present invention, a common line pattern surrounding the peripheral of the pixel region is also formed to improve the aperture ratio of the pixel structure.
    • 提供一种像素结构及其制造方法,其中通过执行半色调或灰度色调掩蔽处理同时定义半导体图案和数据线。 此外,进一步采用自对准方式,通过诸如光致抗蚀剂灰化和蚀刻的步骤在通道区域的两侧上制造具有对称长度的轻掺杂区域,以防止当掩模产生的掩模失配的问题 用于定义传统技术中的轻掺杂区域。 此外,使源极图案和漏极图案直接接触半导体图案的源极区域和漏极区域,从而省略了制造通孔的工艺。 此外,在本发明中,还形成围绕像素区域的周边的公共线图案,以提高像素结构的开口率。
    • 3. 发明授权
    • Fabrication method of pixel structure
    • 像素结构的制作方法
    • US07855112B2
    • 2010-12-21
    • US12779940
    • 2010-05-13
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • H01L21/8238H01L23/62
    • H01L29/78621H01L27/1255H01L27/1288
    • A fabrication method of a pixel structure includes providing a substrate. A semiconductor layer and a first conductive layer are formed on the substrate in sequence and patterned to form a semiconductor pattern and a data line pattern. A gate insulation layer and a second conductive layer are formed on the substrate in sequence and patterned to form a gate pattern and a scan line pattern connected to each other. A source region, a drain region, a channel region, and a lightly doped region are formed in the semiconductor pattern. A third conductive layer formed on the substrate is patterned to form a source pattern and a drain pattern. A protective layer is formed on the substrate and patterned to form a contact window to expose the drain pattern. A pixel electrode electrically connected to the drain pattern through the contact window is formed on the protective layer.
    • 像素结构的制造方法包括提供基板。 依次在基板上形成半导体层和第一导电层,并将其图案化以形成半导体图案和数据线图形。 依次在基板上形成栅极绝缘层和第二导电层,并将其图案化以形成彼此连接的栅极图案和扫描线图案。 在半导体图案中形成源极区,漏极区,沟道区和轻掺杂区。 形成在衬底上的第三导电层被图案化以形成源图案和漏极图案。 在衬底上形成保护层并图案化以形成接触窗口以暴露漏极图案。 通过接触窗电连接到漏极图案的像素电极形成在保护层上。
    • 4. 发明申请
    • FABRICATION METHOD OF PIXEL STRUCTURE
    • 像素结构的制造方法
    • US20100233859A1
    • 2010-09-16
    • US12779940
    • 2010-05-13
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • Ming-Yan ChenYi-Wei ChenYi-Sheng ChengYing-Chi Liao
    • H01L21/336
    • H01L29/78621H01L27/1255H01L27/1288
    • A fabrication method of a pixel structure includes providing a substrate. A semiconductor layer and a first conductive layer are formed on the substrate in sequence and patterned to form a semiconductor pattern and a data line pattern. A gate insulation layer and a second conductive layer are formed on the substrate in sequence and patterned to form a gate pattern and a scan line pattern connected to each other. A source region, a drain region, a channel region, and a lightly doped region are formed in the semiconductor pattern. A third conductive layer formed on the substrate is patterned to form a source pattern and a drain pattern. A protective layer is formed on the substrate and patterned to form a contact window to expose the drain pattern. A pixel electrode electrically connected to the drain pattern through the contact window is formed on the protective layer.
    • 像素结构的制造方法包括提供基板。 依次在基板上形成半导体层和第一导电层,并将其图案化以形成半导体图案和数据线图形。 依次在基板上形成栅极绝缘层和第二导电层,并将其图案化以形成彼此连接的栅极图案和扫描线图案。 在半导体图案中形成源极区,漏极区,沟道区和轻掺杂区。 形成在衬底上的第三导电层被图案化以形成源图案和漏极图案。 在衬底上形成保护层并图案化以形成接触窗口以暴露漏极图案。 通过接触窗电连接到漏极图案的像素电极形成在保护层上。
    • 5. 发明申请
    • Pixel structure and method for forming the same
    • 像素结构及其形成方法
    • US20080296581A1
    • 2008-12-04
    • US11892191
    • 2007-08-21
    • Chih-Wei ChaoYi-Sheng ChengKun-Chih LinYi-Wei Chen
    • Chih-Wei ChaoYi-Sheng ChengKun-Chih LinYi-Wei Chen
    • H01L21/00H01L29/786
    • H01L27/1248G02F1/136213H01L27/124H01L27/1255H01L29/78621
    • A pixel structure including at least one thin-film transistor, at least one storage capacitor, a patterned first metal layer, an interlayer dielectric layer, a passivation layer, and a patterned pixel electrode is provided. The storage capacitor is electrically connected to the thin-film transistor. The patterned first metal layer is covered by the interlayer dielectric layer. The thin-film transistor and the interlayer dielectric layer are covered by the passivation layer, wherein an opening is formed in the passivation layer and a part of the interlayer dielectric layer. The patterned pixel electrode is formed on a part of the passivation layer and a part of the interlayer dielectric layer and contacted with a part of the passivation layer and a part of the interlayer dielectric layer. The storage capacitor includes the patterned first metal layer, a remained part of the interlayer dielectric layer located under the opening, and the patterned pixel electrode.
    • 提供了包括至少一个薄膜晶体管,至少一个存储电容器,图案化第一金属层,层间介电层,钝化层和图案化像素电极的像素结构。 存储电容器电连接到薄膜晶体管。 图案化的第一金属层被层间介电层覆盖。 薄膜晶体管和层间电介质层被钝化层覆盖,其中在钝化层中形成一个开口和一部分层间电介质层。 图案化的像素电极形成在钝化层的一部分和层间电介质层的一部分上,并与钝化层的一部分和层间电介质层的一部分接触。 存储电容器包括图案化的第一金属层,位于开口下方的层间介电层的剩余部分和图案化的像素电极。
    • 6. 发明授权
    • Semiconductor structure of liquid crystal display and manufacturing method thereof
    • 液晶显示器的半导体结构及其制造方法
    • US07601552B2
    • 2009-10-13
    • US12017162
    • 2008-01-21
    • Yi-Sheng ChengTa-Wei Chiu
    • Yi-Sheng ChengTa-Wei Chiu
    • H01L21/00
    • H01L27/1288H01L27/1255
    • A semiconductor structure of a liquid crystal display and the manufacturing method thereof are described. The manufacturing method includes the following steps. A patterned polysilicon layer and a first dielectric layer are formed on a substrate. A first patterned metal layer is formed to construct a gate electrode and a capacitor electrode. An ion implantation is conducted on the polysilicon layer to form drain and source electrodes. A second dielectric layer and a second patterned metal layer are formed thereon. Sequentially, a third dielectric layer is formed thereon. A plurality of via openings are formed by a patterned photoresist layer, and a third metal layer is formed thereon and filled into the via openings. The patterned photoresist layer and the redundant third metal layer are stripped from the substrate to form via plugs in the via openings. A patterned transparent conductive layer is formed thereon to connect the via plugs.
    • 对液晶显示器的半导体结构及其制造方法进行说明。 该制造方法包括以下步骤。 在基板上形成图形化的多晶硅层和第一介质层。 形成第一图案化金属层以构成栅电极和电容器电极。 在多晶硅层上进行离子注入以形成漏极和源极。 在其上形成第二介电层和第二图案化金属层。 接着,在其上形成第三电介质层。 通过图案化的光致抗蚀剂层形成多个通路孔,并且在其上形成第三金属层并填充到通孔中。 图案化的光致抗蚀剂层和冗余的第三金属层从基板剥离以在通孔开口中形成通孔塞。 在其上形成图案化的透明导电层以连接通孔塞。
    • 7. 发明申请
    • Pixel, a Storage Capacitor, and a Method for Forming the Same
    • 像素,存储电容器及其形成方法
    • US20080251790A1
    • 2008-10-16
    • US12048631
    • 2008-03-14
    • Yi-Sheng Cheng
    • Yi-Sheng Cheng
    • H01L27/12H01L29/94H01L21/84
    • H01L27/1255G02F1/136213H01L27/1214H01L27/1259H01L27/1288H01L27/13
    • A pixel, a storage capacitor, and a method for forming the same. The storage capacitor formed on a substrate comprises a semiconductor layer, a first dielectric layer, a first conductive layer, a second dielectric layer and a second conductive layer. The semiconductor layer is formed on the substrate wherein the semiconductor layer and the substrate are covered by the first dielectric layer. The first conductive layer is formed on a part of the first dielectric layer. The second dielectric layer is formed on the first conductive layer, and the lateral side of the stacking structure including the second dielectric layer and the first conductive layer has a taper shaped. The second conductive layer is formed on a part of the second dielectric layer.
    • 像素,存储电容器及其形成方法。 形成在基板上的存储电容器包括半导体层,第一介电层,第一导电层,第二介电层和第二导电层。 半导体层形成在基板上,其中半导体层和基板被第一介电层覆盖。 第一导电层形成在第一介电层的一部分上。 第二电介质层形成在第一导电层上,并且包括第二电介质层和第一导电层的堆叠结构的横向侧具有锥形。 第二导电层形成在第二电介质层的一部分上。