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1. 发明授权

US07280566B2 Multi-format transport stream decoder 有权
标题翻译：多格式传输流解码器
公开(公告)号：US07280566B2
公开(公告)日：2007-10-09
申请号：US10468678
申请日：2002-09-10
申请人： Satoshi Okamoto , Shouichi Gotoh , Mikihiko Yamada , Norihiko Mizobata
发明人： Satoshi Okamoto , Shouichi Gotoh , Mikihiko Yamada , Norihiko Mizobata
IPC分类号： H04J3/04 , H04J1/04
CPC分类号： H04L65/104 , H04L29/06027 , H04L65/103 , H04L65/605 , H04N21/434 , H04N21/4385 , H04N21/43853 , H04N21/443
摘要： In a multi-format transport stream decoder that performs a desired process on first transport streams of different formats to generate a second transport stream, a process request information input unit (APR) is supplied with process target packet data (Pi) and process request information (ScW) indicative of process details. A stream identification information providing unit (TSRi) provides stream identification information (TSID). A packet data retaining and identifying unit (DBA) retains each pieces of first packet data (Pi), and compares the stream identification information (TSIDe) and packet data identification information (PIDe) of the first packet data (Pi) with the process request information (ScW) to determine whether the information is to be processed.
摘要翻译：在对不同格式的第一传输流执行期望处理以生成第二传输流的多格式传输流解码器中，处理请求信息输入单元（APR）被提供有处理目标分组数据（Pi）和处理请求信息（ScW）指示过程细节。流识别信息提供单元（TSRi）提供流识别信息（TSID）。分组数据保持和识别单元（DBA）保留每条第一分组数据（Pi），并且将第一分组数据（Pi）的流标识信息（TSIDe）和分组数据识别信息（PIDe）与处理请求信息（ScW）来确定信息是否被处理。

2. 发明授权

US07359441B2 Packet data processing determination apparatus 有权
标题翻译：分组数据处理确定装置
公开(公告)号：US07359441B2
公开(公告)日：2008-04-15
申请号：US10467448
申请日：2002-03-27
申请人： Mikihiko Yamada , Shouichi Gotoh , Norihiko Mizobata
发明人： Mikihiko Yamada , Shouichi Gotoh , Norihiko Mizobata
IPC分类号： H04N7/18
CPC分类号： H04N21/4385 , H04N21/23608 , H04N21/434 , H04N21/4344 , H04N21/4345 , H04N21/4347
摘要： In a packet data processing determination apparatus (DBA1) for respectively and sequentially determining a plurality of packet data (P) composing an inputted transport stream (TS), a packet data storage section (270) stores the packet data (P) for a predetermined time period in the order in which they came. A stored packet data identifying section (270, 260) reads identification information (PIDe) from the stored packet data (P). A target packet data determining section (400) compares the read identification information (PIDe) with predetermined process information (PIDd) to determine whether the packet data (P) is to be processed.
摘要翻译：在分组数据处理确定装置（DBA 1）中，分组数据存储部分（270）分别存储用于组合输入的传输流（TS）的多个分组数据（P）预定时间段，以他们来的顺序。存储的分组数据识别部分（270,260）从存储的分组数据（P）读取识别信息（PIDe）。目标分组数据确定部分（400）将读取的识别信息（PIDe）与预定的处理信息（PIDd）进行比较，以确定分组数据（P）是否被处理。

3. 发明申请

US20060184780A1 Start time reduction device and electronic device 有权
标题翻译：启动时间减少装置和电子装置
公开(公告)号：US20060184780A1
公开(公告)日：2006-08-17
申请号：US10548290
申请日：2004-04-16
申请人： Mikihiko Yamada , Norihiko Mizobata , Taku Arakawa
发明人： Mikihiko Yamada , Norihiko Mizobata , Taku Arakawa
IPC分类号： G06F15/177
CPC分类号： G06F9/4403
摘要： With a temporary operating unit being operating, a user provides a boot timing using a boot timing instructing unit. This causes a CPU to compute a boot preparation timing based on the boot timing, and store the boot timing and boot preparation timing to a boot timing memory. At this time, a timer begins a time-keeping operation. After that, the user turns off the power to the temporary operating unit. A boot preparation instructing unit determines whether or not the time being measured by the timer coincides with the boot preparation timing stored in the boot timing memory. When the time measured by the timer coincides with the boot preparation timing stored in the boot timing memory, the boot preparation instructing unit provides the CPU with a boot preparation instruction. This turns on the power to the temporary operating unit, and the CPU performs a boot preparation.
摘要翻译：在操作临时操作单元的情况下，用户使用引导定时指令单元提供启动定时。这导致CPU基于引导定时计算引导准备定时，并将引导定时和引导准备时序存储到引导定时存储器。此时，定时器开始计时操作。之后，用户关闭临时操作单元的电源。引导准备指示单元确定定时器测量的时间是否与存储在引导定时存储器中的引导准备定时一致。当由定时器测量的时间与存储在引导定时存储器中的引导准备定时一致时，引导准备指令单元向CPU提供引导准备指令。这将打开临时操作单元的电源，并且CPU执行启动准备。

4. 发明授权

US07257702B2 Boot time reducing device including boot preparation instructing unit 有权
标题翻译：引导时间减少装置，包括启动准备指令单元
公开(公告)号：US07257702B2
公开(公告)日：2007-08-14
申请号：US10548290
申请日：2004-04-16
申请人： Mikihiko Yamada , Norihiko Mizobata , Taku Arakawa
发明人： Mikihiko Yamada , Norihiko Mizobata , Taku Arakawa
IPC分类号： G06F9/455
CPC分类号： G06F9/4403
摘要： With a temporary operating unit being operating, a user provides a boot timing using a boot timing instructing unit. This causes a CPU to compute a boot preparation timing based on the boot timing, and store the boot timing and boot preparation timing to a boot timing memory. At this time, a timer begins a time-keeping operation. After that, the user turns off the power to the temporary operating unit. A boot preparation instructing unit determines whether or not the time being measured by the timer coincides with the boot preparation timing stored in the boot timing memory. When the time measured by the timer coincides with the boot preparation timing stored in the boot timing memory, the boot preparation instructing unit provides the CPU with a boot preparation instruction. This turns on the power to the temporary operating unit, and the CPU performs a boot preparation.
摘要翻译：在操作临时操作单元的情况下，用户使用引导定时指令单元提供启动定时。这导致CPU基于引导定时计算引导准备定时，并将引导定时和引导准备时序存储到引导定时存储器。此时，定时器开始计时操作。之后，用户关闭临时操作单元的电源。引导准备指示单元确定定时器测量的时间是否与存储在引导定时存储器中的引导准备定时一致。当由定时器测量的时间与存储在引导定时存储器中的引导准备定时一致时，引导准备指令单元向CPU提供引导准备指令。这将打开临时操作单元的电源，并且CPU执行启动准备。

5. 发明授权

US06806818B2 Apparatus and method for digital stream conversion 有权
标题翻译：数字流转换的装置和方法
公开(公告)号：US06806818B2
公开(公告)日：2004-10-19
申请号：US10612003
申请日：2003-07-03
申请人： Kouichi Kita , Shouichi Gotoh , Mikihiko Yamada
发明人： Kouichi Kita , Shouichi Gotoh , Mikihiko Yamada
IPC分类号： H03M730
CPC分类号： H04N7/52 , H04N5/04 , H04N5/4401 , H04N9/8042 , H04N21/4305 , H04N21/4344
摘要： A stream conversion apparatus 10 receives an MPEG2 transport stream as an input stream 21. To each packet contained in this stream, a time stamp assignment section 11 assigns the input time of that packet as a time stamp. A packet reduction section 12 deletes NULL packets which appear in the stream with a predetermined repetition pattern. Based on a proportions of the NULL packet in the stream, a time stamp replacement section 13 replaces the time stamp assigned to the packets which have not been deleted by the packet reduction section 12. The packets which have under gone the selective time stamp replacement are temporarily stored in the buffer 14, and outputted by the packet reading section 15 and the output section 16, such that each packet is outputted at a time indicated by the time stamp assigned to that packet.
摘要翻译：流转换装置10接收MPEG2传输流作为输入流21.对于包含在该流中的每个分组，时间戳分配部分11将该分组的输入时间分配为时间戳。分组缩减部分12以预定的重复模式删除出现在流中的NULL分组。基于流中的NULL分组的比例，时间戳替换部分13替换分配给分组缩减部分12尚未被删除的分组的时间戳。已经进行了选择性时间戳替换的分组是临时存储在缓冲器14中，并由分组读取部分15和输出部分16输出，使得每个分组在分配给该分组的时间戳指示的时间被输出。

6. 发明授权

US07680946B2 Stream data processing device, stream data processing method, program, and medium 有权
标题翻译：流数据处理设备，流数据处理方法，程序和介质
公开(公告)号：US07680946B2
公开(公告)日：2010-03-16
申请号：US10476282
申请日：2003-04-01
申请人： Mikihiko Yamada , Shouichi Gotoh , Satoshi Okamoto
发明人： Mikihiko Yamada , Shouichi Gotoh , Satoshi Okamoto
IPC分类号： G06F15/16 , G06F3/00 , H04L12/56
CPC分类号： H04L29/06027 , H04L47/10 , H04L47/2441 , H04L65/602 , H04L65/607 , H04L69/12 , H04L69/22 , H04N21/434
摘要： A stream data processor suitable for various applications and which performs the process of various types of stream inputs in packet data. In the stream data processor which decides individually and sequentially whether packets forming an input stream are to be processed by a predetermined process, after stream data is temporarily stored packet by packet, packet selection and data processing based on a packet identifier present in any bit position are possible.
摘要翻译：适用于各种应用并且在分组数据中执行各种类型的流输入的处理的流数据处理器。在流数据处理器中，单独地和顺序地确定是否要通过预定处理来处理形成输入流的包，在流数据被逐个包之后被临时存储，包选择和数据处理基于存在于任何比特位置是可能的

7. 发明授权

US06288750B1 Television signal processor that is operable to generate a television signal from broadcast waves with a plurality of different broadcast standards 有权
标题翻译：电视信号处理器，其可操作以从具有多个不同广播标准的广播波产生电视信号
公开(公告)号：US06288750B1
公开(公告)日：2001-09-11
申请号：US09308776
申请日：1999-05-25
申请人： Mikihiko Yamada , Hirotoshi Uehara
发明人： Mikihiko Yamada , Hirotoshi Uehara
IPC分类号： H04N5445
CPC分类号： H04N5/4401 , H04N5/445 , H04N5/44508 , H04N5/44513 , H04N5/46 , H04N21/42692 , H04N21/4307 , H04N21/431 , H04N21/4348
摘要： In an effective display area, an additional information recognizing part 203 recognizes a standard of a broadcast wave, refers to a ROM 212 and selects a target value, and provides an internal clock of a video data reading part 205 and an internal clock of an OSD data reading part 206 with the target value. At a retrace interval, on the other hand, the additional information recognizing part 203 notifies an additional information synthetic position deciding part 210 of the standard of the broadcast wave. The additional information synthetic position deciding part 210 selects from a ROM 211 a target value for reading the additional information applicable to the notified standard, and outputs the target value to an additional information reading parts 207. When the standard of the broadcast wave is changed, target values corresponding to the changes are responsively selected from the ROM 212 and the ROM 211.
摘要翻译：在有效显示区域中，附加信息识别部203识别广播波的标准，参考ROM 212并选择目标值，并提供视频数据读取部分205的内部时钟和OSD的内部时钟数据读取部分206与目标值。另一方面，在回扫间隔中，附加信息识别部203向广播波的标准的附加信息合成位置决定部210通知。附加信息合成位置决定部210从ROM211中选择用于读取适用于通知标准的附加信息的目标值，并将目标值输出到附加信息读取部207.当广播波的标准发生变化时，响应于从ROM 212和ROM 211中选择对应于这些改变的目标值。

8. 再颁专利

USRE38954E1 Television signal processor that is operable to generate a television signal broadcast waves with a plurality of different broadcast standards 有权
标题翻译：电视信号处理器，其可操作以产生具有多个不同广播标准的电视信号广播波
公开(公告)号：USRE38954E1
公开(公告)日：2006-01-31
申请号：US10659683
申请日：1998-09-25
申请人： Mikihiko Yamada , Hirotoshi Uehara
发明人： Mikihiko Yamada , Hirotoshi Uehara
IPC分类号： H04N5/445 , H04N9/74
CPC分类号： H04N5/4401 , H04N5/445 , H04N5/44508 , H04N5/44513 , H04N5/46 , H04N21/42692 , H04N21/4307 , H04N21/431 , H04N21/4348
摘要： In an effective display area, an additional information recognizing part 203 recognizes a standard of a broadcast wave, refers to a ROM 212 and selects a target value, and provides an internal clock of a video data reading part 205 and an internal clock of an OSD data reading part 206 with the target value. At a retrace interval, on the other hand, the additional information recognizing part 203 notifies an additional information synthetic position deciding part 210 of the standard of the broadcast wave. The additional information synthetic position deciding part 210 selects from a ROM 211 a target value for reading the additional information applicable to the notified standard, and outputs the target value to an additional information reading parts 207. When the standard of the broadcast wave is changed, target values corresponding to the changes are responsively selected from the ROM 212 and the ROM 211.
摘要翻译：在有效显示区域中，附加信息识别部203识别广播波的标准，参考ROM 212并选择目标值，并提供视频数据读取部分205的内部时钟和OSD的内部时钟数据读取部分206与目标值。另一方面，在回扫间隔中，附加信息识别部203向广播波的标准的附加信息合成位置决定部210通知。附加信息合成位置决定部210从ROM211中选择用于读取适用于通知标准的附加信息的目标值，并将目标值输出到附加信息读取部207.当广播波的标准发生变化时，响应于从ROM 212和ROM 211中选择对应于这些改变的目标值。

9. 发明授权

US07706400B2 Transport stream processing device and transport stream processing method 失效
标题翻译：传输流处理设备和传输流处理方法
公开(公告)号：US07706400B2
公开(公告)日：2010-04-27
申请号：US11568581
申请日：2005-05-27
申请人： Mikihiko Yamada
发明人： Mikihiko Yamada
IPC分类号： H04J3/00
CPC分类号： H04N21/44008 , H04N21/4305 , H04N21/434
摘要： A processor detects a data error in the TS packet by utilizing a value of “adaptation_field_control” and a value of “adaptation_field_length” included in the TS packet of a transport stream. A TS packet filter of the processor deletes the relevant TS packet in the transport stream if the data error in the TS packet is detected, and outputs the relevant TS packet to a PID filter if the data error in the TS packet is not detected. The PID filter detects PCR (Program Time Clock) from the TS packet. In a period of time when the PCR does not arrive at a clock reproducer, a frequency of a reference clock when the last PCR arrived is maintained, and then, when the PCR arrives at the clock reproducer, a value of STC (System Time Clock) is set and the frequency of the reference clock CK is controlled by the clock reproducer such that the value of the STC becomes equal to a value of the new PCR.
摘要翻译：处理器通过利用包含在传输流的TS分组中的“adaptation_field_control”值和“adaptation_field_length”值来检测TS分组中的数据错误。如果检测到TS分组中的数据错误，则处理器的TS分组过滤器删除传输流中的相关TS分组，并且如果未检测到TS分组中的数据错误，则将相关的TS分组输出到PID过滤器。 PID滤波器从TS包检测PCR（程序时钟）。在PCR没有到达时钟再生器的时间段内，保持最后PCR到达时的基准时钟的频率，然后当PCR到达时钟再生器时，STC（系统时钟），并且由时钟再现器控制参考时钟CK的频率，使得STC的值变得等于新的PCR的值。

10. 发明申请

US20080008100A1 Transport Stream Processing Device and Transport Stream Processing Method 失效
标题翻译：传输流处理设备和传输流处理方法
公开(公告)号：US20080008100A1
公开(公告)日：2008-01-10
申请号：US11568581
申请日：2005-05-27
申请人： Mikihiko Yamada
发明人： Mikihiko Yamada
IPC分类号： H04L7/00 , H04J3/00 , H04L7/033 , H04N7/24
CPC分类号： H04N21/44008 , H04N21/4305 , H04N21/434
摘要： A processor detects a data error in the TS packet by utilizing a value of “adaptation_field_control” and a value of “adaptation_field_length” included in the TS packet of a transport stream. A TS packet filter of the processor deletes the relevant TS packet in the transport stream if the data error in the TS packet is detected, and outputs the relevant TS packet to a PID filter if the data error in the TS packet is not detected. The PID filter detects PCR (Program Time Clock) from the TS packet. In a period of time when the PCR does not arrive at a clock reproducer, a frequency of a reference clock when the last PCR arrived is maintained, and then, when the PCR arrives at the clock reproducer, a value of STC (System Time Clock) is set and the frequency of the reference clock CK is controlled by the clock reproducer such that the value of the STC becomes equal to a value of the new PCR.
摘要翻译：处理器通过利用包含在传输流的TS分组中的“adaptation_field_control”值和“adaptation_field_length”值来检测TS分组中的数据错误。如果检测到TS分组中的数据错误，则处理器的TS分组过滤器删除传输流中的相关TS分组，并且如果未检测到TS分组中的数据错误，则将相关的TS分组输出到PID过滤器。 PID滤波器从TS包检测PCR（程序时钟）。在PCR没有到达时钟再生器的时间段内，保持最后PCR到达时的基准时钟的频率，然后当PCR到达时钟再生器时，STC（系统时钟），并且由时钟再现器控制参考时钟CK的频率，使得STC的值变得等于新的PCR的值。

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