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1. 发明申请

WO2020050889A1 ADAPTIVE SLOPE COMPENSATION FOR CURRENT MODE CONTROL 审中-公开
公开(公告)号：WO2020050889A1
公开(公告)日：2020-03-12
申请号：PCT/US2019/036445
申请日：2019-06-11
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： BHANDARKAR, Santosh Manjunath , DUMAIS, Alex
IPC分类号： H02M3/156 , H02M3/157
摘要： Adaptive slope compensation for current mode control in a switch mode power supply converter is computed for every switching cycle based upon the input voltage and duty-cycle whereby the quality factor is maintained at a constant value. A digital signal processing (DSP) capable microcontroller comprises a voltage loop compensator and generates a desired current reference for every switching cycle. Slope calculations are adapted for switching frequency, inductance value, current circuit gain, etc. The slope calculation result is applied to a pulse- digital-modulation (PDM) digital-to-analog converter (DAC) capable of changing its output levels at a very fast rate compared to the power supply switching frequency whereby the required current slope is provided within the switching period. Actual inductor current may be used to compare against the slope reference, thereby taking care of changes in the inductance values under load. The slope levels are automatically changed when the switching frequency is changed.

2. 发明申请

WO2019032495A1 DIGITAL CONTROL OF SWITCHED BOUNDARY MODE INTERLEAVED POWER CONVERTER 审中-公开
公开(公告)号：WO2019032495A1
公开(公告)日：2019-02-14
申请号：PCT/US2018/045485
申请日：2018-08-07
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： BHANDARKAR, Santosh Manjunath , DUMAIS, Alex
IPC分类号： H02M1/42 , H02M3/158
摘要： A circuit arrangement, a signal processor, and a method of interleaved switched boundary mode power conversion are disclosed. The circuit arrangement comprises at least an input for receiving an input voltage from a power supply; an output to provide an output voltage to a load; a first interleaved circuit comprising a first energy storage device and a first controllable switching device; one or more secondary interleaved circuits, each comprising a secondary energy storage device, and a secondary controllable switching device; and a signal processor, connected to the controllable switching devices. The signal processor comprises a first switching cycle controller, configured for cycled zero-current switching operation of the first controllable switching device; and one or more secondary switching cycle controllers, configured for cycled zero-current switching operation of the secondary controllable switching devices. The signal processor is configured to control, in a given switching cycle, an on-time period of each of the secondary controllable switching devices to correspond to an on-time period of the first controllable switching device. The signal processor is further configured to control phases between the on-time periods of the first and the one or more secondary switching controllers, so that the on-time periods are distributed over the given switching cycle to reduce an overall current ripple at the input.

3. 发明申请

WO2019032490A1 DIGITAL CONTROL OF SWITCHED BOUNDARY MODE POWER CONVERTER WITHOUT CURRENT SENSOR 审中-公开
公开(公告)号：WO2019032490A1
公开(公告)日：2019-02-14
申请号：PCT/US2018/045479
申请日：2018-08-07
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： BHANDARKAR, Santosh Manjunath , DUMAIS, Alex
IPC分类号： H02M1/42 , H02M3/156 , H02M3/157
摘要： A circuit arrangement for switched boundary mode power conversion, a corresponding signal processor and a method of switched boundary mode power conversion are provided. The circuit arrangement comprises an input for receiving an input voltage from a power supply, an output to provide an output voltage to a load, an energy storage device, a controllable switching device, and a signal processor. The signal processor is connected to the controllable switching device and being configured for zero-current switching of the switching device, wherein the signal processor is further configured to determine at least one switching point for the zero-current switching from a first voltage signal and a second voltage signal, wherein the first voltage signal corresponds to the input voltage and the second voltage signal corresponds to the output voltage.

4. 发明申请

WO2016145284A1 COMBINATORIAL/SEQUENTIAL PULSE WIDTH MODULATION 审中-公开
标题翻译：组合/顺序脉冲宽度调制
公开(公告)号：WO2016145284A1
公开(公告)日：2016-09-15
申请号：PCT/US2016/021945
申请日：2016-03-11
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： KRIS, Bryan , BOWLING, Stephen , DUMAIS, Alex
IPC分类号： H02M1/08 , H02M3/155 , H02M3/335
CPC分类号： H03K7/08 , H02M1/08 , H02M3/157 , H02M2001/0012
摘要： A number of standard PWM generators produce PWM signals that may be used to drive the power stages for Full-Bridge, Feed-Forward, Push-Pull, Phase-Shift Zero Voltage Transition (ZVT), and other switched mode power supply (SMPS) conversion topologies. These PWM signals may be fed to logic functions of a combinatorial logic block. Appropriate PWM signals are selected as operands along with desired logic function(s) that operates on these input operands. The resultant combinatorial PWM signals may then be used directly or may be fed through dead-time processing circuitry prior to outputting to an application circuit. In addition to the combinatorial logic functions, sequential logic functions may also be used to provide sequential PWM signals, e.g., synchronous sequential, asynchronous sequential, and/or sequential-combinatorial PWM signals.
摘要翻译：许多标准PWM发生器产生可用于驱动全桥，前馈，推挽，相移零电压转换（ZVT）和其他开关模式电源（SMPS）的功率级的PWM信号，转换拓扑。这些PWM信号可以被馈送到组合逻辑块的逻辑功能。选择适当的PWM信号作为操作数以及对这些输入操作数进行操作的所需逻辑功能。然后可以直接使用所得到的组合PWM信号，或者可以在输出到应用电路之前通过死区时间处理电路馈送。除了组合逻辑功能之外，顺序逻辑功能还可用于提供顺序PWM信号，例如同步顺序，异步顺序和/或顺序组合PWM信号。

5. 发明申请

WO2014164631A2 PULSE DENSITY DIGITAL-TO-ANALOG CONVERTER WITH SLOPE COMPENSATION FUNCTION 审中-公开
标题翻译：脉冲密度数字到模拟转换器与斜率补偿功能
公开(公告)号：WO2014164631A2
公开(公告)日：2014-10-09
申请号：PCT/US2014/023049
申请日：2014-03-11
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： KRIS, Bryan , REITER, Andreas , FUTO, Tibor , DUMAIS, Alex
IPC分类号： H03M1/66
CPC分类号： H03M1/66 , H02M3/157 , H02M3/33515 , H03M3/502 , H03M7/3028 , H03M7/3042
摘要： A slope compensation module provides slope compensation of a switched-mode power supply using current mode control. This slope compensation function may be provided by a digital slope compensation generator and a pulse density modulated digital-to- analog converter (PDM DAC) having a selectable response mode low pass filter.
摘要翻译：坡度补偿模块使用电流模式控制提供开关模式电源的斜率补偿。该斜率补偿功能可以由具有可选择的响应模式低通滤波器的数字斜坡补偿发生器和脉冲密度调制数模转换器（PDM DAC）来提供。

6. 发明申请

WO2021177987A1 LOW POWER OBJECT DETECTION IN MULTI-COIL WIRELESS CHARGING SYSTEMS AND RELATED SYSTEMS, METHODS, AND DEVICES 审中-公开
公开(公告)号：WO2021177987A1
公开(公告)日：2021-09-10
申请号：PCT/US2020/030825
申请日：2020-04-30
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： BHANDARKAR, Santosh , DUMAIS, Alex
IPC分类号： H02J50/60 , H02J50/12 , H02J50/40 , H04B5/00
摘要： Object detection for wireless power transmitters and related systems, methods, and devices are disclosed. A controller for a wireless power transmitter is configured to receive a measurement voltage potential responsive to a tank circuit signal at a tank circuit, provide an alternating current (AC) signal to each of the plurality of transmit coils one at a time, and determine at least one of a resonant frequency and a quality factor (Q-factor) of the tank circuit responsive to each selected transmit coil of the plurality of transmit coils. The controller is also configured to select a transmit coil to use to transmit wireless power to a receive coil of a wireless power receiver responsive to the determined at least one of the resonant frequency and the Q-factor for each transmit coil of the plurality of transmit coils.

7. 发明申请

WO2020242606A1 CONVERTERS FOR WIRELESS POWER TRANSFER AND RELATED SYSTEMS, METHODS, AND DEVICES 审中-公开
公开(公告)号：WO2020242606A1
公开(公告)日：2020-12-03
申请号：PCT/US2020/027296
申请日：2020-04-08
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： BHANDARKAR, Santosh , DUMAIS, Alex
IPC分类号： H02M3/158 , H02J50/80
摘要： Systems, methods, and devices related to a converter of a wireless power transmitter are disclosed. A controller for a wireless power transmitter is configured to sample an output voltage potential to produce a digital output voltage potential, determine an error between an output reference voltage potential and the digital output voltage potential, filter the error to determine a filtered error, and apply an adaptive gain to the filtered error to determine a duty cycle control signal. The adaptive gain is determined responsive to a converter input voltage potential of the converter of the wireless power transmitter. The controller is further configured to determine a controller output including buck pulse width modulation (PWM) signals and boost PWM signals based on the duty cycle control signal, the controller output configured to control the converter of the wireless power transmitter.

8. 发明申请

WO2020242605A1 DEMODULATION FOR WIRELESS POWER TRANSFER AND RELATED SYSTEMS, METHODS, AND DEVICES 审中-公开
公开(公告)号：WO2020242605A1
公开(公告)日：2020-12-03
申请号：PCT/US2020/027285
申请日：2020-04-08
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： BHANDARKAR, Santosh , DUMAIS, Alex
IPC分类号： H02J50/80 , H02M3/158
摘要： Various embodiments relate to digital demodulation for wireless power transmission. A wireless power transmitter includes a transmitter coil and a controller. The transmitter coil is configured to wirelessly couple to a receiver coil of a wireless power receiver to transfer power to the wireless power receiver responsive to a coil current applied to the transmitter coil. The wireless power receiver is configured to modulate at least one electrical condition of the wireless power receiver to modulate the coil current at the transmitter coil. The controller is configured to sample one or more electrical signals of the wireless power transmitter, and digitally demodulate the sampled one or more electrical signals to obtain a communication received from the wireless receiver responsive to the modulation of the at least one electrical condition of the wireless power receiver.

9. 发明申请

WO2016149078A2 LOW-PIN MICROCONTROLLER DEVICE WITH MULTIPLE INDEPENDENT MICROCONTROLLERS 审中-公开
标题翻译：具有多个独立微控制器的低引脚微控制器器件
公开(公告)号：WO2016149078A2
公开(公告)日：2016-09-22
申请号：PCT/US2016/021962
申请日：2016-03-11
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： KRIS, Bryan , WOJEWODA, Igor , CATHERWOOD, Mike , FALL, Brian , TOLLEFSON, Jason , WILKIE, Calum , MICKEY, Dave , SPOHRER, Thomas , DUMAIS, Alex
IPC分类号： G06F15/78 , G06F13/38
CPC分类号： G06F13/4282 , G06F13/1673 , G06F13/364 , G06F13/385 , G06F15/7807 , Y02D10/12 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A microcontroller device has a housing with a plurality of external pins having a plurality of input/output pins, a first microcontroller with a first central processing unit (CPU), a first system bus coupled with the first CPU, first memory coupled with the first system bus, and a first plurality of peripheral devices coupled with the first system bus, a second microcontroller with a second central processing unit (CPU), a second system bus coupled with the second CPU, second memory coupled with the second system bus, and a second plurality of peripheral devices coupled with the second system bus, and a pad ownership multiplexer unit being controllable to assign control of the input/output pins to either the first microcontroller or the second microcontroller, wherein the number of external pins is less than the sum of a data bus width of the first and second microcontroller.
摘要翻译：微控制器装置具有外壳，该外壳具有多个具有多个输入/输出引脚的外部引脚，具有第一中央处理单元（CPU）的第一微控制器，与第一系统总线耦合的第一系统总线 CPU，与第一系统总线耦合的第一存储器以及与第一系统总线耦合的第一多个外围设备，具有第二中央处理单元（CPU）的第二微控制器，与第二CPU耦合的第二系统总线，第二存储器与所述第二系统总线耦合，以及与所述第二系统总线耦合的第二多个外围设备，以及可控制的所述垫所有权多路复用器单元以将所述输入/输出引脚的控制分配给所述第一微控制器或所述第二微控制器，其中所述外部引脚的数量少于第一个和第二个微控制器的数据总线宽度的总和。

10. 发明申请

WO2014133768A2 CONFIGURABLE TIME DELAYS FOR EQUALIZING PULSE WIDTH MODULATION TIMING 审中-公开
标题翻译：用于均衡脉冲宽度调制时序的可配置时间延迟
公开(公告)号：WO2014133768A2
公开(公告)日：2014-09-04
申请号：PCT/US2014/016189
申请日：2014-02-13
申请人： MICROCHIP TECHNOLOGY INCORPORATED
发明人： KRIS, Bryan , DAY, John , DUMAIS, Alex , BOWLING, Stephen
IPC分类号： H02M1/32
CPC分类号： H03K5/133 , H02M1/08 , H02M1/32 , H02M1/38 , H02M3/3353 , H02M3/33576
摘要： A plurality of PWM generators have user configurable time delay circuits for each PWM control signal generated therefrom. The time delay circuits are adjusted so that each of the PWM control signals arrive at their associated power transistors at the same time. This may be accomplished by determining a maximum delay time of the PWM control signal that has to traverse the longest propagation time and then setting the delay for that PWM control signal to substantially zero delay. Thereafter, all other delay time settings for the other PWM control signals may be determined by subtracting the propagation time for each of the other PWM control signals from the longest propagation time. Thereby insuring that all of the PWM control signals arrive at their respective power transistor control nodes with substantially the same time relationships as when they left their respective PWM generators.
摘要翻译：多个PWM发生器具有用于由其产生的每个PWM控制信号的用户可配置的时间延迟电路。时间延迟电路被调整，使得每个PWM控制信号同时到达它们相关联的功率晶体管。这可以通过确定必须经过最长传播时间的PWM控制信号的最大延迟时间，然后将该PWM控制信号的延迟设定为基本上为零的延迟来实现。此后，可以通过从最长传播时间减去每个其它PWM控制信号的传播时间来确定其它PWM控制信号的所有其他延迟时间设置。从而确保所有的PWM控制信号到达它们各自的功率晶体管控制节点时具有与其离开它们各自的PWM发生器时基本相同的时间关系。

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