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    • 2. 发明授权
    • Path searched device and CDMA receiver with the same
    • 路径搜索设备和CDMA接收机相同
    • US06487193B1
    • 2002-11-26
    • US09378265
    • 1999-08-20
    • Hajime HamadaYasuyuki OishiKazuo NagataniMichiharu NakamuraKoji Matsuyama
    • Hajime HamadaYasuyuki OishiKazuo NagataniMichiharu NakamuraKoji Matsuyama
    • H04B7216
    • H04B7/18584
    • The present invention is directed to a path searching device and a CDMA receiver employing the same, having a reduced circuit scale and operating to carry out a smaller number of operations. For a direct spreading CDMA communication system, a CDMA receiver includes a reception demodulator including an antenna, a high-frequency amplifier a band-pass filter, demodulators, etc. The CDMA receiver also has despreading units, a determination unit, and a path search device. The path search device has a sampling unit for sampling an input signal by low-speed oversampling based on an integer multiple of a chip rate and by high-speed oversampling that is faster than the low-speed oversampling, a first circuit for finding a correlative value between a spreading code and a signal provided by the low-speed oversampling and finding timing corresponding to a maximum correlative value. A second circuit for finding despreading timing according to correlative values between a signal provided by the high-speed oversampling and a spreading code corresponding to the timing provided by the first circuit.
    • 本发明涉及一种路径搜索装置和采用该路径搜索装置的CDMA接收机,其具有减小的电路规模并且操作以执行较少数量的操作。 对于直接扩频CDMA通信系统,CDMA接收机包括接收解调器,包括天线,高频放大器,带通滤波器,解调器等。CDMA接收机还具有解扩单元,确定单元和路径搜索 设备。 路径搜索装置具有采样单元,用于通过基于芯片速率的整数倍的低速过采样和通过比低速过采样快的高速过采样来对输入信号进行采样,用于找到相关的第一电路 扩展码与由对应于最大相关值的低速过采样和寻找定时提供的信号之间的值。 根据由高速过采样提供的信号与对应于由第一电路提供的定时的扩展码之间的相关值,找到解扩定时的第二电路。
    • 3. 发明授权
    • Demodulator
    • 解调器
    • US06442218B1
    • 2002-08-27
    • US09377141
    • 1999-08-19
    • Michiharu NakamuraYasuyuki OishiKazuo NagataniHajime HamadaYoshihiko AsanoHiroyuki SekiYoshinori Tanaka
    • Michiharu NakamuraYasuyuki OishiKazuo NagataniHajime HamadaYoshihiko AsanoHiroyuki SekiYoshinori Tanaka
    • H03D100
    • H04L25/062H04L25/03114
    • The present invention relates to a demodulator which receives a signal transmitted via phase modulation or multivalue QAM modulation, and decides transmitted data based on the received signal. The present invention enhances a transmission-line estimate by using tentatively decided data symbols as pilot symbols and in estimating a transmission line without a decrease in accuracy of transmission-line estimate even when an error rate of the tentatively decided data symbols is increased. The demodulator includes a pilot-based transmission-line estimation unit for estimating transmission-line characteristics by using pilot symbols. A tentative-data-decision unit for tentatively deciding data symbols based on the pilot-based transmission-line estimate. A data-based transmission-line estimation unit for estimating the transmission-line characteristics by using the tentatively decided data. Weight-coefficient-multiplication units for multiplying pilot-based and data-based transmission-line estimates by respective weights having a ratio therebetween varying in accordance with reliability of the tentatively ascertained data. A pilot&data-based transmission-line estimation unit for obtaining a transmission-line estimate by averaging weighted transmission-line estimates.
    • 本发明涉及一种接收通过相位调制或多值QAM调制发送的信号的解调器,并且基于接收到的信号来确定发送的数据。 本发明通过使用暂时确定的数据符号作为导频符号,并且即使当临时确定的数据符号的错误率增加时,也不会降低传输线估计的精度,来增强传输线估计。 解调器包括基于导频的传输线估计单元,用于通过使用导频符号估计传输线特性。 一种暂定数据判定单元,用于基于基于导频的传输线估计暂时地确定数据符号。 一种基于数据的传输线估计单元,用于通过使用暂时确定的数据来估计传输线特性。 权重系数乘法单元,用于乘以基于导频和基于数据的传输线估计,其各自的权重之间的比率根据暂时确定的数据的可靠性而变化。 一种基于导频和数据的传输线估计单元,用于通过对加权的传输线估计进行平均来获得传输线估计。
    • 6. 发明授权
    • Correlator and delay lock loop circuit
    • 相关器和延迟锁环电路
    • US07224720B2
    • 2007-05-29
    • US10625337
    • 2003-07-22
    • Yasuyuki OishiKazuo NagataniHajime HamadaYoshihiko Asano
    • Yasuyuki OishiKazuo NagataniHajime HamadaYoshihiko Asano
    • H04B1/69H03D3/24
    • H04B1/7075H04B1/7085H04B1/709H04B1/7095H04B2201/70707
    • The present invention reduces the scale of circuitry and shortens the code phase detection time needed to achieve initial synchronization. In a correlator for calculating correlation between a received spreading code contained in a received spread-spectrum signal and a reference spreading code, a combined code generator is included. The combined code generator outputs a combined spreading code by weighting and combining a plurality of phase-shifted reference spreading codes A1–AM. Further, an arithmetic circuit calculates correlation between the received spreading code and the plurality of phase-shifted reference spreading codes simultaneously. A phase detection circuit detects the phase difference between the received spreading code and a reference spreading code, namely the phase of the received spreading code from the results of the arithmetic operation.
    • 本发明减小了电路规模,缩短了实现初始同步所需的码相位检测时间。 在用于计算包含在接收扩展频谱信号中的接收扩展码与参考扩展码之间的相关性的相关器中,包括组合码发生器。 组合代码生成器通过加权和组合多个相移参考扩展码A 1 -M M来输出组合的扩展码。 此外,算术电路同时计算接收的扩展码与多个相移参考扩展码之间的相关性。 相位检测电路从算术运算结果检测接收到的扩展码与参考扩展码之间的相位差,即接收到的扩展码的相位。