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1. 发明申请

US20110167399A1 DESIGN TOOL FOR THE TYPE AND FORM OF A CIRCUIT PRODUCTION 有权
标题翻译：电路生产类型和形式的设计工具
公开(公告)号：US20110167399A1
公开(公告)日：2011-07-07
申请号：US12599115
申请日：2008-05-07
申请人： Michael Schroeder , Karl-Heinz Kuefer , Dmitry-David Polityko
发明人： Michael Schroeder , Karl-Heinz Kuefer , Dmitry-David Polityko
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： The invention relates to a method for influencing a selecting a “type and form of a circuit implementation” in at least one layer (L1,L2) in a given integration task for an integrated circuit or many thereof aggregated in a wafer composite, a module on a 2-dimensional carrier substrate, or a compact module. A plurality of electric or electronic components is spatially arranged and electrically conductively to be connected. To this end a plurality of completed solutions x (5;5a,5b) are stored and available in a database (10), and each of the completed solutions includes a set of properties, wherein each set includes at least one of the following properties for the given integration task: a technology for integration, a package or installation size, a number of layers (physical layers) for conductors or line in a vertical direction and a line length or conductor length. The completed solutions (5) stored in the database (10) of the given integration task define a destination space (40), from which a solution (5b) is selectable by means of operating elements (21,22), which solution determines type & form of the circuit implementation as a result of the given integration task, and aggregates the plurality of electric and electronic components in one of a plurality of integration technologies. In this way, the design time can be reduced.
摘要翻译：本发明涉及一种用于影响集成在晶片复合体中的集成电路或其中许多集合在给定的集成任务中的至少一层（L1，L2）中的“电路实现的类型和形式”的方法，模块在二维载体基板上，或紧凑模块。多个电气或电子部件在空间上布置并导电地连接。为此，多个完成的解决方案x（5; 5a，5b）被存储并在数据库（10）中可用，并且每个完成的解决方案包括一组属性，其中每个集合包括以下属性中的至少一个对于给定的集成任务：集成技术，封装或安装尺寸，导体的多个层（物理层）或垂直方向的线和线长度或导体长度。存储在给定集成任务的数据库（10）中的完成的解决方案（5）定义目的地空间（40），借助于操作元素（21,22）可以选择解（5b），该解决方案确定类型并且作为给定的集成任务的结果的电路实现的形式，并且以多种集成技术之一聚合多个电气和电子部件。以这种方式，可以减少设计时间。

2. 发明授权

US08645900B2 Tool for the type and form of a circuit production 有权
标题翻译：电路生产的类型和形式的工具
公开(公告)号：US08645900B2
公开(公告)日：2014-02-04
申请号：US12599115
申请日：2008-05-07
申请人： Michael Schroeder , Karl-Heinz Kuefer , Dmitry-David Polityko
发明人： Michael Schroeder , Karl-Heinz Kuefer , Dmitry-David Polityko
IPC分类号： G06F17/50
CPC分类号： G06F17/5045
摘要： The invention relates to a method for influencing the selection of a type and form of a circuit implementation in at least one layer in a given integration task for at least one integrated circuit in a wafer composite, a module on a 2-dimensional carrier substrate, or a compact module. In one embodiment, a plurality of electric or electronic components are spatially arranged and to be electrically connected. Completed solutions x are stored in a database, and each of the completed solutions includes properties for the given integration task. The completed solutions define a destination space from which a solution is selectable by operating elements and determines a type and form of circuit implementation as a result of the given integration task, and aggregates the plurality of electric and electronic components in one of a plurality of integration technologies.
摘要翻译：本发明涉及一种用于影响在晶片复合材料中的至少一个集成电路的给定的集成任务中的至少一个层中的电路实现的类型和形式的选择的方法，二维载体衬底上的模块，或紧凑型模块。在一个实施例中，多个电气或电子部件在空间上布置并且被电连接。完成的解决方案x存储在数据库中，并且每个完成的解决方案都包括给定集成任务的属性。完成的解决方案定义目的地空间，通过操作元素可以从中选择解决方案，并且通过给定的集成任务确定电路实现的类型和形式，并将多个电气和电子组件聚合成多个集成技术。

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