专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06389527B1 Microprocessor allowing simultaneous instruction execution and DMA transfer 有权
标题翻译：微处理器允许同时执行指令和DMA传输
公开(公告)号：US06389527B1
公开(公告)日：2002-05-14
申请号：US09246406
申请日：1999-02-08
申请人： Michael Raam , Toru Utsumi , Takeki Osanai , Kamran Malik
发明人： Michael Raam , Toru Utsumi , Takeki Osanai , Kamran Malik
IPC分类号： G06F1500
CPC分类号： G06F9/30043 , G06F9/3824 , G06F12/0888
摘要： The present invention comprises a LSU which executes instructions relating to load/store. The LSU includes a DCACHE which temporarily stores data read from and written to the external memory, an SPRAM used to specific purposes other than cache, and an address generator generating virtual addresses for access to the DCACHE and the SPRAM. Because the SPRAM can load and store data by a pipeline of the LSU and exchanges data with an external memory through a DMA transfer, the present invention is especially available to high-speedily process a large amount of data such as the image data. Because the LSU can access the SPRAM with the same latency as that of the DCACHE, after data being stored in the external memory is transferred to the SPRAM, the processor can access the SPRAM in order to perform data process, and it is possible to process a large amount of data with shorter time than time necessary to directly access an external memory.
摘要翻译：本发明包括执行与加载/存储相关的指令的LSU。 LSU包括临时存储从外部存储器读取并写入外部存储器的数据的DCACHE，用于除缓存之外的特定目的的SPRAM以及生成用于访问DCACHE和SPRAM的虚拟地址的地址生成器。因为SPRAM可以通过LSU的流水线加载和存储数据，并且通过DMA传输与外部存储器交换数据，所以本发明特别可用于高速处理诸如图像数据的大量数据。由于LSU可以以与DCACHE相同的延迟访问SPRAM，因此在将存储在外部存储器中的数据传输到SPRAM之后，处理器可以访问SPRAM以执行数据处理，并且可以处理大量数据的时间短于直接访问外部存储器所需的时间。

2. 发明授权

US06412057B1 Microprocessor with virtual-to-physical address translation using flags 失效
标题翻译：使用标志的虚拟到物理地址转换的微处理器
公开(公告)号：US06412057B1
公开(公告)日：2002-06-25
申请号：US09246407
申请日：1999-02-08
申请人： Masashi Sasahara , Rakesh Agarwal , Kamran Malik , Michael Raam
发明人： Masashi Sasahara , Rakesh Agarwal , Kamran Malik , Michael Raam
IPC分类号： G06F1200
CPC分类号： G06F12/10 , G06F12/1054
摘要： A microprocessor includes an MMU which converts from a virtual address to a physical address, and an LSU which controls an execution of a load/store instruction. The LSU includes a DCACHE which temporarily stores data to read out from and to write into an external memory, an SPRAM used for a specific purpose besides caching, and an address generator which generates the virtual address to access the DCACHE and the SPRAM. The MMU generates a conversion table which performs a conversion from the virtual address to the physical address. A flag information showing whether or not the access to the SPRAM is performed is included in this conversion table. The LSU absolutely accesses the SPRAM if the flag is being set. Accordingly, it is unnecessary to allocate the SPRAM to a memory map of the main memory, and the allocation of the memory map simplifies.
摘要翻译：微处理器包括从虚拟地址转换为物理地址的MMU以及控制加载/存储指令的执行的LSU。 LSU包括临时存储从外部存储器读出并写入外部存储器的数据的DCACHE，用于除了高速缓存之外的特定用途的SPRAM以及生成用于访问DCACHE和SPRAM的虚拟地址的地址生成器。 MMU生成一个转换表，执行从虚拟地址到物理地址的转换。表示是否执行对SPRAM的访问的标志信息被包括在该转换表中。如果标志被设置，LSU绝对访问SPRAM。因此，不需要将SPRAM分配给主存储器的存储器映射，并且简化了存储器映射的分配。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式