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1. 发明授权

US5837609A Fully additive method of applying a circuit pattern to a three-dimensional, nonconductive part 失效
标题翻译：将电路图案应用于三维非导电部件的全加法方法
公开(公告)号：US5837609A
公开(公告)日：1998-11-17
申请号：US784886
申请日：1997-01-16
申请人： Michael George Todd , Robert Edward Belke, Jr. , Andrew Zachary Glovatsky
发明人： Michael George Todd , Robert Edward Belke, Jr. , Andrew Zachary Glovatsky
IPC分类号： H05K1/00 , H05K3/18 , H01L21/44
CPC分类号： H05K3/182 , H05K1/0284
摘要： A fully additive method of applying a circuit pattern to a three-dimensional, nonconductive part comprises: pretreating the surface of the part; pad-printing a surface catalyst in a solvent carrier onto the surface in the shape of a desired circuit pattern; and applying an electroless copper deposit onto the surface catalyst, thereby providing a copper layer on the surface in the desired circuit pattern shape.
摘要翻译：将电路图案应用于三维非导电部件的完全添加方法包括：预处理部件的表面; 将溶剂载体中的表面催化剂以期望的电路图形形式在表面上印刷到表面上; 以及将表面催化剂上的无电镀铜层施加到表面上，由此在所希望的电路图案形状的表面上形成铜层。

2. 发明授权

US5914534A Three-dimensional multi-layer molded electronic device and method for manufacturing same 失效
标题翻译：三维多层成型电子器件及其制造方法
公开(公告)号：US5914534A
公开(公告)日：1999-06-22
申请号：US642722
申请日：1996-05-03
申请人： Michael George Todd , Peter Joseph Sinkunas , Andrew Zachary Glovatsky
发明人： Michael George Todd , Peter Joseph Sinkunas , Andrew Zachary Glovatsky
IPC分类号： H05K1/00 , H05K1/11 , H05K1/14 , H05K3/36 , H05K3/46 , H01L21/44 , H01L23/02 , H01L23/16 , H01L29/41
CPC分类号： H05K3/462 , H05K1/119 , H05K1/144 , H01L2924/1515 , H05K1/0284 , H05K2201/09045 , H05K2201/09118 , H05K2201/09536 , H05K2201/096 , H05K2201/09845 , H05K2201/1059 , H05K2201/10666 , H05K2203/167 , H05K3/368 , H05K3/4623 , Y10S438/977
摘要： A three-dimensional multi-layer molded electronic device and method for manufacturing same, wherein the device comprises at least two molded, three-dimensional substrates having mating surfaces, each substrate including a layer of patterned conductive material on at least one surface and electrically conductive vias at selected locations of the substrate for interconnection of the conductive layers, wherein the substrates are electrically joined at their mating surfaces and the circuit layers are aligned and interconnected to form a multi-layer, three-dimensional circuit which may include molded-in structural features.
摘要翻译：一种三维多层成型电子器件及其制造方法，其中所述器件包括至少两个具有配合表面的模制的三维衬底，每个衬底在至少一个表面上包括图案化的导电材料层并具有导电性在基板的选定位置处的通孔，用于导电层的互连，其中基板在其配合表面处电连接，并且电路层被对准和互连以形成多层三维电路，其可以包括模制结构特征。

3. 发明授权

US5878487A Method of supporting an electrical circuit on an electrically insulative base substrate 失效
标题翻译：在电绝缘基底上支撑电路的方法
公开(公告)号：US5878487A
公开(公告)日：1999-03-09
申请号：US718166
申请日：1996-09-19
申请人： Richard Keith McMillan, II , Andrew Zachary Glovatsky , Michael George Todd
发明人： Richard Keith McMillan, II , Andrew Zachary Glovatsky , Michael George Todd
IPC分类号： H05K1/02 , H05K3/10 , H05K3/42 , H05K3/46 , H01K3/10
CPC分类号： H05K1/0245 , H05K1/0224 , H05K1/0228 , H05K3/107 , H05K3/428 , H05K3/4685 , H05K1/0253 , H05K2201/0376 , H05K2201/0379 , H05K2201/0715 , H05K2201/09681 , H05K2201/097 , Y10T29/49126 , Y10T29/49155 , Y10T29/49165
摘要： A method of supporting an electrical circuit on an electrically insulative base substrate comprises embossing a first circuit pattern on the substrate, and plating or etching a second circuit pattern over the first circuit pattern such that the first and second circuit patterns are in physical contact with each other for electrical communication therebetween. Plated through-holes are provided for facilitating support of a twisted pair of electrical conductors on a base substrate.
摘要翻译：一种在电绝缘基底基板上支撑电路的方法包括在衬底上压印第一电路图案，以及在第一电路图案上电镀或蚀刻第二电路图案，使得第一和第二电路图案与每个电路图案物理接触另一个用于其间的电气通信。提供镀通孔以便于支撑基底基板上的双绞电导体。

4. 发明授权

US06528736B1 Multi-layer printed circuit board and method of making same 失效
标题翻译：多层印刷电路板及其制作方法
公开(公告)号：US06528736B1
公开(公告)日：2003-03-04
申请号：US08786494
申请日：1997-01-21
申请人： Daniel Phillip Dailey , Robert Edward Belke, Jr. , Jay DeAvis Baker , Achyuta Achari , Myron Lemecha , Michael George Todd
发明人： Daniel Phillip Dailey , Robert Edward Belke, Jr. , Jay DeAvis Baker , Achyuta Achari , Myron Lemecha , Michael George Todd
IPC分类号： H01R909
CPC分类号： H05K3/4092 , H05K3/4685
摘要： Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.
摘要翻译：适用于减少界面剪切应力的多层印刷电路板的制造方法包括具有形成第一主表面的顶层，具有预定厚度的中间层和形成与第一主表面相对的第二主表面的底层的层压基板主要表面。蚀刻抗蚀剂设置在对应于所需导体图案的反向图像的第一和第二表面上。此后蚀刻第一表面和第二表面，并除去光致抗蚀剂。层压基板通过低模块粘合剂层固定到基体的主表面。之后选择性地蚀刻层压基板的中间层，以隔离第一和第二表面的选定部分，并且限定其间具有等于预定厚度的高度的内部连接区域。

5. 发明授权

US6100178A Three-dimensional electronic circuit with multiple conductor layers and method for manufacturing same 失效
标题翻译：具有多导体层的三维电子电路及其制造方法
公开(公告)号：US6100178A
公开(公告)日：2000-08-08
申请号：US808403
申请日：1997-02-28
申请人： Michael George Todd , Andrew Zachary Glovatsky , Peter Joseph Sinkunas
发明人： Michael George Todd , Andrew Zachary Glovatsky , Peter Joseph Sinkunas
IPC分类号： H05K1/00 , H05K3/10 , H05K3/46 , H01L21/4763 , H01L21/00
CPC分类号： H05K3/4644 , H05K1/0284 , H05K2201/09118 , H05K3/108 , Y10T29/49128
摘要： A three-dimensional multi-layer electronic device and method for manufacturing same, wherein the device comprises a three-dimensional substrate including a conductive trace on at least one surface of the substrate, a thin layer of dielectric material substantially covering a desired portion of the conductive trace(s) on the substrate, the dielectric layer including vias at selected locations, and applying a coating of conductive material on the dielectric layer and in the vias, and defining a conductive trace in the material to thereby form a multi-layer, interconnected three-dimensional electronic device. Additional layers of dielectric material and conductive traces may be similarly applied to create the desired number of circuit layers. Molded-in structural features, and/or vias may be defined in the appropriate layers to accommodate the attachment and/or interconnection of other electronic devices to the device.
摘要翻译：一种三维多层电子器件及其制造方法，其中所述器件包括在衬底的至少一个表面上包括导电迹线的三维衬底，基本覆盖所述衬底的所需部分的介电材料薄层导电迹线，介电层包括选定位置处的通孔，以及在介电层和通孔中施加导电材料涂层，并在材料中限定导电迹线，从而形成多层，互联三维电子设备。可以类似地应用附加的介电材料层和导电迹线以产生所需数量的电路层。模制的结构特征和/或通孔可以在适当的层中限定，以适应其他电子设备到设备的附接和/或互连。

6. 发明授权

US5938455A Three-dimensional molded circuit board having interlocking connections 失效
标题翻译：具有互锁连接的三维模制电路板
公开(公告)号：US5938455A
公开(公告)日：1999-08-17
申请号：US649735
申请日：1996-05-15
申请人： Andrew Zachary Glovatsky , Michael George Todd , Peter Joseph Sinkunas , Myron Lemecha
发明人： Andrew Zachary Glovatsky , Michael George Todd , Peter Joseph Sinkunas , Myron Lemecha
IPC分类号： H01R31/08 , H05K1/00 , H05K1/11 , H05K3/32 , H05K3/36 , H05K3/40 , H05K3/42 , H01R9/09
CPC分类号： H01R12/58 , H01R12/523 , H05K1/119 , H05K3/326 , H05K3/368 , H01R31/08 , H05K1/0284 , H05K1/117 , H05K2201/0191 , H05K2201/09036 , H05K2201/09045 , H05K2201/09118 , H05K2201/09163 , H05K2201/09472 , H05K2201/09481 , H05K2201/096 , H05K2201/09845 , H05K2201/10386 , H05K2201/10393 , H05K2201/1059 , H05K2201/209 , H05K2203/167 , H05K3/325 , H05K3/36 , H05K3/403 , H05K3/42
摘要： A circuit board assembly is disclosed comprising a pair of three-dimensional substrates having integral, metallized connectors. The connector of the first substrate protrudes therefrom, while the connector of the second substrate is recessed therein. The geometries of the protruding connector and the recessed connector are different such that they deform when assembled to provide an electrical connection and a detachable physical connection. In one embodiment, the recessed connector has a parabolic cross-section and the protruding connector has a circular cross-section. A flexible molded edge connector for the circuit board assembly is also disclosed.
摘要翻译：公开了一种电路板组件，其包括具有整体金属化连接器的一对三维基板。第一基板的连接器从其突出，而第二基板的连接器凹入其中。突出连接器和凹入连接器的几何形状不同，使得它们在组装时变形以提供电连接和可拆卸的物理连接。在一个实施例中，凹入式连接器具有抛物面截面，并且突出连接器具有圆形横截面。还公开了一种用于电路板组件的柔性成型边缘连接器。

7. 发明授权

US06555015B1 Multi-layer printed circuit board and method of making same 失效
公开(公告)号：US06555015B1
公开(公告)日：2003-04-29
申请号：US09712838
申请日：2000-11-09
申请人： Daniel Phillip Dailey , Robert Edward Belke, Jr. , Jay DeAvis Baker , Achyuta Achari , Myron Lemecha , Michael George Todd
发明人： Daniel Phillip Dailey , Robert Edward Belke, Jr. , Jay DeAvis Baker , Achyuta Achari , Myron Lemecha , Michael George Todd
IPC分类号： H01B1300
CPC分类号： H05K3/4092 , H05K3/4685
摘要： Method of manufacturing a multi-layer printed circuit board adapted for reduce interfacial sheer stresses includes a laminate substrate having a top layer forming a first major surface, a middle layer having a predetermined thickness and a bottom layer forming a second major surface opposed to the first major surface. Etch resists are disposed on the first and second surfaces corresponding to reverse images of desired conductor patterns. The first and second surfaces are thereafter etched and the photoresist removed. The laminate substrate is secured via a low modules adhesive layer to a major surface of a base. The middle layer of the laminate substrate is thereafter selectively etched so as to isolate selected portions of the first and second surfaces and to define inner connect regions therebetween having a height equal to the predetermined thickness.

8. 发明授权

US5909839A Method for dispensing solder paste on a non-planar substrate using an array of ultrasonically agitated pins 失效
标题翻译：使用超声波搅拌销的阵列在非平面基板上分配焊膏的方法
公开(公告)号：US5909839A
公开(公告)日：1999-06-08
申请号：US857159
申请日：1997-05-15
申请人： Robert Edward Belke, Jr. , John Trublowski , Michael George Todd
发明人： Robert Edward Belke, Jr. , John Trublowski , Michael George Todd
IPC分类号： B23K1/20 , B23K31/02 , B23K35/14 , B60R16/02 , H05K1/00 , H05K3/34 , B23K35/12
CPC分类号： H05K3/3484 , H02G3/266 , H05K1/0284 , H05K2201/09018 , H05K2203/0195 , H05K2203/0338
摘要： A method is provided for applying a fluid to a plurality of locations on a non-planar substrate. The apparatus used includes a movable base and an array of pins connected to the base. Each pin has a distal end which is vertically movable with respect to the base independently of the rest of the array of pins. Each distal end is adapted to transfer fluid to a location on the substrate by having a greater affinity for the fluid than the fluid has for itself and a lesser affinity for the fluid than the fluid has for the substrate. Accordingly, the distal ends may be dipped in the fluid and moved into contact with the substrate such that the distal ends may collapse toward the base as the distal ends engage the substrate to facilitate further movement of the base toward the substrate for application of fluid to each of the plurality of locations.
摘要翻译：提供了一种将流体施加到非平面基底上的多个位置的方法。所使用的装置包括可移动基座和连接到基座的销的阵列。每个销具有远端，该远端相对于底座可垂直移动，而与销的其余部分无关。每个远端适合于通过对流体具有比流体本身更大的亲和力并且对流体具有比流体对底物更小的亲和力，将流体转移到基底上的位置。因此，远端可以浸入流体中并且移动到与基底接触，使得当远端接合基底时，远端可能朝向基部折叠，以便于基部朝向基底的进一步移动以将流体施加到多个位置中的每一个。

9. 发明授权

US06197145B1 Method of laminating a flexible circuit to a substrate 失效
标题翻译：将柔性电路层叠到基板的方法
公开(公告)号：US06197145B1
公开(公告)日：2001-03-06
申请号：US09134729
申请日：1998-08-17
申请人： Michael George Todd , Rexanne M. Coyner , Andrew Zachary Glovatsky , Daniel Phillip Dailey , Robert Edward Belke
发明人： Michael George Todd , Rexanne M. Coyner , Andrew Zachary Glovatsky , Daniel Phillip Dailey , Robert Edward Belke
IPC分类号： H05K300
CPC分类号： B29C45/14811 , B29K2715/006 , B29K2995/0005 , H05K1/0393 , H05K3/0064 , H05K2203/1105 , H05K2203/1327 , Y10T29/49146 , Y10T29/49158
摘要： A method of attaching a flexible plastic film having electronic circuit traces to a rigid plastic substrate. The film and substrate are made from different incompatible plastic materials that do not bond to one another and have different CTE. The use of different or incompatible materials is useful where the properties of the backing structure and film are selected to achieve different results. For example, the flexible film may be selected from a material that provides a high melting point to withstand soldering while the backing material is selected from a low-cost and light weight plastic material that has a lower melting point. The film has conductive traces on at least one surface thereof and a backing surface. A heat activated adhesive is applied to the backing surface. The film is placed within an open injection mold and the mold is closed. A hot plastic resin is injected into the mold adjacent the adhesive. The resin heats the adhesive above its activation temperature and causes the adhesive to bond to both the backing surface and the plastic resin. The resin is allowed to cool and the finished circuit assembly is removed from the mold.
摘要翻译：将具有电子电路迹线的柔性塑料膜附接到刚性塑料基板的方法。膜和基底由不相互粘合并具有不同CTE的不相容的塑料材料制成。当选择背衬结构和膜的性质以获得不同的结果时，使用不同的或不相容的材料是有用的。例如，柔性膜可以选自提供高熔点以承受焊接的材料，而背衬材料选自具有较低熔点的低成本且重量轻的塑料材料。该膜在其至少一个表面和背衬表面上具有导电迹线。将热活化粘合剂施加到背衬表面。将薄膜放置在开放式注射模具内，模具关闭。将热塑性树脂注入邻近粘合剂的模具中。树脂将粘合剂加热到其活化温度以上，并使粘合剂粘合到背衬表面和塑料树脂上。使树脂冷却，并将完成的电路组件从模具中取出。

10. 发明授权

US06740246B2 Circuit board and a method for making the same 失效
标题翻译：电路板及其制作方法
公开(公告)号：US06740246B2
公开(公告)日：2004-05-25
申请号：US09836645
申请日：2001-04-17
申请人： Andrew Zachary Glovatsky , Robert Edward Belke , Marc Alan Straub , Michael George Todd
发明人： Andrew Zachary Glovatsky , Robert Edward Belke , Marc Alan Straub , Michael George Todd
IPC分类号： H01B1300
CPC分类号： H05K3/4641 , H05K3/062 , H05K3/4038 , H05K3/44 , H05K3/4623 , H05K3/4652 , H05K2201/0305 , H05K2201/0361 , H05K2201/0397 , H05K2201/09554 , H05K2201/09881 , H05K2203/0733 , H05K2203/1184 , Y10T29/49124 , Y10T29/49155 , Y10T29/49156
摘要： A method for making multi-layer electronic circuit boards 64 having “blind” type apertures 28, 30 which may be selectively and electrically grounded and further having selectively formed air bridges and/or crossover circuits 45, 46.
摘要翻译：一种用于制造具有“盲”型孔28,30的多层电子电路板64的方法，其可选择性地和电接地，并且还具有选择性地形成的空气桥和/或交叉电路45,46。

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