专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20060184776A1 Methods to randomly or pseudo-randomly, without bias, select instruction for performance analysis in a microprocessor 失效
公开(公告)号：US20060184776A1
公开(公告)日：2006-08-17
申请号：US11055848
申请日：2005-02-11
申请人： James Bishop , Michael Floyd , Alexander Mericas , Robert Mirabella , Dung Nguyen , Philip Vitale
发明人： James Bishop , Michael Floyd , Alexander Mericas , Robert Mirabella , Dung Nguyen , Philip Vitale
IPC分类号： G06F9/44
CPC分类号： G06F11/3409 , G06F11/3466 , G06F11/349 , G06F2201/86 , G06F2201/88 , G06F2201/885
摘要： A method for pseudo-randomly, without bias, selecting instructions for marking in a microprocessor. Responsive to reading an instruction from an instruction cache, an instruction tag associated with the instruction is compared against a pseudo-randomly generated value in a linear feedback shift register (LFSR). If the instruction tag matches the value in the LFSR, a mark bit, indicating the instruction is a marked instruction, is sent with the instruction to an execution unit. Responsive to an indication from the performance monitor, the value in the LFSR is incremented prior to selecting a next instruction to mark. If the value equals a predetermined prime number of increments, the value is reset to all ones to avoid any harmonics with the code stream being executed. Upon receiving the marked instruction, the execution unit combines the marked bit with a selected event and reports the marked event to the performance monitor.

2. 发明申请

US20060179359A1 Apparatus, system, computer program product and method of seamlessly integrating thermal event information data with performance monitor data 有权
标题翻译：仪器，系统，计算机程序产品和方法将热事件信息数据与性能监视数据无缝集成
公开(公告)号：US20060179359A1
公开(公告)日：2006-08-10
申请号：US11054292
申请日：2005-02-09
申请人： Michael Floyd , Alexander Mericas , Robert Mirabella
发明人： Michael Floyd , Alexander Mericas , Robert Mirabella
IPC分类号： G06F11/00
CPC分类号： G06F11/00
摘要： An apparatus, system and method of integrating performance monitor data with thermal event information are provided. A thermal event, in this case, is when the temperature of a chip within which is embedded a processor exceeds a user-configurable value while the processor is processing instructions and/or using storage devices that are being monitored. In any event, when the thermal event occurs, the temperature of the chip along with the performance monitor data is stored for future uses, which include performance and diagnostic analyses.
摘要翻译：提供了一种将性能监控数据与热事件信息集成的设备，系统和方法。在这种情况下，当事件处理器处理指令和/或使用正被监视的存储设备时，嵌入处理器的芯片的温度超过用户可配置值时，就会发生热事件。无论如何，当发生热事件时，将存储芯片的温度以及性能监视数据以供将来使用，包括性能和诊断分析。

3. 发明申请

US20060184834A1 Method, apparatus, and computer program product in a processor for concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers 失效
标题翻译：处理器中的方法，装置和计算机程序产品，用于在跟踪过程和使用可编程可变数量的共享存储器写入缓冲器的非跟踪处理之间并发共享存储器控制器
公开(公告)号：US20060184834A1
公开(公告)日：2006-08-17
申请号：US11055845
申请日：2005-02-11
申请人： Ra'ed Al-Omari , Alexander Mericas , William Starke
发明人： Ra'ed Al-Omari , Alexander Mericas , William Starke
IPC分类号： G06F11/00
CPC分类号： G06F11/2268 , G06F11/348
摘要： A method, apparatus, and computer program product are disclosed for, in a processor, concurrently sharing a memory controller among a tracing process and non-tracing processes using a programmable variable number of shared memory write buffers. A hardware trace facility captures hardware trace data in a processor. The hardware trace facility is included within the processor. The hardware trace data is transmitted to a system memory utilizing a system bus. The system memory is included within the system. The system bus is capable of being utilized by processing units included in the processing node while the hardware trace data is being transmitted to the system bus. Part of system memory is utilized to store the trace data. The system memory is capable of being accessed by processing units in the processing node other than the hardware trace facility while part of the system memory is being utilized to store the trace data.
摘要翻译：公开了一种方法，装置和计算机程序产品，用于在处理器中使用可编程可变数量的共享存储器写缓冲器在跟踪处理和非跟踪处理之间共享存储器控制器。硬件跟踪设备捕获处理器中的硬件跟踪数据。硬件跟踪工具包含在处理器内。使用系统总线将硬件跟踪数据传输到系统存储器。系统内存包含在系统中。当将硬件跟踪数据发送到系统总线时，系统总线能够被包括在处理节点中的处理单元利用。系统内存的一部分用于存储跟踪数据。系统存储器能够被处理节点除硬件跟踪设备之外的处理单元访问，同时系统存储器的一部分用于存储跟踪数据。

4. 发明申请

US20060184833A1 Method, apparatus, and computer program product in a processor for performing in-memory tracing using existing communication paths 失效
标题翻译：处理器中的方法，装置和计算机程序产品，用于使用现有通信路径执行内存中跟踪
公开(公告)号：US20060184833A1
公开(公告)日：2006-08-17
申请号：US11055821
申请日：2005-02-11
申请人： Ra'ed Al-Omari , Alexander Mericas , William Starke
发明人： Ra'ed Al-Omari , Alexander Mericas , William Starke
IPC分类号： G06F11/00
CPC分类号： G06F11/2268 , G06F11/348
摘要： A method, apparatus, and computer program product are disclosed for performing in-memory hardware tracing in a processor using an existing system bus. The processor includes multiple processing units that are coupled together utilizing the system bus. The processing units include a memory controller that controls a system memory. Information is transmitted among the processing units utilizing the system bus. The information is formatted according to a standard system bus protocol. Hardware trace data is captured utilizing a hardware trace facility that is coupled directly to the system bus. The system bus is utilized for transmitting the hardware trace data to the memory controller for storage in the system memory. The memory controller is coupled directly to the system bus. The hardware trace data is formatted according to the standard system bus protocol for transmission via the system bus.
摘要翻译：公开了一种用于使用现有系统总线在处理器中执行存储器内硬件跟踪的方法，装置和计算机程序产品。处理器包括利用系统总线耦合在一起的多个处理单元。处理单元包括控制系统存储器的存储器控制器。利用系统总线在处理单元之间传送信息。信息根据标准系统总线协议进行格式化。使用直接耦合到系统总线的硬件跟踪功能来捕获硬件跟踪数据。系统总线用于将硬件跟踪数据发送到存储器控制器以存储在系统存储器中。存储器控制器直接耦合到系统总线。硬件跟踪数据根据标准系统总线协议进行格式化，以便通过系统总线进行传输。

5. 发明申请

US20060184777A1 Method, apparatus and computer program product for identifying sources of performance events 失效
标题翻译：用于识别性能事件来源的方法，设备和计算机程序产品
公开(公告)号：US20060184777A1
公开(公告)日：2006-08-17
申请号：US11405050
申请日：2006-04-17
申请人： Alexander Mericas
发明人： Alexander Mericas
IPC分类号： G06F9/44
CPC分类号： G06F9/3885 , G06F9/3017 , G06F9/384 , G06F9/3853 , G06F9/3855 , G06F9/3861 , G06F11/348 , G06F2201/86 , G06F2201/88
摘要： Event vectors are included in an instruction tracking structure of a processor to collect history for every instruction flowing through the processor. Such an event vector, by its nature, cannot be whole until the vector's corresponding instruction completes. However, some information for the event vector is collected earlier, i.e., as the instruction flows through the processor prior to completion. Upon completion of the instruction, the instruction's event vector is examined. In each case a determination is made from the instruction history contained in the event vector as to whether a particular instruction has or has not caused or encountered an event of interest. Responsive to the determination, and possibly other information, a selection is made between saving event vector information and discarding the information.
摘要翻译：事件向量包括在处理器的指令跟踪结构中，以收集流过处理器的每个指令的历史。这样一个事件向量，其性质，直到向量的相应指令完成才能完成。然而，先前收集事件向量的一些信息，即当指令在完成之前流经处理器时。指令完成后，检查指令的事件向量。在每种情况下，从包含在事件向量中的指令历史确定特定指令是否具有或没有引起或遇到感兴趣的事件。响应于确定以及可能的其他信息，在保存事件向量信息和丢弃信息之间进行选择。

6. 发明申请

US20060184836A1 Method, apparatus, and computer program product in a processor for dynamically during runtime allocating memory for in-memory hardware tracing 失效
标题翻译：处理器中的方法，装置和计算机程序产品在运行时动态地分配用于存储器内硬件跟踪的存储器
公开(公告)号：US20060184836A1
公开(公告)日：2006-08-17
申请号：US11055977
申请日：2005-02-11
申请人： Ra'ed Al-Omari , Alexander Mericas , William Starke
发明人： Ra'ed Al-Omari , Alexander Mericas , William Starke
IPC分类号： G06F11/00
CPC分类号： G06F11/2268 , G06F11/3476 , G06F11/348
摘要： A method, apparatus, and computer program product are disclosed in a processor for dynamically, during runtime, allocating memory for in-memory hardware tracing. The processor is included within a data processing system. The processor includes multiple processing units that are coupled together utilizing a system bus. The processing units include a memory controller that controls a system memory. A particular size of the system memory is determined that is needed for storing trace data. A hardware trace facility requests, dynamically after the data processing system has completed booting, the particular size of the system memory to be allocated to the hardware trace facility for storing trace data that is captured by the hardware trace facility. The firmware selects particular locations within the system memory. All of the particular locations together are the particular size. The firmware allocates the particular locations for use exclusively by the hardware trace facility.
摘要翻译：在处理器中公开了一种方法，装置和计算机程序产品，用于在运行时期间动态地为存储器内硬件跟踪分配存储器。处理器包含在数据处理系统中。处理器包括使用系统总线耦合在一起的多个处理单元。处理单元包括控制系统存储器的存储器控制器。确定存储跟踪数据所需的特定大小的系统存储器。硬件跟踪设施在数据处理系统完成启动之后动态地请求要分配给硬件跟踪设备的系统内存的特定大小，用于存储由硬件跟踪设备捕获的跟踪数据。固件选择系统内存中的特定位置。所有特定位置在一起是特定的尺寸。固件分配由硬件跟踪设备专门使用的特定位置。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式