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1. 发明申请

US20150279836A1 INTEGRATED CIRCUIT ELECTRICAL PROTECTION DEVICE 有权
标题翻译：集成电路电气保护装置
公开(公告)号：US20150279836A1
公开(公告)日：2015-10-01
申请号：US14231849
申请日：2014-04-01
申请人： Michael A. Stockinger , Wenzhong Zhang , Xu Zhang
发明人： Michael A. Stockinger , Wenzhong Zhang , Xu Zhang
IPC分类号： H01L27/02
CPC分类号： H01L27/0285 , H01L27/0274 , H01L29/1087 , H01L29/4238 , H01L29/78
摘要： An integrated circuit electrical protection device is disclosed that includes a semiconductor substrate and a plurality of transistor fingers partitioned into a plurality of segments. The segments are distinguished from one another by well-ties spaced apart from each other within a source/drain region that is shared by adjacent segments.
摘要翻译：公开了一种集成电路电气保护装置，其包括半导体衬底和划分成多个段的多个晶体管指状物。通过在由相邻段共享的源极/漏极区域内彼此间隔开的区域，这些区段彼此区分开。

2. 发明授权

US09202808B2 Integrated circuit electrical protection device 有权
标题翻译：集成电路电气保护装置
公开(公告)号：US09202808B2
公开(公告)日：2015-12-01
申请号：US14231849
申请日：2014-04-01
申请人： Michael A. Stockinger , Wenzhong Zhang , Xu Zhang
发明人： Michael A. Stockinger , Wenzhong Zhang , Xu Zhang
IPC分类号： H01L27/02
CPC分类号： H01L27/0285 , H01L27/0274 , H01L29/1087 , H01L29/4238 , H01L29/78
摘要： An integrated circuit electrical protection device is disclosed that includes a semiconductor substrate and a plurality of transistor fingers partitioned into a plurality of segments. The segments are distinguished from one another by well-ties spaced apart from each other within a source/drain region that is shared by adjacent segments.
摘要翻译：公开了一种集成电路电气保护装置，其包括半导体衬底和划分成多个段的多个晶体管指状物。通过在由相邻段共享的源极/漏极区域内彼此间隔开的区域，这些区段彼此区分开。

3. 发明申请

US20110316610A1 TRANSMISSION GATE CIRCUITRY FOR HIGH VOLTAGE TERMINAL 有权
标题翻译：用于高压端子的传输门电路
公开(公告)号：US20110316610A1
公开(公告)日：2011-12-29
申请号：US12824991
申请日：2010-06-28
申请人： Michael A. Stockinger , Jose A. Camarena , Wenzhong Zhang
发明人： Michael A. Stockinger , Jose A. Camarena , Wenzhong Zhang
IPC分类号： H03K17/687 , H03K17/00
CPC分类号： H03K17/102
摘要： A transmission gate circuit includes a first transmission gate, having a first switching device, coupled in series with a second transmission gate, having a second switching device, and control circuitry which places the first transmission gate and the second transmission gate into a conductive state to provide a conductive path through the first transmission gate and the second transmission gate. When the voltage of the first terminal is above a first voltage level and outside a safe operating voltage area of at least one of the first and second switching device, the first switching device remains within its safe operating voltage area and the second switching device remains within its safe operating voltage area.
摘要翻译：传输门电路包括具有第一开关装置的第一传输门，第一开关装置与第二传输门串联，具有第二开关装置，以及控制电路，其将第一传输门和第二传输门置于导通状态提供穿过第一传输门和第二传输门的导电路径。当第一端子的电压高于第一电压电平并且在第一和第二开关装置中的至少一个的安全工作电压区域之外时，第一开关装置保持在其安全工作电压区域内，并且第二开关装置保持在其安全工作电压面积。

4. 发明授权

US08228109B2 Transmission gate circuitry for high voltage terminal 有权
标题翻译：用于高电压端子的传输门电路
公开(公告)号：US08228109B2
公开(公告)日：2012-07-24
申请号：US12824991
申请日：2010-06-28
申请人： Michael A. Stockinger , Jose A. Camarena , Wenzhong Zhang
发明人： Michael A. Stockinger , Jose A. Camarena , Wenzhong Zhang
IPC分类号： H03K5/08
CPC分类号： H03K17/102
摘要： A transmission gate circuit includes a first transmission gate, having a first switching device, coupled in series with a second transmission gate, having a second switching device, and control circuitry which places the first transmission gate and the second transmission gate into a conductive state to provide a conductive path through the first transmission gate and the second transmission gate. When the voltage of the first terminal is above a first voltage level and outside a safe operating voltage area of at least one of the first and second switching device, the first switching device remains within its safe operating voltage area and the second switching device remains within its safe operating voltage area.
摘要翻译：传输门电路包括具有第一开关装置的第一传输门，第一开关装置与第二传输门串联，具有第二开关装置，以及控制电路，其将第一传输门和第二传输门置于导通状态提供穿过第一传输门和第二传输门的导电路径。当第一端子的电压高于第一电压电平并且在第一和第二开关装置中的至少一个的安全工作电压区域之外时，第一开关装置保持在其安全工作电压区域内，并且第二开关装置保持在其安全工作电压面积。

5. 发明授权

US09652577B2 Integrated circuit design using pre-marked circuit element object library 有权
公开(公告)号：US09652577B2
公开(公告)日：2017-05-16
申请号：US14505237
申请日：2014-10-02
申请人： Edward O. Travis , Ertugrul Demircan , Douglas M. Reber , Michael A. Stockinger
发明人： Edward O. Travis , Ertugrul Demircan , Douglas M. Reber , Michael A. Stockinger
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/505 , G06F17/5072
摘要： This disclosure describes an approach to create a library of pre-marked circuit element objects and use the pre-marked circuit element object library to design and fabricate an integrated circuit. Each of the circuit element objects are “pre-marked” and include embedded voltage markers having independent pre-assigned voltage values for each terminal in the circuit element object. When a circuit designer inserts a pre-marked circuit element object in a schematic design, the design tool determines whether each of the circuit element object terminal's pre-assigned voltage values match their corresponding nets to which they are connected. When the circuit designer completes the schematic design that includes valid nets throughout the schematic design, the design tool generates a layout design from the schematic design. The design tool, in turn, generates mask layer data from the layout design when the layout design passes verification testing.

6. 发明申请

US20160098510A1 Integrated Circuit Design Using Pre-Marked Circuit Element Object Library 有权
标题翻译：使用预标记电路元件对象库的集成电路设计
公开(公告)号：US20160098510A1
公开(公告)日：2016-04-07
申请号：US14505237
申请日：2014-10-02
申请人： Edward O. Travis , Ertugrul Demircan , Douglas M. Reber , Michael A. Stockinger
发明人： Edward O. Travis , Ertugrul Demircan , Douglas M. Reber , Michael A. Stockinger
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/505 , G06F17/5072
摘要： This disclosure describes an approach to create a library of pre-marked circuit element objects and use the pre-marked circuit element object library to design and fabricate an integrated circuit. Each of the circuit element objects are “pre-marked” and include embedded voltage markers having independent pre-assigned voltage values for each terminal in the circuit element object. When a circuit designer inserts a pre-marked circuit element object in a schematic design, the design tool determines whether each of the circuit element object terminal's pre-assigned voltage values match their corresponding nets to which they are connected. When the circuit designer completes the schematic design that includes valid nets throughout the schematic design, the design tool generates a layout design from the schematic design. The design tool, in turn, generates mask layer data from the layout design when the layout design passes verification testing.
摘要翻译：本公开描述了创建预先标记的电路元件对象的库的方法，并且使用预先标记的电路元件对象库来设计和制造集成电路。电路元件对象中的每一个都被“预先标记”，并且包括对电路元件对象中的每个端子具有独立的预分配电压值的嵌入式电压标记。当电路设计者在原理图设计中插入预先标记的电路元件对象时，设计工具确定电路元件对象端子的预分配电压值中的每一个是否与它们所连接的相应网络匹配。当电路设计人员在原理图设计中完成包括有效网络的原理图设计时，设计工具将从原理图设计生成布局设计。当布局设计通过验证测试时，设计工具又会从布局设计中生成掩模层数据。

7. 发明申请

US20140139963A1 TRIGGER CIRCUIT AND METHOD FOR IMPROVED TRANSIENT IMMUNITY 有权
标题翻译：触发电路和改进的瞬态免疫的方法
公开(公告)号：US20140139963A1
公开(公告)日：2014-05-22
申请号：US13682604
申请日：2012-11-20
申请人： Michael A. Stockinger
发明人： Michael A. Stockinger
IPC分类号： H02H9/00
CPC分类号： H02H9/005 , H03K19/00315
摘要： A trigger circuit detects a transient voltage increase on an integrated circuit. The trigger circuit controls a conductivity state of a clamping device to limit the transient voltage increase. The trigger circuit comprises a common capacitive element having a capacitive value, wherein a first time value and a second time value are dependent upon the capacitive value of the common capacitive element, the first time value applicable to an unpowered state of the integrated circuit and the second time value applicable to a powered state of the integrated circuit. The first time value and the second time value control a trigger circuit parameter which may include a detection range within which a rate of transient voltage increase causes the trigger circuit to become active or an “on” time upon which an active duration of control of the conductivity state of the clamping device depends.
摘要翻译：触发电路检测集成电路上的瞬态电压增加。触发电路控制钳位装置的导电状态以限制瞬态电压增加。触发电路包括具有电容值的公共电容元件，其中第一时间值和第二时间值取决于公共电容元件的电容值，第一时间值适用于集成电路的无动力状态和第二时间值适用于集成电路的供电状态。第一时间值和第二时间值控制触发电路参数，该触发电路参数可以包括其中瞬态电压增加的速率导致触发电路变为有效的检测范围或者在“开”时间，夹紧装置的导电状态依赖。

8. 发明申请

US20140139957A1 INTEGRATED CIRCUIT ELECTRICAL PROTECTION DEVICE 有权
标题翻译：集成电路电气保护装置
公开(公告)号：US20140139957A1
公开(公告)日：2014-05-22
申请号：US13682558
申请日：2012-11-20
申请人： Michael A. Stockinger
发明人： Michael A. Stockinger
IPC分类号： H02H3/20
CPC分类号： H01L27/0277 , H01L27/0629
摘要： An integrated circuit electrical protection device includes a semiconductor substrate, and first, second, and third doped regions of a first polarity in the semiconductor substrate. The first and second doped regions are separated from one another by a first body region having a second polarity and the second and third doped regions are separated from one another by a second body region having the second polarity. The first and second polarities are different from one another. A fourth doped region of the second polarity directly abutting and in contact with the third doped region. A first gate structure is formed over the first body region between the first and second doped regions. A second gate structure is formed over the second body region between the second and third doped regions.
摘要翻译：集成电路电气保护装置包括半导体衬底和半导体衬底中具有第一极性的第一，第二和第三掺杂区域。第一和第二掺杂区域通过具有第二极性的第一体区彼此分离，并且第二和第三掺杂区域通过具有第二极性的第二体区彼此分离。第一和第二极性彼此不同。第二极性的第四掺杂区直接邻接并与第三掺杂区接触。在第一和第二掺杂区域之间的第一体区上形成第一栅极结构。第二栅极结构形成在第二和第三掺杂区域之间的第二体区上。

9. 发明授权

US08274146B2 High frequency interconnect pad structure 有权
标题翻译：高频互连焊盘结构
公开(公告)号：US08274146B2
公开(公告)日：2012-09-25
申请号：US12130579
申请日：2008-05-30
申请人： Michael A. Stockinger , Kevin J. Hess , James W. Miller
发明人： Michael A. Stockinger , Kevin J. Hess , James W. Miller
IPC分类号： H01L23/12
CPC分类号： H01L23/66 , H01L23/522 , H01L23/5222 , H01L23/60 , H01L24/05 , H01L24/45 , H01L24/48 , H01L2224/02166 , H01L2224/0401 , H01L2224/04042 , H01L2224/05095 , H01L2224/05624 , H01L2224/05647 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2224/48624 , H01L2224/48647 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/14 , H01L2924/30105 , H01L2924/00014 , H01L2924/00
摘要： An integrated circuit includes a high speed circuit, an interconnect pad, a passivation layer under the interconnect pad, a first patterned metal layer, and a first via. The high speed circuit is for a high speed signal at a terminal of the high speed circuit. The interconnect pad is on a top surface of the integrated circuit structure. The first patterned metal layer is under the passivation layer having a first portion and a second portion. The first portion of the first patterned metal layer is connected to the terminal of the high speed circuit. The second portion of the first patterned metal layer is under the interconnect pad and is electrically floating when the high frequency signal is present on the interconnect pad portion. The result is reduced capacitive loading on the high speed signal which improves performance.
摘要翻译：集成电路包括高速电路，互连焊盘，互连焊盘下方的钝化层，第一图案化金属层和第一通孔。高速电路用于在高速电路的端子处的高速信号。互连焊盘位于集成电路结构的顶表面上。第一图案化金属层在钝化层下方具有第一部分和第二部分。第一图案化金属层的第一部分连接到高速电路的端子。第一图案化金属层的第二部分在互连焊盘下方并且当高频信号存在于互连焊盘部分上时电浮置。结果是降低了高速信号的电容负载，从而提高了性能。

10. 发明申请

US20110267723A1 OVERVOLTAGE PROTECTION CIRCUIT FOR AN INTEGRATED CIRCUIT 有权
标题翻译：用于集成电路的过电压保护电路
公开(公告)号：US20110267723A1
公开(公告)日：2011-11-03
申请号：US12772769
申请日：2010-05-03
申请人： Michael A. Stockinger , Chris C. Dao , Dale J. McQuirk
发明人： Michael A. Stockinger , Chris C. Dao , Dale J. McQuirk
IPC分类号： H02H9/04
CPC分类号： H01L27/0285 , H01L27/0292
摘要： An overvoltage protection circuit may include a reference voltage generator, a trigger circuit, and a clamping device. The reference voltage generator is for providing a reference voltage that is relatively constant during a powered EOS/ESD event. The trigger circuit is coupled to receive the reference voltage and a power supply voltage. The trigger circuit is for comparing the reference voltage to the power supply voltage. In response to detecting that the power supply voltage is above the reference voltage, the trigger circuit provides a trigger signal having a voltage proportional to a voltage level of the overvoltage event. The clamping device is coupled between a first power supply terminal and a second power supply terminal. The clamping device is for providing a current path between the first and second power supply terminals in response to the trigger signal.
摘要翻译：过电压保护电路可以包括参考电压发生器，触发电路和钳位装置。参考电压发生器用于提供在供电的EOS / ESD事件期间相对恒定的参考电压。触发电路被耦合以接收参考电压和电源电压。触发电路用于将参考电压与电源电压进行比较。响应于检测到电源电压高于参考电压，触发电路提供具有与过电压事件的电压电平成比例的电压的触发信号。夹紧装置耦合在第一电源端子和第二电源端子之间。钳位装置用于响应于触发信号在第一和第二电源端子之间提供电流路径。

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