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1. 发明授权

US5627403A Adhesion between dielectric layers in an integrated circuit 失效
标题翻译：集成电路中介质层之间的粘附
公开(公告)号：US5627403A
公开(公告)日：1997-05-06
申请号：US473552
申请日：1995-06-06
申请人： Maurizio Bacchetta , Laura Bacci , Luca Zanotti
发明人： Maurizio Bacchetta , Laura Bacci , Luca Zanotti
IPC分类号： H01L29/78 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/318 , H01L23/31 , H01L23/532 , H01L21/471 , H01L23/485
CPC分类号： H01L21/02129 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02271 , H01L21/02274 , H01L21/02282 , H01L21/02304 , H01L21/3144 , H01L21/31608 , H01L21/31612 , H01L21/31625 , H01L21/3185 , H01L23/3171 , H01L23/5329 , H01L2924/0002 , Y10S438/902 , Y10S438/958
摘要： A method for improved adhesion between dielectric material layers at their interface during the manufacture of a semiconductor device, comprising operations for forming a first layer (1) of a dielectric material, specifically silicon oxynitride or silicon nitride, on a circuit structure (7) defined on a substrate of a semiconductor material (6) and subsequently forming a second layer (3) of dielectric material (silicon oxynitride or silicon nitride particularly) overlying the first layer (1). Between the first dielectric material layer and the second, a thin oxide layer (2), silicon dioxide in the preferred embodiment, is formed in contact therewith. This interposed oxide (2) serves an adhesion layer function between two superimposed layers (1,3).
摘要翻译：一种用于在制造半导体器件期间在其界面处改善介电材料层之间的粘合力的方法，包括在电路结构（7）上形成电介质材料（特别是氮氧化硅或氮化硅）的第一层（1）的操作，所述电路结构在半导体材料（6）的衬底上，随后形成覆盖在第一层（1）上的电介质材料（特别是氮氧化硅或氮化硅）的第二层（3）。在第一介电材料层和第二介电材料层之间，形成薄的氧化物层（2），优选实施方案中的二氧化硅与其接触。该插入的氧化物（2）用于两个叠加层（1,3）之间的粘合层功能。

2. 发明授权

US5795821A Process for improving the interface union among dielectric materials in an integrated circuit manufacture 失效
标题翻译：用于改善集成电路制造中的电介质材料之间的界面结合的方法
公开(公告)号：US5795821A
公开(公告)日：1998-08-18
申请号：US751244
申请日：1996-11-18
申请人： Maurizio Bacchetta , Laura Bacci , Luca Zanotti
发明人： Maurizio Bacchetta , Laura Bacci , Luca Zanotti
IPC分类号： H01L29/78 , H01L21/31 , H01L21/314 , H01L21/316 , H01L21/318 , H01L23/31 , H01L23/532
CPC分类号： H01L21/02129 , H01L21/0214 , H01L21/02164 , H01L21/0217 , H01L21/02271 , H01L21/02274 , H01L21/02282 , H01L21/02304 , H01L21/3144 , H01L21/31608 , H01L21/31612 , H01L21/31625 , H01L21/3185 , H01L23/3171 , H01L23/5329 , H01L2924/0002 , Y10S438/902 , Y10S438/958
摘要： A method for improved adhesion between dielectric material layers at their interface during the manufacture of a semiconductor device, comprising operations for forming a first layer (1) of a dielectric material, specifically silicon oxynitride or silicon nitride, on a circuit structure (7) defined on a substrate of a semiconductor material (6) and subsequently forming a second layer (3) of dielectric material (silicon oxynitride or silicon nitride particularly) overlying the first layer (1). Between the first dielectric material layer and the second, a thin oxide layer (2), silicon dioxide in the preferred embodiment, is formed in contact therewith. This interposed oxide (2) serves an adhesion layer function between two superimposed layers (1,3).
摘要翻译：一种用于在制造半导体器件期间在其界面处改善介电材料层之间的粘合力的方法，包括在电路结构（7）上形成电介质材料（特别是氮氧化硅或氮化硅）的第一层（1）的操作，所述电路结构在半导体材料（6）的衬底上，随后形成覆盖在第一层（1）上的电介质材料（特别是氮氧化硅或氮化硅）的第二层（3）。在第一介电材料层和第二介电材料层之间，形成薄的氧化物层（2），优选实施方案中的二氧化硅与其接触。该插入的氧化物（2）用于两个叠加层（1,3）之间的粘合层功能。

3. 发明授权

US06531714B1 Process for the production of a semiconductor device having better interface adhesion between dielectric layers 有权
标题翻译：用于生产具有更好的介电层之间的界面粘附性的半导体器件的方法
公开(公告)号：US06531714B1
公开(公告)日：2003-03-11
申请号：US09211065
申请日：1998-12-14
申请人： Maurizio Bacchetta , Luca Zanotti , Giuseppe Queirolo
发明人： Maurizio Bacchetta , Luca Zanotti , Giuseppe Queirolo
IPC分类号： H10K310312
CPC分类号： H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/31608 , H01L21/76801 , H01L23/5329 , H01L2924/0002 , Y10T428/24942 , Y10T428/265 , Y10T428/30 , H01L2924/00
摘要： A method for manufacturing a semiconductor device having improved adhesion at an interface between layers of dielectric material, comprising the steps of forming a first layer of dielectric material on at least one part of a structure defined in a semiconductor substrate and forming a second dielectric material layer superimposed on the least one part of the first layer. The method further includes the step of forming, in the part where the first and second layers are superimposed, an intermediate adhesion layer comprising a ternary compound of silicon, oxygen and carbon. The formation of the adhesion layer takes place at low temperature and in an atmosphere kept essentially free of oxidative substances different from those serving to provide the silicon and the carbon to the layer. Preferably the layer is formed by the plasma enhanced chemical vapour deposition technique. The ternary dielectric compound of silicon, oxygen and carbon obtained is preferably useful to aid in adhesion between layers of dielectric materials, particularly in semiconductor devices. Alternatively, in another embodiment of the invention, in a process which is more generally useful for deposition of a dielectric material layer comprising silicon, the layer is formed at low temperature by the chemical vapour deposition technique, preferably plasma enhanced, in an atmosphere kept essentially free of exogenous oxidative substances, (i.e., in which the oxidizer is contained in the molecules used to provide the species of atoms other than oxygen comprised in the layer).
摘要翻译：一种用于制造在介电材料层之间的界面处具有改善的粘合性的半导体器件的方法，包括以下步骤：在限定在半导体衬底中的结构的至少一部分上形成第一介电材料层，并形成第二介电材料层叠加在第一层的至少一部分上。该方法还包括在重叠第一层和第二层的部分中形成包含硅，氧和碳的三元化合物的中间粘合层的步骤。粘合层的形成发生在低温下和基本上不含氧化物质的气氛中，这些氧化物质不同于向层中提供硅和碳的氧化物质。优选地，该层由等离子体增强化学气相沉积技术形成。获得的硅，氧和碳的三元介电化合物优选用于有助于电介质材料层之间的粘合，特别是在半导体器件中。或者，在本发明的另一个实施例中，在通常可用于沉积包括硅的电介质材料层的方法中，通过化学气相沉积技术在优选等离子体增强的气氛中在低温下形成该层，没有外源性氧化物质（即，其中氧化剂包含在用于提供层中除了氧之外的原子的物质的分子中）。

4. 发明授权

US6153537A Process for the production of a semiconductor device having better interface adhesion between dielectric layers 失效
公开(公告)号：US6153537A
公开(公告)日：2000-11-28
申请号：US577125
申请日：1995-12-22
申请人： Maurizio Bacchetta , Luca Zanotti , Giuseppe Queirolo
发明人： Maurizio Bacchetta , Luca Zanotti , Giuseppe Queirolo
IPC分类号： H01L21/316 , H01L21/318 , H01L21/768 , H01L23/532 , B05D3/06
CPC分类号： H01L21/02126 , H01L21/02216 , H01L21/02274 , H01L21/31608 , H01L21/76801 , H01L23/5329 , H01L2924/0002 , Y10T428/24942 , Y10T428/265 , Y10T428/30
摘要： A method for manufacturing a semiconductor device having improved adhesion at an interface between layers of dielectric material, comprising the steps of forming a first layer of dielectric material on at least one part of a structure defined in a semiconductor substrate and forming a second dielectric material layer superimposed on the least one part of the first layer. The method further includes the step of forming, in the part where the first and second layers are superimposed, an intermediate adhesion layer comprising a ternary compound of silicon, oxygen and carbon. The formation of the adhesion layer takes place at low temperature and in an atmosphere kept essentially free of oxidative substances different from those serving to provide the silicon and the carbon to the layer. Preferably the layer is formed by the plasma enhanced chemical vapour deposition technique. The ternary dielectric compound of silicon, oxygen and carbon obtained is preferably useful to aid in adhesion between layers of dielectric materials, particularly in semiconductor devices. Alternatively, in another embodiment of the invention, in a process which is more generally useful for deposition of a dielectric material layer comprising silicon, the layer is formed at low temperature by the chemical vapour deposition technique, preferably plasma enhanced, in an atmosphere kept essentially free of exogenous oxidative substances, (i.e., in which the oxidizer is contained in the molecules used to provide the species of atoms other than oxygen comprised in the layer).

5. 发明授权

US08124865B2 Method of fabrication of plastic film supported single crystal silicon photovoltaic cell structure 有权
标题翻译：塑料薄膜支撑单晶硅光伏电池结构的制造方法
公开(公告)号：US08124865B2
公开(公告)日：2012-02-28
申请号：US11280002
申请日：2005-11-16
申请人： Pietro Montanini , Paolo Riboli , Luca Zanotti , Michele Palmieri , Marta Mottura
发明人： Pietro Montanini , Paolo Riboli , Luca Zanotti , Michele Palmieri , Marta Mottura
IPC分类号： H01L31/02 , B05D5/12
CPC分类号： H01L31/1804 , H01L31/068 , Y02E10/547 , Y02P70/521
摘要： A method of fabricating a wafer-size photovoltaic cell module includes defining an integrated cellular structure of a light converting monolateral or bilateral junction diode in an epitaxially grown detachable layer including a first deposited metal current collecting terminal of the diode. The method also includes laminating onto the surface of the processed epitaxially grown detachable layer a film of an optical grade plastic material resistant to hydrofluoric acid solutions. The method further includes immersing the wafer in a hydrofluoric acid solution causing detachment of the epitaxially grown silicon layer laminated with the film, and polishing the surface of separation of the detached epitaxially grown layer and forming a second metal current collecting terminal of the diode by masked deposition of a metal at a temperature tolerable by the film.
摘要翻译：制造晶片尺寸光伏电池模块的方法包括在外延生长的可拆卸层中限定光转换单侧或双向结二极管的集成式蜂窝结构，其包括二极管的第一沉积金属集电端。该方法还包括在经处理的外延生长的可剥离层的表面上层压耐氢氟酸溶液的光学级塑料材料的膜。该方法还包括将晶片浸入氢氟酸溶液中，导致与膜层叠的外延生长的硅层脱离，并抛光分离的外延生长层的分离表面，并通过掩模形成二极管的第二金属集电端在该膜容许的温度下沉积金属。

6. 发明授权

US08633553B2 Process for manufacturing a micromechanical structure having a buried area provided with a filter 有权
标题翻译：具有设置有过滤器的掩埋区域的微机械结构的制造方法
公开(公告)号：US08633553B2
公开(公告)日：2014-01-21
申请号：US13190254
申请日：2011-07-25
申请人： Marco Ferrera , Matteo Perletti , Igor Varisco , Luca Zanotti
发明人： Marco Ferrera , Matteo Perletti , Igor Varisco , Luca Zanotti
IPC分类号： H01L29/84 , H01L21/00
CPC分类号： B81C1/00119 , B01D67/0062 , B01D71/02 , B01D2325/021 , B01D2325/028 , B01L3/502707 , B01L3/502753 , B01L2300/0681 , B81B2201/10 , B81C1/00071 , B81C1/00087 , B81C2201/0133 , B81C2201/0157 , F04B19/006
摘要： A process for manufacturing a micromechanical structure envisages: forming a buried cavity within a body of semiconductor material, separated from a top surface of the body by a first surface layer; and forming an access duct for fluid communication between the buried cavity and an external environment. The method envisages: forming an etching mask on the top surface at a first access area; forming a second surface layer on the top surface and on the etching mask; carrying out an etch such as to remove, in a position corresponding to the first access area, a portion of the second surface layer, and an underlying portion of the first surface layer not covered by the etching mask until the buried cavity is reached, thus forming both the first access duct and a filter element, set between the first access duct and the same buried cavity.
摘要翻译：微机械结构的制造方法设想：在半导体材料体内形成通过第一表面层从主体顶表面分离的掩埋腔; 以及形成用于在所述掩埋腔和外部环境之间流体连通的进入管。该方法设想：在第一进入区域的顶表面上形成蚀刻掩模; 在顶表面和蚀刻掩模上形成第二表面层; 进行蚀刻，以在对应于第一进入区域的位置中移除第二表面层的一部分，以及未被蚀刻掩模覆盖的第一表面层的下面部分，直到达到掩埋空腔，因此形成第一进入管道和过滤元件，设置在第一进入管道和相同的掩埋空腔之间。

7. 发明申请

US20120018819A1 PROCESS FOR MANUFACTURING A MICROMECHANICAL STRUCTURE HAVING A BURIED AREA PROVIDED WITH A FILTER 有权
标题翻译：制造具有过滤器的烧结区域的微观结构的方法
公开(公告)号：US20120018819A1
公开(公告)日：2012-01-26
申请号：US13190254
申请日：2011-07-25
申请人： Marco Ferrera , Matteo Perletti , Igor Varisco , Luca Zanotti
发明人： Marco Ferrera , Matteo Perletti , Igor Varisco , Luca Zanotti
IPC分类号： H01L29/84 , H01L21/02
CPC分类号： B81C1/00119 , B01D67/0062 , B01D71/02 , B01D2325/021 , B01D2325/028 , B01L3/502707 , B01L3/502753 , B01L2300/0681 , B81B2201/10 , B81C1/00071 , B81C1/00087 , B81C2201/0133 , B81C2201/0157 , F04B19/006
摘要： A process for manufacturing a micromechanical structure envisages: forming a buried cavity within a body of semiconductor material, separated from a top surface of the body by a first surface layer; and forming an access duct for fluid communication between the buried cavity and an external environment. The method envisages: forming an etching mask on the top surface at a first access area; forming a second surface layer on the top surface and on the etching mask; carrying out an etch such as to remove, in a position corresponding to the first access area, a portion of the second surface layer, and an underlying portion of the first surface layer not covered by the etching mask until the buried cavity is reached, thus forming both the first access duct and a filter element, set between the first access duct and the same buried cavity.
摘要翻译：微机械结构的制造方法设想：在半导体材料体内形成通过第一表面层从主体顶表面分离的掩埋腔; 以及形成用于在所述掩埋腔和外部环境之间流体连通的进入管。该方法设想：在第一进入区域的顶表面上形成蚀刻掩模; 在顶表面和蚀刻掩模上形成第二表面层; 进行蚀刻，以在对应于第一进入区域的位置中移除第二表面层的一部分，以及未被蚀刻掩模覆盖的第一表面层的下面部分，直到达到掩埋空腔，因此形成第一进入管道和过滤元件，设置在第一进入管道和相同的掩埋空腔之间。

8. 发明申请

US20060118164A1 Plastic film supported single crystal silicon photovoltaic cell structure and method of fabrication 有权
标题翻译：塑料薄膜支撑单晶硅光伏电池结构及其制造方法
公开(公告)号：US20060118164A1
公开(公告)日：2006-06-08
申请号：US11280002
申请日：2005-11-16
申请人： Pietro Montanini , Paolo Riboli , Luca Zanotti , Michele Palmieri , Marta Mottura
发明人： Pietro Montanini , Paolo Riboli , Luca Zanotti , Michele Palmieri , Marta Mottura
IPC分类号： H01L21/00 , H01L31/00
CPC分类号： H01L31/1804 , H01L31/068 , Y02E10/547 , Y02P70/521
摘要： A method of fabricating a wafer-size photovoltaic cell module includes defining an integrated cellular structure of a light converting monolateral or bilateral junction diode in an epitaxially grown detachable layer including a first deposited metal current collecting terminal of the diode. The method also includes laminating onto the surface of the processed epitaxially grown detachable layer a film of an optical grade plastic material resistant to hydrofluoric acid solutions. The method further includes immersing the wafer in a hydrofluoric acid solution causing detachment of the epitaxially grown silicon layer laminated with the film, and polishing the surface of separation of the detached epitaxially grown layer and forming a second metal current collecting terminal of the diode by masked deposition of a metal at a temperature tolerable by the film.
摘要翻译：制造晶片尺寸光伏电池模块的方法包括在外延生长的可拆卸层中限定光转换单侧或双向结二极管的集成式蜂窝结构，其包括二极管的第一沉积金属集电端。该方法还包括在经处理的外延生长的可剥离层的表面上层压耐氢氟酸溶液的光学级塑料材料的膜。该方法还包括将晶片浸入氢氟酸溶液中，导致与膜层叠的外延生长的硅层脱离，并抛光分离的外延生长层的分离表面，并通过掩模形成二极管的第二金属集电端在该膜容许的温度下沉积金属。

9. 发明授权

US06888225B2 Process of final passivation of an integrated circuit device 失效
标题翻译：集成电路器件的最终钝化过程
公开(公告)号：US06888225B2
公开(公告)日：2005-05-03
申请号：US10323961
申请日：2002-12-18
申请人： Giorgio De Santi , Luca Zanotti
发明人： Giorgio De Santi , Luca Zanotti
IPC分类号： H01L21/314 , H01L21/316 , H01L21/318 , H01L23/31 , H01L23/58
CPC分类号： H01L21/02164 , H01L21/02211 , H01L21/02274 , H01L21/3145 , H01L21/31612 , H01L21/3185 , H01L23/3171 , H01L2924/0002 , H01L2924/00
摘要： A process for forming a final passivation layer over an integrated circuit comprises a step of forming, over a surface of the integrated circuit, a protective film by means of High-Density Plasma Chemical Vapor Deposition.
摘要翻译：用于在集成电路上形成最终钝化层的方法包括在集成电路的表面上通过高密度等离子体化学气相沉积形成保护膜的步骤。

10. 发明授权

US06187683B1 Method for final passivation of integrated circuit 失效
标题翻译：集成电路最终钝化方法
公开(公告)号：US06187683B1
公开(公告)日：2001-02-13
申请号：US09059740
申请日：1998-04-14
申请人： Giorgio De Santi , Luca Zanotti , Giuseppe Crisenza
发明人： Giorgio De Santi , Luca Zanotti , Giuseppe Crisenza
IPC分类号： H01L21311
CPC分类号： H01L21/31053 , H01L21/31051 , H01L21/31055 , H01L23/3171 , H01L2924/0002 , H01L2924/00
摘要： A planarization method is disclosed to provide improved protection against cracking of the final passivation layer of integrated circuit devices. In one embodiment, such method includes final passivation of an integrated circuit device including at least one integrated circuit chip. Such final passivation includes the step of forming a layer of protective material over a top surface of the integrated circuit chip, and a subsequent step of planarizing such layer of protective material to obtain a protection layer having a substantially flat top surface.
摘要翻译：公开了一种平面化方法，以提供改进的防止集成电路器件的最终钝化层破裂的保护。在一个实施例中，这种方法包括包括至少一个集成电路芯片的集成电路器件的最终钝化。这种最终钝化包括在集成电路芯片的顶表面上形成保护材料层的步骤，以及随后的平坦化这种保护材料层以获得具有基本平坦的顶表面的保护层的步骤。

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