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1. 发明授权

US07389385B2 Methods and apparatus to dynamically insert prefetch instructions based on compiler and garbage collector analysis 失效
标题翻译：基于编译器和垃圾回收器分析动态插入预取指令的方法和装置
公开(公告)号：US07389385B2
公开(公告)日：2008-06-17
申请号：US10742009
申请日：2003-12-19
申请人： Mauricio J. Serrano , Sreenivas Subramoney , Richard L. Hudson , Ali-Reza Adl-Tabatabai
发明人： Mauricio J. Serrano , Sreenivas Subramoney , Richard L. Hudson , Ali-Reza Adl-Tabatabai
IPC分类号： G06F12/00 , G06F9/26 , G06F9/45 , G06F11/30
CPC分类号： G06F12/0253
摘要： Methods and apparatus to insert prefetch instructions based on garbage collector analysis and compiler analysis are disclosed. In an example method, one or more batches of samples associated with cache misses from a performance monitoring unit in a processor system are received. One or more samples from the one or more batches of samples based on delinquent information are selected. A performance impact indicator associated with the one or more samples is generated. Based on the performance indicator, at least one of a garbage collector analysis and a compiler analysis is initiated to identify one or more delinquent paths. Based on the at least one of the garbage collector analysis and the compiler analysis, one or more prefetch points to insert prefetch instructions are identified.
摘要翻译：公开了基于垃圾收集器分析和编译器分析来插入预取指令的方法和装置。在示例性方法中，接收与处理器系统中的来自性能监视单元的高速缓存未命中关联的一个或多个批次的样本。选择一个或多个基于犯罪信息的样本的一个或多个样本。产生与一个或多个样本相关联的性能影响指示符。基于性能指标，启动垃圾回收器分析和编译器分析中的至少一个以识别一个或多个违规路径。基于垃圾收集器分析和编译器分析中的至少一个，识别插入预取指令的一个或多个预取点。

2. 发明授权

US07577947B2 Methods and apparatus to dynamically insert prefetch instructions based on garbage collector analysis and layout of objects 失效
标题翻译：基于垃圾回收器分析和对象布局动态插入预取指令的方法和装置
公开(公告)号：US07577947B2
公开(公告)日：2009-08-18
申请号：US10741897
申请日：2003-12-19
申请人： Sreenivas Subramoney , Mauricio J. Serrano , Richard L. Hudson , Ali-Reza Adl-Tabatabai
发明人： Sreenivas Subramoney , Mauricio J. Serrano , Richard L. Hudson , Ali-Reza Adl-Tabatabai
IPC分类号： G06F9/45
CPC分类号： G06F12/0253 , G06F12/0862 , G06F2212/6026
摘要： Methods and apparatus to dynamically insert prefetch instructions are disclosed. In an example method, one or more samples associated with cache misses are identified from a performance monitoring unit in a processor system. Based on sample information associated with the one or more samples, delinquent information is generated. To dynamically insert one or more prefetch instructions, a prefetch point is identified based on the delinquent information.
摘要翻译：公开了动态插入预取指令的方法和装置。在示例性方法中，与处理器系统中的性能监视单元识别与高速缓存未命中相关联的一个或多个样本。根据与一个或多个样本相关联的样本信息，生成违法信息。为了动态地插入一个或多个预取指令，基于拖欠信息来识别预取点。

3. 发明授权

US08756582B2 Tracking a programs calling context using a hybrid code signature 有权
标题翻译：使用混合代码签名跟踪程序调用上下文
公开(公告)号：US08756582B2
公开(公告)日：2014-06-17
申请号：US13214352
申请日：2011-08-22
申请人： Mauricio J. Serrano
发明人： Mauricio J. Serrano
IPC分类号： G06F9/44 , G06F9/45
CPC分类号： G06F21/54 , G06F11/3466 , G06F11/3612
摘要： A method for a hybrid code signature including executing, via a processor, an application, the executing comprising executing a root instruction of the application; profiling, via the processor, the executing of the application, the profiling comprising storing a reference signature; determining, via the processor, a working signature of instructions executed subsequent to the executing of the root instruction, the determining comprising implementing a hashing function of the instructions in response to storing the reference signature; tracking the updating of the working signature by storing a value in a counter; and updating continuously, via the processor, the working signature with the hashing function while at least the working signature does not match the reference signature.
摘要翻译：一种用于混合代码签名的方法，包括经由处理器执行应用程序，所述执行包括执行所述应用程序的根指令; 通过所述处理器对所述应用的执行进行分析，所述分析包括存储参考签名; 经由所述处理器确定在所述根指令执行之后执行的指令的工作签名，所述确定包括响应于存储所述参考签名来实现所述指令的哈希函数; 通过将值存储在计数器中来跟踪工作签名的更新; 并且通过处理器连续地更新具有散列函数的工作签名，同时至少工作签名与参考签名不匹配。

4. 发明授权

US08621150B2 Data placement optimization using data context collected during garbage collection 有权
标题翻译：使用垃圾收集期间收集的数据环境进行数据放置优化
公开(公告)号：US08621150B2
公开(公告)日：2013-12-31
申请号：US12757173
申请日：2010-04-09
申请人： Mauricio J. Serrano , Xiaotong Zhuang
发明人： Mauricio J. Serrano , Xiaotong Zhuang
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F12/0253 , G06F11/3476 , G06F12/0276 , G06F12/0802 , G06F2201/885
摘要： Mechanisms are provided for data placement optimization during runtime of a computer program. The mechanisms detect cache misses in a cache of the data processing system and collect cache miss information for objects of the computer program. Data context information is generated for an object in an object access sequence of the computer program. The data context information identifies one or more additional objects accessed as part of the object access sequence in association with the object. The cache miss information is correlated with the data context information of the object. Data placement optimization is performed on the object, in the object access sequence, with which the cache miss information is associated. The data placement optimization places connected objects in the object access sequence in close proximity to each other in a memory structure of the data processing system.
摘要翻译：提供了在计算机程序运行期间进行数据放置优化的机制。这些机制检测数据处理系统的缓存中的高速缓存未命中，并收集计算机程序对象的高速缓存未命中信息。为计算机程序的对象访问序列中的对象生成数据上下文信息。数据上下文信息识别作为与对象相关联的对象访问序列的一部分访问的一个或多个附加对象。高速缓存未命中信息与对象的数据上下文信息相关联。在对象访问序列中对对象进行数据放置优化，与缓存未命中信息相关联。数据放置优化将连接的对象放置在数据处理系统的存储器结构中彼此靠近的对象访问序列中。

5. 发明申请

US20130054942A1 TRACKING A PROGRAMS CALLING CONTEXT USING A HYBRID CODE SIGNATURE 有权
标题翻译：使用混合代码签名跟踪程序的呼叫语境
公开(公告)号：US20130054942A1
公开(公告)日：2013-02-28
申请号：US13214352
申请日：2011-08-22
申请人： Mauricio J. Serrano
发明人： Mauricio J. Serrano
IPC分类号： G06F9/38 , G06F9/30
CPC分类号： G06F21/54 , G06F11/3466 , G06F11/3612
摘要： A method for a hybrid code signature including executing, via a processor, an application, the executing comprising executing a root instruction of the application; profiling, via the processor, the executing of the application, the profiling comprising storing a reference signature; determining, via the processor, a working signature of instructions executed subsequent to the executing of the root instruction, the determining comprising implementing a hashing function of the instructions in response to storing the reference signature; tracking the updating of the working signature by storing a value in a counter; and updating continuously, via the processor, the working signature with the hashing function while at least the working signature does not match the reference signature.
摘要翻译：一种用于混合代码签名的方法，包括经由处理器执行应用程序，所述执行包括执行所述应用程序的根指令; 通过所述处理器对所述应用的执行进行分析，所述分析包括存储参考签名; 经由所述处理器确定在所述根指令执行之后执行的指令的工作签名，所述确定包括响应于存储所述参考签名来实现所述指令的哈希函数; 通过将值存储在计数器中来跟踪工作签名的更新; 并且通过处理器连续地更新具有散列函数的工作签名，同时至少工作签名与参考签名不匹配。

6. 发明授权

US06973646B1 Method for compiling program components in a mixed static and dynamic environment 失效
标题翻译：在混合静态和动态环境中编译程序组件的方法
公开(公告)号：US06973646B1
公开(公告)日：2005-12-06
申请号：US09621571
申请日：2000-07-21
申请人： Rajesh Bordawekar , Manish Gupta , Samuel Pratt Midkiff , Mauricio J. Serrano
发明人： Rajesh Bordawekar , Manish Gupta , Samuel Pratt Midkiff , Mauricio J. Serrano
IPC分类号： G06F9/45
CPC分类号： G06F9/45516
摘要： This invention describes a method and several variants for compiling programs or components of programs in a mixed static and dynamic environment, so as to reduce the amount of time and memory spent in run-time compilation, or to exercise greater control over testing of the executable code for the program, or both. The invention involves generating persistent code images prior to program execution based on static compilation or dynamic compilation from a previous run, and then, adapting those images during program execution. We describe a method for generating auxiliary information in addition to the executable code that is recorded in the persistent code image. Further, we describe a method for checking the validity of those code images, adapting those images to the new execution context, and generating new executable code to respond to dynamic events, during program execution. Our method allows global interprocedural optimizations to be performed on the program, even if the programming language supports, or requires, dynamic binding. Variants of the method show how one or several of the features of the method may be performed. The invention is particularly useful in the context of implementing Java Virtual Machines, although it can also be used in implementing other programming languages.
摘要翻译：本发明描述了用于在混合静态和动态环境中编译程序或程序组件的方法和几个变体，以便减少在运行时编译中花费的时间和内存的量，或者更好地控制可执行程序的测试程序的代码，或两者。本发明涉及在基于来自先前运行的静态编译或动态编译之前，在程序执行之前生成持久代码图像，然后在程序执行期间对这些图像进行调整。我们描述除了记录在持久代码图像中的可执行代码之外，还生成辅助信息的方法。此外，我们描述了在程序执行期间检查这些代码图像的有效性，使这些图像适应新的执行上下文以及生成新的可执行代码以响应动态事件的方法。我们的方法允许对程序执行全局过程间优化，即使编程语言支持或需要动态绑定。该方法的变体显示了如何执行该方法的一个或多个特征。本发明在实现Java虚拟机的上下文中是特别有用的，尽管它也可以用于实现其他编程语言。

7. 发明申请

US20130055033A1 HARDWARE-ASSISTED PROGRAM TRACE COLLECTION WITH SELECTABLE CALL-SIGNATURE CAPTURE 审中-公开
标题翻译：硬件辅助程序跟踪采集与可选择的呼叫签名捕获
公开(公告)号：US20130055033A1
公开(公告)日：2013-02-28
申请号：US13300863
申请日：2011-11-21
申请人： Giles R. Frazier , David S. Levitan , Brian R. Mestan , Mauricio J. Serrano
发明人： Giles R. Frazier , David S. Levitan , Brian R. Mestan , Mauricio J. Serrano
IPC分类号： G06F11/34
CPC分类号： G06F11/3466 , G06F11/348 , G06F11/3636 , G06F2201/83 , G06F2201/865
摘要： Hardware-assisted program tracing is facilitated by a processor that includes a root instruction address register, a program trace signature computation unit and a call signature register. When a program instruction having an address matching the root instruction address register is executed, a program trace signature is captured in the call signature register and capture of branch history is commenced. By accumulating different values of the call signature register, for example in response to an interrupt generated when the root instruction is executed, software that performs program tracing can obtain signatures of all of the multiple execution paths that lead to the root instruction, which is also specified by software in order to set different root instructions for program tracing. In an alternative implementation, a storage for multiple call signatures is provided in the processor and read at once by the software.
摘要翻译：硬件辅助程序跟踪由包括根指令地址寄存器，程序跟踪签名计算单元和呼叫签名寄存器的处理器来促进。当执行具有与根指令地址寄存器匹配的地址的程序指令时，在呼叫签名寄存器中捕获程序跟踪签名，并且开始分支历史记录的捕获。通过累积呼叫签名寄存器的不同值，例如响应于执行根指令时产生的中断，执行程序跟踪的软件可以获得导致根指令的所有多个执行路径的签名，这也是由软件指定，以便为程序跟踪设置不同的根指令。在替代实现中，在处理器中提供用于多个呼叫签名的存储器，并由软件一次读取。

8. 发明申请

US20120005463A1 BRANCH TRACE HISTORY COMPRESSION 失效
标题翻译：分行追踪历史压缩
公开(公告)号：US20120005463A1
公开(公告)日：2012-01-05
申请号：US12827916
申请日：2010-06-30
申请人： Brian R. Mestan , Mauricio J. Serrano
发明人： Brian R. Mestan , Mauricio J. Serrano
IPC分类号： G06F9/38
CPC分类号： G06F11/3476 , G06F2201/88
摘要： The disclosure provides a method, data processing system, and computer program product for managing a branch trace environment. In response to a branch being taken for a first branch instruction that is conditional and direct in the branch instructions, a performance monitoring unit stores an effective address of the first branch instruction into a first entry in a set of entries in a memory. The performance monitoring unit counts each branch not taken in processing the branch instructions occurring after the first branch instruction to form a branch count. In response to a branch being taken during processing of subsequent branch instructions in the branch instructions after the first branch instruction, the performance monitoring unit determines whether to create a second entry in the set of entries in the memory using the branch count with a set of rules identifying when the second entry is to be made.
摘要翻译：本公开提供了一种用于管理分支跟踪环境的方法，数据处理系统和计算机程序产品。响应于在分支指令中为有条件且直接的第一分支指令而分支，性能监视单元将第一分支指令的有效地址存储在存储器中的一组条目中的第一条目中。性能监视单元计算在处理在第一分支指令之后发生的分支指令时不采取的每个分支以形成分支计数。响应于在第一分支指令之后在分支指令中处理后续分支指令期间所采取的分支，性能监视单元使用具有一组分支计数的分支计数来确定是否在存储器中的条目集合中创建第二条目识别何时进行第二个条目的规则。

9. 发明申请

US20090113135A1 MECHANISM FOR DATA CACHE REPLACEMENT BASED ON REGION POLICIES 有权
标题翻译：基于区域政策的数据缓存替代机制
公开(公告)号：US20090113135A1
公开(公告)日：2009-04-30
申请号：US11929771
申请日：2007-10-30
申请人： Harold W. Cain , Jong-Deok Choi , Pratak Pattnaik , Mauricio J. Serrano
发明人： Harold W. Cain , Jong-Deok Choi , Pratak Pattnaik , Mauricio J. Serrano
IPC分类号： G06F12/08
CPC分类号： G06F12/126
摘要： A system and method for cache replacement includes: augmenting each cache block in a cache region with a region hint indicating a temporal priority of the cache block; receiving an indication that a cache miss has occurred; and selecting for eviction the cache block comprising the region hint indicating a low temporal priority.
摘要翻译：一种用于高速缓存替换的系统和方法包括：利用指示高速缓存块的时间优先级的区域提示来增强高速缓存区中的每个高速缓存块; 接收发生高速缓存未命中的指示; 以及选择驱逐包含指示低时间优先级的区域提示的高速缓存块。

10. 发明申请

US20090037708A1 TARGET BRANCH PREDICTION USING CORRELATION OF LOCAL TARGET HISTORIES 失效
标题翻译：使用本地目标历史相关的目标分支预测
公开(公告)号：US20090037708A1
公开(公告)日：2009-02-05
申请号：US12246282
申请日：2008-10-06
申请人： Il Park , Mauricio J. Serrano , Jong-Deok Choi
发明人： Il Park , Mauricio J. Serrano , Jong-Deok Choi
IPC分类号： G06F9/38
CPC分类号： G06F9/3806 , G06F9/322 , G06F9/3848
摘要： A system for predicting multiple targets for a single branch includes: a branch target buffer that includes a previous next address for an instruction and that receives an indirect instruction address to provide a first branch target prediction; a first branch table for capturing local past target information of an indirect branch in an encoded form; a second branch table which is a correlation table for storing potential branch targets based on a local branch history and which provides a second branch target prediction when the first branch target prediction is not successful; an exclusion predictor for inhibiting updates of inefficient entries; and a multiplexer to select the predicted target as output.
摘要翻译：用于预测单个分支的多个目标的系统包括：分支目标缓冲器，其包括用于指令的先前的下一个地址并且接收间接指令地址以提供第一分支目标预测; 用于以编码形式捕获间接分支的当地过去目标信息的第一分支表; 第二分支表，其是基于本地分支历史存储潜在分支目标的相关表，并且当第一分支目标预测不成功时提供第二分支目标预测; 用于禁止更低效率条目的排除预测器; 以及选择预测目标作为输出的多路复用器。

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