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1. 发明授权

US6160809A Distributed packet data with centralized snooping and header processing router 失效
标题翻译：分布式数据包采用集中侦听和报头处理路由器
公开(公告)号：US6160809A
公开(公告)日：2000-12-12
申请号：US992453
申请日：1997-12-17
申请人： Matthew James Adiletta , Gilbert Wolrich , John Cyr
发明人： Matthew James Adiletta , Gilbert Wolrich , John Cyr
IPC分类号： H04L12/40 , H04L12/54
CPC分类号： H04L12/403 , H04L12/40013 , H04L12/40032
摘要： A packet processing system or router is disclosed that has at least one central packet-header processor, a packet broadcast bus, and local packet controllers that communicate with each other and the central packet-header processor via the packet broadcast bus. Packets received by media access controllers are passed to the associated local packet controllers and then broadcast on the packet broadcast bus. These broadcast packets are stored in packet buffer memories of the controllers, and the processor snoops for at least headers of the broadcast packets. The headers are analyzed and the processor issues forwarding instructions concerning the broadcast packets to the local packet controllers. As a result, the packet data only traverses the bus once. Only a relatively short forwarding decision is generated after the packets are broadcast and this can occur on a separate control bus, if desired. Thus, by employing centralized snooping for packet header processing coupled with distributed packet data at local controller, bus bandwidth is reduced by one-half over previous centralized configurations in which every packet traversed the bus at least twice.
摘要翻译：公开了一种分组处理系统或路由器，其具有至少一个中央分组报头处理器，分组广播总线和经由分组广播总线相互通信的中央分组报头处理器的本地分组控制器。由媒体接入控制器接收的分组被传递到相关联的本地分组控制器，然后在分组广播总线上广播。这些广播包被存储在控制器的包缓冲存储器中，并且处理器至少侦听广播包的头部。分析头部，并且处理器向本地分组控制器发出关于广播分组的转发指令。因此，分组数据只能遍历总线一次。如果需要，在分组被广播之后仅产生相对较短的转发决定，并且这可以发生在单独的控制总线上。因此，通过在本地控制器上与分组分组数据相结合的分组报头处理采用集中式侦听，总线带宽比之前的集中式配置减少了一半，其中每个数据包都经过总线至少两次。

2. 发明授权

US06760478B1 Method and apparatus for performing two pass quality video compression through pipelining and buffer management 失效
标题翻译：通过流水线和缓冲管理进行两次通过质量视频压缩的方法和装置
公开(公告)号：US06760478B1
公开(公告)日：2004-07-06
申请号：US09613359
申请日：2000-07-10
申请人： Matthew James Adiletta , King-Wai Chow , Samuel William Ho , Robert Clint Rose , William Ralph Wheeler , Duane E. Galbi
发明人： Matthew James Adiletta , King-Wai Chow , Samuel William Ho , Robert Clint Rose , William Ralph Wheeler , Duane E. Galbi
IPC分类号： G06K936
CPC分类号： H04N19/577 , H04N19/114 , H04N19/124 , H04N19/127 , H04N19/132 , H04N19/14 , H04N19/149 , H04N19/159 , H04N19/176 , H04N19/177 , H04N19/31 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/46 , H04N19/51 , H04N19/587 , H04N19/61 , H04N19/82 , H04N19/87 , H04N19/93
摘要： An apparatus and method for performing two-pass real time video compression is provided. Tactical decisions such as encoding and quantization values are determined in software, whereas functional execution steps are performed in hardware. By appropriately apportioning the tasks between software and hardware, the benefits of each type of processing are exploited, while minimizing both hardware complexity and data transfer requirements. One key concept that allows the compression unit to operate in real time is that the architecture and pipelining both allow for B frames to be executed out of order. By buffering B frames, two-pass motion estimation techniques can be performed to tailor bit usage to the requirements of the frame, and therefore provide a more appealing output image.
摘要翻译：提供了一种用于执行双程实时视频压缩的装置和方法。用软件确定诸如编码和量化值之类的战术决策，而在硬件中执行功能执行步骤。通过适当地分配软件和硬件之间的任务，利用每种类型的处理的优点，同时最小化硬件复杂性和数据传输要求。允许压缩单元实时操作的一个关键概念是架构和流水线均允许B帧被执行无序。通过缓冲B帧，可以执行双向运动估计技术，以便根据帧的要求调整位使用率，从而提供更有吸引力的输出图像。

3. 发明授权

US5968153A Mechanism for high bandwidth DMA transfers in a PCI environment 有权
公开(公告)号：US5968153A
公开(公告)日：1999-10-19
申请号：US170812
申请日：1998-10-13
申请人： William R. Wheeler , Matthew James Adiletta , Samuel Ho , Debra Bernstein , Gilbert M. Wolrich
发明人： William R. Wheeler , Matthew James Adiletta , Samuel Ho , Debra Bernstein , Gilbert M. Wolrich
IPC分类号： G06F13/28 , G06F13/00
CPC分类号： G06F13/28
摘要： A method and apparatus for maximizing the performance of DMA transfers over a PCI.TM. bus are provided which includes a Per-Channel Retry count, Double Buffer Management, Wait Enable functionality, Back Up register functionality, Gather/Scatter mapping, a method for minimization of PIO writes, Read Semaphore functionality, a method for servicing of DMA transfers during FMU latency periods, Valid bit functionality, high and low water thresholds, and re-usable page tables.

4. 发明授权

US5884050A Mechanism for high bandwidth DMA transfers in a PCI environment 失效
标题翻译： PCI环境中高带宽DMA传输的机制
公开(公告)号：US5884050A
公开(公告)日：1999-03-16
申请号：US668200
申请日：1996-06-21
申请人： William R. Wheeler , Matthew James Adiletta , Samuel Ho , Debra Bernstein , Gilbert M. Wolrich
发明人： William R. Wheeler , Matthew James Adiletta , Samuel Ho , Debra Bernstein , Gilbert M. Wolrich
IPC分类号： G06F13/28 , G06F13/00
CPC分类号： G06F13/28
摘要： A method and apparatus for maximizing the performance of DMA transfers over a PCI.TM. bus are provided which includes a Per-Channel Retry count, Double Buffer Management, Wait Enable functionality, Back Up register functionality, Gather/Scatter mapping, a method for minimization of PIO writes, Read Semaphore functionality, a method for servicing of DMA transfers during FMU latency periods, Valid bit functionality, high and low water thresholds, and re-usable page tables.
摘要翻译：提供了一种用于通过PCI TM总线最大化DMA传输的性能的方法和装置，其包括每通道重试计数，双缓冲器管理，等待启用功能，备份寄存器功能，收集/散布映射，最小化 PIO写入，读取信号量功能，一种在FMU等待时间段期间为DMA传输提供服务的方法，有效位功能，高低阈值和可重复使用的页表。

5. 发明授权

US07006698B2 Method and apparatus for compressing a video image 失效
标题翻译：用于压缩视频图像的方法和装置
公开(公告)号：US07006698B2
公开(公告)日：2006-02-28
申请号：US10721947
申请日：2003-11-25
申请人： Matthew James Adiletta , King-Wai Chow , Samuel William Ho , Robert Clint Rose , William Ralph Wheeler , Subramania Iyer Sudharsanan
发明人： Matthew James Adiletta , King-Wai Chow , Samuel William Ho , Robert Clint Rose , William Ralph Wheeler , Subramania Iyer Sudharsanan
IPC分类号： G06K9/36 , H04N7/12
CPC分类号： H04N19/577 , H04N19/114 , H04N19/124 , H04N19/127 , H04N19/132 , H04N19/14 , H04N19/149 , H04N19/159 , H04N19/176 , H04N19/177 , H04N19/31 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/46 , H04N19/51 , H04N19/587 , H04N19/61 , H04N19/82 , H04N19/87 , H04N19/93
摘要： An apparatus and method for performing two-pass real time video compression is provided. Tactical decisions such as encoding and quantification values are determined in software, whereas functional execution steps are performed in hardware. By appropriately apportioning the tasks between software and hardware, the benefits of each type of processing are exploited, while minimizing both hardware complexity and data transfer requirements. One key concept that allows the compression unit to operate in real time is that the architecture and pipe lining both allow for B frames to be executed out of order. By buffering B frames, two-pass motion estimation techniques can be performed to tailor bit usage to the requirements of the frame, and therefore provide a more appealing output image.
摘要翻译：提供了压缩视频图像的方法和装置。计算与当前图像和先前图像的差值，并将其与可变自适应阈值进行比较。如果计算的差值小于可变自适应阈值，则从可变自适应阈值减去差值，以产生新的可变自适应阈值电平，并且删除视频信号。否则可变自适应阈值被重置为预定的开始值，并且视频信号被发送到编码和发送模块。

6. 发明授权

US6101276A Method and apparatus for performing two pass quality video compression through pipelining and buffer management 失效
标题翻译：通过流水线和缓冲管理进行两次通过质量视频压缩的方法和装置
公开(公告)号：US6101276A
公开(公告)日：2000-08-08
申请号：US670199
申请日：1996-06-21
申请人： Matthew James Adiletta , King-Wai Chow , Samuel William Ho , Robert Clint Rose , William Ralph Wheeler , Duane E. Galbi
发明人： Matthew James Adiletta , King-Wai Chow , Samuel William Ho , Robert Clint Rose , William Ralph Wheeler , Duane E. Galbi
IPC分类号： G06T9/00 , H04N7/12 , H04N7/26 , H04N7/32 , H04N7/36 , H04N7/46 , H04N7/50 , G06K9/36
CPC分类号： H04N19/577 , H04N19/114 , H04N19/124 , H04N19/127 , H04N19/132 , H04N19/14 , H04N19/149 , H04N19/159 , H04N19/176 , H04N19/177 , H04N19/31 , H04N19/42 , H04N19/423 , H04N19/436 , H04N19/46 , H04N19/51 , H04N19/587 , H04N19/61 , H04N19/82 , H04N19/87 , H04N19/93
摘要： An apparatus and method a method for performing two-pass real time video compression is provided. Tactical decisions such as encoding and quantization values are determined in software, whereas functional execution steps are performed in hardware. By appropriately apportioning the tasks between software and hardware, the benefits of each type of processing are exploited, while minimizing both hardware complexity and data transfer requirements. One key concept that allows the compression unit to operate in real time is that the architecture and pipelining both allow for B frames to be executed out of order. By buffering B frames, two-pass motion estimation techniques can be performed to tailor bit usage to the requirements of the frame, and thereby provide a more appealing output image.
摘要翻译：提供了一种用于执行双程实时视频压缩的方法的装置和方法。用软件确定诸如编码和量化值之类的战术决策，而在硬件中执行功能执行步骤。通过适当地分配软件和硬件之间的任务，利用每种类型的处理的优点，同时最小化硬件复杂性和数据传输要求。允许压缩单元实时操作的一个关键概念是架构和流水线均允许B帧被执行无序。通过缓冲B帧，可以执行双遍运动估计技术，以根据帧的要求定制比特使用，从而提供更有吸引力的输出图像。

7. 发明授权

US5995080A Method and apparatus for interleaving and de-interleaving YUV pixel data 失效
标题翻译：用于交织和解交织YUV像素数据的方法和装置
公开(公告)号：US5995080A
公开(公告)日：1999-11-30
申请号：US668199
申请日：1996-06-21
申请人： Larry Louis Biro , Matthew Howard Reilly , Matthew James Adiletta , William R. Wheeler
发明人： Larry Louis Biro , Matthew Howard Reilly , Matthew James Adiletta , William R. Wheeler
IPC分类号： H04N7/26 , H04N7/36 , H04N7/46 , H04N7/50 , G09G5/04
CPC分类号： H04N19/577 , H04N19/126 , H04N19/14 , H04N19/176 , H04N19/177 , H04N19/42 , H04N19/51 , H04N19/61 , H04N19/146 , H04N19/152 , Y10S707/99942
摘要： An apparatus and method a method for performing two-pass real time video compression is provided. Tactical decisions such as encoding and quantization values are determined in software, whereas functional execution steps are performed in hardware. By appropriately apportioning the tasks between software and hardware, the benefits of each type of processing are exploited, while minimizing both hardware complexity and data transfer requirements. One key concept that allows the compression unit to operate in real time is that the architecture and pipelining both allow for B frames to be executed out of order. By buffering B frames, two-pass motion estimation techniques can be performed to tailor bit usage to the requirements of the frame, and thereby provide a more appealing output image.
摘要翻译：提供了一种用于执行双程实时视频压缩的方法的装置和方法。用软件确定诸如编码和量化值之类的战术决策，而在硬件中执行功能执行步骤。通过适当地分配软件和硬件之间的任务，利用每种类型的处理的优点，同时最小化硬件复杂性和数据传输要求。允许压缩单元实时操作的一个关键概念是架构和流水线均允许B帧被执行无序。通过缓冲B帧，可以执行双遍运动估计技术，以根据帧的要求定制比特使用，从而提供更有吸引力的输出图像。

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