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1. 发明授权

US07439810B2 Fast bias for power amplifier gating in a TDMA application 有权
标题翻译：用于TDMA应用中的功率放大器门控的快速偏置
公开(公告)号：US07439810B2
公开(公告)日：2008-10-21
申请号：US11449313
申请日：2006-06-08
申请人： Anthony Manicone , Matthew Harris
发明人： Anthony Manicone , Matthew Harris
IPC分类号： H03F3/04
CPC分类号： H03F3/193 , H03F1/0261 , H03F1/3205 , H03F3/245 , H03F2200/18 , H03F2200/451
摘要： RF amplifier bias system for TDMA application. A bias circuit (200) is coupled to an RF power amplifier (201) circuit. The bias circuit includes a charge pump/sink circuit (215) a voltage reference circuit (204) and voltage scaling circuit (208, 210, 214). The bias system provides fast response time when transitioning between various bias voltage applied to an FET RF transistor (244).
摘要翻译：用于TDMA应用的RF放大器偏置系统。偏置电路（200）耦合到RF功率放大器（201）电路。偏置电路包括电荷泵/吸收电路（215），电压参考电路（204）和电压调节电路（208,210,214）。偏置系统在施加到FET RF晶体管（244）的各种偏置电压之间转换时提供快速的响应时间。

2. 发明授权

US07355854B2 Apparatus for improved grounding of flange mount field effect transistors to printed wiring boards 有权
标题翻译：用于改进法兰安装场效应晶体管对印刷电路板接地的装置
公开(公告)号：US07355854B2
公开(公告)日：2008-04-08
申请号：US11448562
申请日：2006-06-07
申请人： Matthew Harris , Anthony Manicone
发明人： Matthew Harris , Anthony Manicone
IPC分类号： H05K7/20
CPC分类号： H05K7/205 , H01L23/367 , H01L2924/0002 , H05K1/021 , H05K1/182 , H05K3/0061 , H05K7/209 , H05K2201/10166 , H05K2201/10409 , H01L2924/00
摘要： An apparatus for improved grounding and heat transfer between flange mount field effect transistors and printed wiring boards is provided comprising a cut-out formed in the printed wiring board, extending between its top and bottom surfaces, defining an edge which is covered or plated with a conductive material at least in some areas. One or more vias also extend between the top and bottom surfaces of the cut-out and are exposed along the edge. A field effect transistor is placed in the cut-out and into contact with a heat sink element designed to enhance grounding of the field effect transistor and improve the transfer of heat to the chassis or other metal support structure for the printed wiring board.
摘要翻译：提供了一种用于改进法兰安装场效应晶体管和印刷线路板之间的接地和传热的装置，其包括形成在印刷线路板中的切口，其在其顶表面和底表面之间延伸，限定了被覆盖或镀有导电材料至少在某些地区。一个或多个通孔也在切口的顶表面和底表面之间延伸并且沿边缘暴露。场效应晶体管被放置在切口中并与设计用于增强场效应晶体管的接地的散热元件接触，并且改善热量传递到用于印刷线路板的底座或其它金属支撑结构。

3. 发明申请

US20070285172A1 Fast bias for power amplifier gating in a TDMA application 有权
标题翻译：用于TDMA应用中的功率放大器门控的快速偏置
公开(公告)号：US20070285172A1
公开(公告)日：2007-12-13
申请号：US11449313
申请日：2006-06-08
申请人： Anthony Manicone , Matthew Harris
发明人： Anthony Manicone , Matthew Harris
IPC分类号： H03F3/04
CPC分类号： H03F3/193 , H03F1/0261 , H03F1/3205 , H03F3/245 , H03F2200/18 , H03F2200/451
摘要： RF amplifier bias system for TDMA application. A bias circuit (200) is coupled to an RF power amplifier (201) circuit. The bias circuit includes a charge pump/sink circuit (215), a voltage reference circuit (204) and voltage scaling circuit (208, 210, 214). The bias system provides fast response time when transitioning between various bias voltages applied to an FET RF transistor (244).
摘要翻译：用于TDMA应用的RF放大器偏置系统。偏置电路（200）耦合到RF功率放大器（201）电路。偏置电路包括电荷泵/吸收电路（215），电压参考电路（204）和电压调节电路（208,210,214）。偏置系统在施加到FET RF晶体管（244）的各种偏置电压之间转换时提供快速的响应时间。

4. 发明申请

US20070285893A1 Apparatus for improved grounding of flange mount field effect transistors to printed wiring boards 有权
标题翻译：用于改进法兰安装场效应晶体管对印刷线路板接地的装置
公开(公告)号：US20070285893A1
公开(公告)日：2007-12-13
申请号：US11448562
申请日：2006-06-07
申请人： Matthew Harris , Anthony Manicone
发明人： Matthew Harris , Anthony Manicone
IPC分类号： H05K7/20
CPC分类号： H05K7/205 , H01L23/367 , H01L2924/0002 , H05K1/021 , H05K1/182 , H05K3/0061 , H05K7/209 , H05K2201/10166 , H05K2201/10409 , H01L2924/00
摘要： An apparatus for improved grounding and heat transfer between flange mount field effect transistors and printed wiring boards is provided comprising a cut-out formed in the printed wiring board, extending between its top and bottom surfaces, defining an edge which is covered or plated with a conductive material at least in some areas. One or more vias also extend between the top and bottom surfaces of the cut-out and are exposed along the edge. A field effect transistor is placed in the cut-out and into contact with a heat sink element designed to enhance grounding of the field effect transistor and improve the transfer of heat to the chassis or other metal support structure for the printed wiring board.
摘要翻译：提供了一种用于改进法兰安装场效应晶体管和印刷线路板之间的接地和传热的装置，其包括形成在印刷线路板中的切口，其在其顶表面和底表面之间延伸，限定了被覆盖或镀有导电材料至少在某些地区。一个或多个通孔也在切口的顶表面和底表面之间延伸并且沿边缘暴露。场效应晶体管被放置在切口中并与设计用于增强场效应晶体管的接地的散热元件接触，并且改善热量传递到用于印刷线路板的底座或其它金属支撑结构。

5. 发明申请

US20080132180A1 LOSSLESS TRANSMIT PATH ANTENNA SWITCH CIRCUIT 失效
标题翻译：无线传输路径天线切换电路
公开(公告)号：US20080132180A1
公开(公告)日：2008-06-05
申请号：US11565819
申请日：2006-12-01
申请人： Anthony Manicone
发明人： Anthony Manicone
IPC分类号： H04B1/44
CPC分类号： H04B1/52 , H04B1/0458
摘要： A system (200) for lossless transmit path antenna switching in a transceiver using quadrature combined power amplifiers is provided. The system is comprised of a quadrature (90°) hybrid power combiner (218) having a first and a second input port (260, 264), an isolated port (266), and an output port (262). The system is also comprised of a first and second RF power amplifier circuit (212, 214). The RF power amplifier circuits are respectively coupled to the first and second input ports. The RF power amplifier circuits have an output impedance that is selectively variable between a first state and a second state. The quadrature hybrid power combiner communicates RF energy from the first and second input ports to the output port when each RF power amplifier circuit is in its first state. The quadrature hybrid power combiner communicates RF energy from the output port to the isolated port when each RF amplifier circuit is in its second state.
摘要翻译：提供了一种用于使用正交组合功率放大器的收发器中的无损发射路径天线切换的系统（200）。该系统由具有第一和第二输入端口（260,264），隔离端口（266）和输出端口（262）的正交（90°）混合功率组合器（218）组成。该系统还包括第一和第二RF功率放大器电路（212,214）。 RF功率放大器电路分别耦合到第一和第二输入端口。 RF功率放大器电路具有在第一状态和第二状态之间有选择地变化的输出阻抗。当每个RF功率放大器电路处于其第一状态时，正交混合功率组合器将RF能量从第一和第二输入端口传送到输出端口。当每个RF放大器电路处于其第二状态时，正交混合功率组合器将RF能量从输出端口传送到隔离端口。

6. 发明授权

US08620251B2 Electronic device with adjustable filter and associated methods 失效
公开(公告)号：US08620251B2
公开(公告)日：2013-12-31
申请号：US13368453
申请日：2012-02-08
申请人： Andrew Mui , Anthony Manicone
发明人： Andrew Mui , Anthony Manicone
IPC分类号： H04B1/00
CPC分类号： H03H21/0007 , H03H11/1213 , H04B1/0475 , H04B1/10 , Y10T29/49016 , Y10T29/49018 , Y10T29/49117
摘要： An electronic device includes an adjustable filter with a first filter element, and a second filter element coupled to the first filter element. The second filter element includes a field effect transistor (FET) including a source terminal, a drain terminal, and a gate terminal. The source terminal and the gate terminal are coupled to a reference voltage. A control circuit is coupled to the drain terminal and is configured to apply a control voltage thereto to vary a capacitance between the source and drain terminals to adjust the adjustable filter.

7. 发明申请

US20130203367A1 ELECTRONIC DEVICE WITH ADJUSTABLE FILTER AND ASSOCIATED METHODS 失效
标题翻译：具有可调滤波器和相关方法的电子设备
公开(公告)号：US20130203367A1
公开(公告)日：2013-08-08
申请号：US13368453
申请日：2012-02-08
申请人： Andrew Mui , Anthony Manicone
发明人： Andrew Mui , Anthony Manicone
IPC分类号： H03H11/04 , H04B1/16 , H01R43/00 , H04B1/04
CPC分类号： H03H21/0007 , H03H11/1213 , H04B1/0475 , H04B1/10 , Y10T29/49016 , Y10T29/49018 , Y10T29/49117
摘要： An electronic device includes an adjustable filter with a first filter element, and a second filter element coupled to the first filter element. The second filter element includes a field effect transistor (FET) including a source terminal, a drain terminal, and a gate terminal. The source terminal and the gate terminal are coupled to a reference voltage. A control circuit is coupled to the drain terminal and is configured to apply a control voltage thereto to vary a capacitance between the source and drain terminals to adjust the adjustable filter.
摘要翻译：电子设备包括具有第一过滤元件的可调节过滤器和耦合到第一过滤元件的第二过滤元件。第二滤波器元件包括具有源极端子，漏极端子和栅极端子的场效应晶体管（FET）。源极端子和栅极端子耦合到参考电压。控制电路耦合到漏极端子并且被配置为向其施加控制电压以改变源极和漏极端子之间的电容以调节可调滤波器。

8. 发明申请

US20070182512A1 Stacked stripline circuits 有权
标题翻译：堆叠带状线路
公开(公告)号：US20070182512A1
公开(公告)日：2007-08-09
申请号：US11348658
申请日：2006-02-07
申请人： Myung Lee , Anthony Manicone
发明人： Myung Lee , Anthony Manicone
IPC分类号： H01P3/08
CPC分类号： H01P3/085 , H05K1/0237 , H05K1/0298 , H05K1/141 , H05K3/222 , H05K2201/0715
摘要： The present invention provides a method and apparatus for design of low loss, size restricted high frequency circuits. In a preferred embodiment, an electronic device includes: a first circuit layer located above the main circuit board comprising a first stripline passive circuit; and a second circuit layer located above the first circuit, the second layer comprising a second stripline circuit. The two stripline circuits can be separately coupled to leads, or coupled to each other and other leads using vias through the ground layer(s) separating each stripline. The stacked stripline elements can be used together with other circuits, and the stacked circuit board can be conveniently joined together with other assemblies, e.g., by surface mounting to a main board. The utility of this topology can be extended by the use of n-circuit embodiment or embedding in a multilayered main circuit board.
摘要翻译：本发明提供了一种用于设计低损耗，尺寸受限的高频电路的方法和装置。在优选实施例中，电子设备包括：位于主电路板上方的第一电路层，包括第一带状线无源电路; 以及位于所述第一电路上方的第二电路层，所述第二层包括第二带状线电路。两个带状线电路可以分别耦合到引线，或者使用通过分离每个带状线的接地层的通孔彼此耦合和其它引线。堆叠的带状线元件可以与其他电路一起使用，并且堆叠的电路板可以方便地与其它组件连接在一起，例如通过表面安装到主板。可以通过使用n电路实施例或嵌入到多层主电路板中来扩展该拓扑的效用。

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