专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2008176702A Constant current source 有权
标题翻译：恒定电流源
公开(公告)号：JP2008176702A
公开(公告)日：2008-07-31
申请号：JP2007011451
申请日：2007-01-22
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ZAMAN IQBAL KAZI , MASAGAKI TOSHIHIRO , ITO JUNJI , SONETAKA SHINICHI , OKADA HISAAKI
IPC分类号： G05F3/26 , H03F3/195
摘要： PROBLEM TO BE SOLVED: To provide a constant current source supplying a current which is stable against resistance variation.
SOLUTION: A constant current source 103 for supplying a constant current to an amplifier circuit 101 includes a transistor Q4, a transistor Q5, an emitter resistor R3 of the transistor Q4, an emitter resistor R4 of the transistor Q5, a diode D3 between respective bases of transistors Q4 and Q5, a diode D2 connected to a connection point between the base of the transistor Q4 and the diode D3, a MOS M1 which has a gate connected to the collector of the transistor Q4 and has a source connected to the amplifier circuit, a MOS M2 which has a gate connected to the collector of the transistor Q5 and has a source connected to the amplifier circuit, a MOS M3 which has a gate and a source connected to the collector of the transistor Q5, a MOS M4 which has a gate connected to the collector of the transistor Q4 and has a source connected to the collector of the transistor Q5, and a MOS M5 which has a gate, and a source connected to the collector of the transistor Q4.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供恒定电流源，提供对电阻变化稳定的电流。解决方案：用于向放大器电路101提供恒定电流的恒流源103包括晶体管Q4，晶体管Q5，晶体管Q4的发射极电阻R3，晶体管Q5的发射极电阻R4，二极管D3 在晶体管Q4和Q5的相应基极之间，连接到晶体管Q4的基极和二极管D3之间的连接点的二极管D2，MOS M1，其栅极连接到晶体管Q4的集电极，并且源极连接到放大器电路，具有连接到晶体管Q5的集电极并具有连接到放大器电路的源极的栅极MOS M2，具有连接到晶体管Q5的集电极的栅极和源极的MOS M3，MOS M4具有连接到晶体管Q4的集电极的栅极，并且具有连接到晶体管Q5的集电极的源极和具有栅极的MOS M5以及连接到晶体管Q4的集电极的源极。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2008172673A Output power detector for high frequency power amplifier 有权
标题翻译：用于高频功率放大器的输出电源检测器
公开(公告)号：JP2008172673A
公开(公告)日：2008-07-24
申请号：JP2007005631
申请日：2007-01-15
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKAMURA SHIGENORI , KAMIMURA FUMIYA , ITO JUNJI , SUZAKI HIDESHI
IPC分类号： H03F3/24 , H03F3/20
CPC分类号： H03F3/45085 , H03F3/24 , H03F2200/408 , H03F2200/451 , H03F2203/45612 , H04B2001/0416
摘要： PROBLEM TO BE SOLVED: To improve detection sensitivity in an area where the low output level of an amplifier is low, and to reduce the effect of output impedance upon a detection output, in a high frequency power amplification circuit of a multi-stage configuration wherein a plurality of power amplification transistors is cascaded.
SOLUTION: Inputs of amplification stages in multi-stage power amplification transistors are defined as detection inputs, peak hold detection is performed, respectively, an output voltage compared with a reference signal is converted into a current, and detection outputs of the stages are summed up, thereby the linearity of the detection output is improved. Thus, since detection sensitivity is improved even in the case that the output level of the amplifier is low, it controllability of the power amplifier can be improved. Furthermore, since the output of the power amplification circuit is not defined as detection input, it becomes possible to reduce the effect in the case that the output impedance is varied. Moreover, temperature dependency and power supply voltage dependency can be reduced.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了提高放大器的低输出电平低的区域的检测灵敏度，并且为了降低输出阻抗对检测输出的影响，在多频率功率放大电路中，级联配置，其中级联多个功率放大晶体管。解决方案：多级功率放大晶体管中的放大级的输入被定义为检测输入，分别执行峰值保持检测，将与参考信号相比较的输出电压转换为电流，并且级的检测输出被归结，从而提高了检测输出的线性。因此，即使在放大器的输出电平低的情况下，由于检测灵敏度也提高，因此可以提高功率放大器的可控性。此外，由于功率放大电路的输出未被定义为检测输入，所以可以减小在输出阻抗变化的情况下的效果。此外，可以降低温度依赖性和电源电压依赖性。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2007311573A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2007311573A
公开(公告)日：2007-11-29
申请号：JP2006139473
申请日：2006-05-18
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ENDO ISATAKA , ITO JUNJI , ISHIKAWA OSAMU
IPC分类号： H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device of CSP structure capable of efficiently radiating the heat generated at a semiconductor element to the outside, with no increase in size.
SOLUTION: The semiconductor device is a semiconductor device 100 of CSP structure, and comprises a semiconductor substrate 109, a semiconductor element 101 formed on the semiconductor substrate 109, a first wiring 107a which is formed at the upper part of the semiconductor substrate 109 and is connected to a semiconductor element 101, an insulating film 117 formed at the upper part of the first wiring 107a, a second wiring 104a which is formed at the upper part of the insulating film 117 and is connected to the first wiring 107a, a sealing resin 105 for sealing the insulating film 117 and the second wiring 104a, a first post 102a which is formed in the sealing resin 105 and is connected to the second wiring 104a, and a first electrode 103a which is formed on the sealing resin 105 and is connected to the first post 102a. The second wiring 104a covers the entire part above the region where the semiconductor element 101 is formed.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种CSP结构的半导体器件，其能够在不增加尺寸的情况下有效地将半导体元件产生的热量散发到外部。解决方案：半导体器件是CSP结构的半导体器件100，包括半导体衬底109，形成在半导体衬底109上的半导体元件101，形成在半导体衬底的上部的第一布线107a 109，连接到半导体元件101，形成在第一布线107a的上部的绝缘膜117，形成在绝缘膜117的上部并连接到第一布线107a的第二布线104a，用于密封绝缘膜117和第二布线104a的密封树脂105，形成在密封树脂105中并连接到第二布线104a的第一柱102a和形成在密封树脂105上的第一电极103a 并且连接到第一帖子102a。第二布线104a覆盖形成有半导体元件101的区域的整个部分。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2008244370A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2008244370A
公开(公告)日：2008-10-09
申请号：JP2007086171
申请日：2007-03-29
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： OZAKI MASAHIRO , ITO JUNJI
IPC分类号： H01L23/38 , H01L23/12 , H01L35/30 , H01L35/32 , H01L35/34
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing method by which miniaturization of the entire semiconductor device is realized and high cooling effect is obtained, without requiring complex manufacturing processes.
SOLUTION: A cooling element utilizing the Peltier effect consists of a semiconductor chip 1 in which an N-type semiconductor region 4 and a P-type semiconductor region 5, having common element formation surface 1a and rear surface 1b are formed; an electrode pad 21 formed on the element formation surface 1a of the N-type semiconductor region 4 of the semiconductor chip 1; an electrode pad 22 formed on the element formation surface 1a of the P-type semiconductor region 5 of the semiconductor chip 1; and a conductive layer 3 formed on the rear surface 1b of the semiconductor chip 1.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种半导体器件及其制造方法，通过该半导体器件和半导体器件的制造方法，可以实现半导体器件整体的小型化并获得高的冷却效果，而不需要复杂的制造工艺。解决方案：利用珀尔帖效应的冷却元件由半导体芯片1组成，其中形成具有公共元件形成表面1a和后表面1b的N型半导体区域4和P型半导体区域5; 形成在半导体芯片1的N型半导体区域4的元件形成面1a上的电极焊盘21; 形成在半导体芯片1的P型半导体区域5的元件形成面1a上的电极焊盘22; 以及形成在半导体芯片1的后表面1b上的导电层3.版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2008172674A Multi-mode communication equipment 审中-公开
标题翻译：多模通信设备
公开(公告)号：JP2008172674A
公开(公告)日：2008-07-24
申请号：JP2007005632
申请日：2007-01-15
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKABASHI HIROSUKE , OKAMOTO NAOKI , ITO JUNJI
IPC分类号： H04B1/3822 , H04B1/40
CPC分类号： H04B1/0057 , H04W88/06
摘要： PROBLEM TO BE SOLVED: To provide multi-mode communication equipment which prevents a low noise amplifier of a receiving system from being deteriorated and destroyed by leaking a transmission signal outputted from a transmission system of one communication system to the receiving system of another communication system, and can obtain excellent receiving sensitivity, the multi-mode communication equipment being capable of dealing with a W-CDMA scheme and a GSM scheme. SOLUTION: The multi-mode communication equipment comprises a switch element, which is connected between an input unit of a low noise amplifier constituting a receiving system of each of communication systems of the W-CDMA scheme and the GSM scheme and a ground and can be selectively turned on/off by a control signal and a control circuit for controlling the ON/OFF of the switch element. During transmitting operation of one communication system, the switch element provided in the input unit of the low noise amplifier in the receiving system of another communication system is controlled to be turned on, such that the input unit of the low noise amplifier is brought into low impedance and a transmission signal to be leaked is suppressed, thereby preventing a device such as a low noise amplifier from being deteriorated and destroyed. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供多模式通信设备，其防止接收系统的低噪声放大器由于将从一个通信系统的传输系统输出的传输信号泄漏到另一个通信系统的接收系统而恶化和破坏通信系统，可以获得良好的接收灵敏度，多模式通信设备能够处理W-CDMA方案和GSM方案。解决方案：多模式通信设备包括开关元件，其连接在构成W-CDMA方案的通信系统的每个通信系统的接收系统的低噪声放大器的输入单元和GSM方案之间，并且接地并且可以通过用于控制开关元件的接通/断开的控制信号和控制电路选择性地导通/关断。在一个通信系统的发送操作期间，设置在另一通信系统的接收系统中的低噪声放大器的输入单元中的开关元件被控制为导通，使得低噪声放大器的输入单元变低阻抗和要泄漏的发送信号被抑制，从而防止诸如低噪声放大器的装置劣化和破坏。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2006304140A Radio equipment for communication and transmission/reception circuit used for it, and semiconductor integrated circuit device 有权
标题翻译：用于其的通信和传输/接收电路的无线电设备以及半导体集成电路设备
公开(公告)号：JP2006304140A
公开(公告)日：2006-11-02
申请号：JP2005126041
申请日：2005-04-25
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SASAKI TAKESHI , ITO JUNJI
IPC分类号： H04B1/44
摘要： PROBLEM TO BE SOLVED: To provide a transmission/reception circuit, a semiconductor integrated circuit device and radio equipment for communication which can combine low loss in transmission with low loss in reception.
SOLUTION: The transmission/reception circuit includes a transmission circuit block, a reception circuit block, an antenna circuit block having an antenna input/output terminal, a first selection means for selecting a transmission state and a reception state, and a first matching circuit for matching a second selection means and the reception circuit block in the reception state. The antenna circuit block is connected to the transmission circuit block and the first selection means at the antenna input/output terminal, the other end of the first selection means is connected to the reception circuit block, the second selection means is connected in a shunt between them, and the first matching circuit is connected to the other end of the second selection means.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种发送/接收电路，半导体集成电路装置和用于通信的无线电设备，其能够将低损耗的传输与低接收损失相结合。解决方案：发送/接收电路包括发送电路块，接收电路块，具有天线输入/输出端子的天线电路块，用于选择发送状态和接收状态的第一选择装置，以及第一匹配电路，用于在接收状态下匹配第二选择装置和接收电路块。天线电路块与天线输入/输出端子的发送电路块和第一选择装置连接，第一选择装置的另一端连接到接收电路块，第二选择装置分别连接在并且第一匹配电路连接到第二选择装置的另一端。版权所有（C）2007，JPO＆INPIT

7. 发明专利

JP2005236971A Low-noise bias circuit for differential, and differential signal processor 有权
标题翻译：低噪声偏差电路，差分信号处理器
公开(公告)号：JP2005236971A
公开(公告)日：2005-09-02
申请号：JP2005011845
申请日：2005-01-19
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKATANI TOSHIBUMI , OSAKO SHINICHI , ITO JUNJI
IPC分类号： H03F3/45 , H03F1/26 , H03F1/32 , H04B1/40
摘要： PROBLEM TO BE SOLVED: To provide a low-noise bias circuit for differential wherein distortion property is ensured simultaneously with obtaining good noise property. SOLUTION: A collector of a transistor Q11 is connected to a voltage supplying point (Vcc) through a resistor R15. A base of the transistor Q11 is connected to a base of a transistor Q1 through resistors R13 and R11 which are connected in series. A connection point of the resistor R11 and the resistor R13 is further connected to the collector of the transistor Q11. At a connection point A, a collector of a transistor Q12 is connected to the voltage supplying point through a resistor R16. A base of the transistor Q12 is connected to a base of a transistor Q2 through resistors R14 and R12 which are connected in series. A connection point of the resistor R12 and the resistor R14 is further connected to the collector of the transistor Q12. By the above configuration, high frequency grounding is performed at the connection point A. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供用于差分的低噪声偏置电路，其中同时确保失真特性以获得良好的噪声特性。解决方案：晶体管Q11的集电极通过电阻R15连接到电压提供点（Vcc）。晶体管Q11的基极通过串联连接的电阻器R13和R11连接到晶体管Q1的基极。电阻器R11和电阻器R13的连接点进一步连接到晶体管Q11的集电极。在连接点A处，晶体管Q12的集电极通过电阻器R16连接到电压提供点。晶体管Q12的基极通过串联连接的电阻R14和R12连接到晶体管Q2的基极。电阻器R12和电阻器R14的连接点进一步连接到晶体管Q12的集电极。通过上述配置，在连接点A执行高频接地。（C）2005年，JPO和NCIPI

8. 发明专利

JP2005236600A High frequency 2 multiplication circuit 审中-公开
标题翻译：高频2通用电路
公开(公告)号：JP2005236600A
公开(公告)日：2005-09-02
申请号：JP2004042426
申请日：2004-02-19
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ITO JUNJI
IPC分类号： H03F3/45 , H03B19/14 , H03D7/14 , H03F3/34 , H04N9/68
CPC分类号： H03B19/14 , H03B2200/0036 , H03B2200/0098 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D2200/0025 , H03D2200/0047
摘要： PROBLEM TO BE SOLVED: To obtain a double wave efficiently by suppressing an output of a DC component when a signal of double frequency is generated from an original signal.
SOLUTION: A high frequency signal source 103 represents the original signal for 2 multiplication, and generates a differential signal to output terminals 106 and 107. The signal from the signal source 103 is input to the bases of transistors Q1, Q3 and the bases of transistors Q2, Q4. Simultaneously, a differential input is applied to transistors Q5, Q6 through a capacitor. At this time, this circuit performs the same operation as a multiplier, and the double frequency of the original signal is generated as the differential output at the collector terminals of the transistors Q1, Q3 and Q2, Q4. At this time, the input original signal is not output according to the operation of the multiplier, but only the signal multiplied by the input signal is output merely.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：当从原始信号产生双频信号时，通过抑制DC分量的输出来有效地获得双波。解决方案：高频信号源103表示用于2乘法的原始信号，并且向输出端子106和107产生差分信号。来自信号源103的信号被输入到晶体管Q1，Q3的基极，并且晶体管Q2，Q4的基极。同时，通过电容器将差分输入施加到晶体管Q5，Q6。此时，该电路执行与乘法器相同的操作，并且产生原始信号的双倍频率作为晶体管Q1，Q3和Q2，Q4的集电极端子处的差分输出。此时，根据乘法器的操作不输出输入原始信号，而仅输出乘以输入信号的信号。版权所有（C）2005，JPO＆NCIPI

9. 发明专利

JP2003289226A Amplifier and frequency converter 有权
标题翻译：放大器和频率转换器
公开(公告)号：JP2003289226A
公开(公告)日：2003-10-10
申请号：JP2002091869
申请日：2002-03-28
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NAKATANI TOSHIBUMI , ITO JUNJI , NAKANO HIDEO
IPC分类号： H03D7/14 , H03D7/18 , H03F1/34 , H03F3/45
CPC分类号： H03F3/45089 , H03F1/34 , H03F2200/372 , H03F2203/45298 , H03F2203/45386 , H03F2203/45464 , H03F2203/45544 , H03F2203/45631
摘要： PROBLEM TO BE SOLVED: To provide a negative feedback amplifier which is suitable for integration of an semiconductor integrated circuit, having a wide dynamic range.
SOLUTION: An amplifying circuit 10 amplifies a signal inputted from an input terminal P1. A phase control circuit 10 is arranged between the emitter of a bipolar transistor 101 and a ground connection. A feedback circuit 30 is connected between the input and the output of the amplifying circuit 10, and it feeds back the output of the amplifying circuit 10 to input. The variations of phase in the amplifying circuit 10 is determined by the value of an inductor 201, and the variations of phase in the feedback circuit 30 is determined by the values of a resistor 301 and a capacitor 302. The value of each element of these is selected so that the phase difference between an input signal and a feedback signal is 180°, extending in a range of the frequency of the fundamental waves of the input signal to the frequency of second-order harmonic waves. Hereby, the fundamental waves, third-order modulated waves, and second-order harmonic waves of the input signal are fed back negatively to the input.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种适用于具有宽动态范围的半导体集成电路的集成的负反馈放大器。解决方案：放大电路10放大从输入端子P1输入的信号。在双极晶体管101的发射极和接地连接之间设置相位控制电路10。反馈电路30连接在放大电路10的输入和输出之间，并将放大电路10的输出反馈到反馈电路10。放大电路10中的相位的变化由电感器201的值确定，并且反馈电路30中的相位的变化由电阻器301和电容器302的值确定。这些的每个元件的值被选择为使得输入信号和反馈信号之间的相位差为180°，在输入信号的基波的频率的范围内延伸到二次谐波的频率。因此，输入信号的基波，三阶调制波和二次谐波被反馈地反馈给输入。版权所有（C）2004，JPO

10. 发明专利

JP2008271517A High frequency power amplifier and amplification method, and semiconductor device 审中-公开
标题翻译：高频功率放大器和放大方法及半导体器件
公开(公告)号：JP2008271517A
公开(公告)日：2008-11-06
申请号：JP2008065950
申请日：2008-03-14
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SUZAKI HIDESHI , ITO JUNJI , KAMIMURA FUMIYA , NAKAMURA SHIGENORI
IPC分类号： H03F1/52 , H03F1/32
CPC分类号： H03F3/19 , H03F1/30 , H03G3/3042
摘要： PROBLEM TO BE SOLVED: To provide a high frequency power amplifier which accurately detects a change in a gain, is immune to load variation and reduces nonlinear distortion in a mobile unit adopting a digital modulation scheme with amplitude variation. SOLUTION: A first detection circuit and a second detection circuit are connected to an input node and an output node of a final stage. Detection signals detected in the respective detection circuits are input to a differential amplifier circuit. The signal level difference output from the differential amplifier circuit does not change even if the input power varies. Because a change in the power gain at the output node does not travel back to the input node when the load impedance of a high frequency power amplifier varies, it is possible to detect only the change in the load impedance. Damage to the final stage can be prevented by controlling the operating current of the final stage and the gain of the drive stage according to the detected load variation. Furthermore, nonlinear distortion in the high frequency power amplifier can also be reduced by detecting the change in the gain of the drive stage and canceling the change in the gain of the adjustment stage. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种准确地检测增益变化的高频功率放大器，不受负载变化的影响，并且减小采用具有幅度变化的数字调制方案的移动单元中的非线性失真。解决方案：第一检测电路和第二检测电路连接到最终级的输入节点和输出节点。在各检测电路中检测到的检测信号被输入到差分放大电路。即使输入功率变化，差分放大电路输出的信号电平差也不变。因为当高频功率放大器的负载阻抗变化时，在输出节点处的功率增益的变化不会返回到输入节点，所以可以仅检测负载阻抗的变化。可以通过根据检测到的负载变化来控制最后级的工作电流和驱动级的增益来防止对最后级的损坏。此外，通过检测驱动级的增益的变化并消除调整级的增益的变化，也可以降低高频功率放大器中的非线性失真。版权所有（C）2009，JPO＆INPIT

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式