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    • 1. 发明授权
    • Picture signal digital processing unit
    • 图像信号数字处理单元
    • US5636316A
    • 1997-06-03
    • US283685
    • 1994-08-01
    • Masuo OkuYukio FujiiMasaru TakahashiKenji IchigeKeizo NishimuraAtsuo SugaShigemitsu HiguchiTomohide Sorihashi
    • Masuo OkuYukio FujiiMasaru TakahashiKenji IchigeKeizo NishimuraAtsuo SugaShigemitsu HiguchiTomohide Sorihashi
    • H04N9/797H04N9/804H04N5/92
    • H04N9/8047H04N9/7973
    • A digital processing unit for converting a digital picture signal into data by blocks and for correction encoding a variable-length encoded signal. This digital processing unit includes a digital data compressing section for dividing a picture signal into a plurality of number of blocks, and compressingly outputting digital data of this picture signal based on a processing unit of one or a few blocks, a buffer section for sequentially storing the digital data, and an error correction encoding section for sequentially reading the digital data from this buffer section, and structuring an inner code for each inner block structured by this digital data and structuring an outer code for each predetermined unit of inner blocks, to thereby structure two-dimensional error correction code blocks, to output an error correction code signal. Further, the error correction encoding section has the length of the digital data of the picture signal included in the inner code set to be equal to or larger than a mean code length of predetermined compressed blocks.
    • 一种数字处理单元,用于将数字图像信号转换成数据块并用于对可变长度编码信号进行校正编码。 该数字处理单元包括数字数据压缩部分,用于将图像信号分成多个块,并且基于一个或几个块的处理单元压缩输出该图像信号的数字数据;缓冲部分,用于顺序存储 数字数据和纠错编码部分,用于从该缓冲器部分顺序读取数字数据,并且构造由该数字数据构成的每个内部块的内部代码,并为每个内部块的每个预定单位构成外部代码,由此 结构二维纠错码块,输出纠错码信号。 此外,纠错编码部分将内部码中包括的图像信号的数字数据的长度设置为等于或大于预定压缩块的平均码长。
    • 2. 发明授权
    • Interpolation circuit for digital signal processor
    • 数字信号处理器插值电路
    • US5027209A
    • 1991-06-25
    • US323780
    • 1989-03-15
    • Keizo NishimuraShigemitsu HiguchiFuzio Okamura
    • Keizo NishimuraShigemitsu HiguchiFuzio Okamura
    • H04N5/94H04B14/04H04N5/945H04N19/89H04N19/895
    • H04N5/945H04N19/89H04N19/895
    • An interpolation circuit, in which a digital signal produced by sampling and quantizing an analog information sequentially is encoded so that, in case a certain one of the encoded sample data is erroneous, a correct data in place of the erroneous sample data is prepared as an interpolation data by interpolating other correct sample data. The interpolation circuit includes: a first extrapolation circuit for generating a first extrapolation data by extrapolating two sample data preceding the erroneous sample data to the position of said erroneous sample data, a second extrapolation circuit for generating a second extrapolation data by extrapolating the two sample data succeeding the erroneous sample data to the position of the erroneous sample data, and an averaging circuit for generating the interpolation data by arithmetically averaging the first and second extrapolation data.
    • 编码其中通过对模拟信息进行采样和量化而产生的数字信号被编码的内插电路,使得在编码的采样数据中的某一个是错误的情况下,将准确的数据代替错误的采样数据作为 内插数据通过内插其他正确的样本数据。 内插电路包括:第一外推电路,用于通过将错误采样数据之前的两个采样数据外插到所述错误采样数据的位置来产生第一外插数据;第二外推电路,用于通过外推两个采样数据来产生第二外插数据 将错误的采样数据连续到错误采样数据的位置;以及平均电路,用于通过对第一和第二外插数据进行算术平均来产生插值数据。