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    • 6. 发明授权
    • Magnetoresistive element and method for producing the same, as well as magnetic head, magnetic memory and magnetic recording device using the same
    • 磁阻元件及其制造方法以及使用该磁阻元件的磁头,磁存储器和磁记录装置
    • US06943041B2
    • 2005-09-13
    • US10719412
    • 2003-11-21
    • Yasunari SugitaAkihiro OdagawaNozomu MatsukawaYoshio KawashimaYasunori Morinaga
    • Yasunari SugitaAkihiro OdagawaNozomu MatsukawaYoshio KawashimaYasunori Morinaga
    • G01R33/09G11B5/39G11C11/16H01F10/32H01F41/30H01L27/22H01L43/08H01L43/12H01L21/00
    • H01L27/228B82Y10/00B82Y25/00B82Y40/00G01R33/093G11B5/3903G11B5/3909G11B5/3916G11B2005/3996G11C11/16H01F10/3254H01F10/3268H01F41/302H01L43/08H01L43/12
    • The present invention provides a method for producing a magnetoresistive element including a tunnel insulating layer, and a first magnetic layer and a second magnetic layer that are laminated so as to sandwich the tunnel insulating layer, wherein a resistance value varies depending on a relative angle between magnetization directions of the first magnetic layer and the second magnetic layer. The method includes the steps of: (i) laminating a first magnetic layer, a third magnetic layer and an Al layer successively on a substrate; (ii) forming a tunnel insulating layer containing at least one compound selected from the group consisting of an oxide, nitride and oxynitride of Al by performing at least one reaction selected from the group consisting of oxidation, nitriding and oxynitriding of the Al layer; and (iii) forming a laminate including the first magnetic layer, the tunnel insulating layer and a second magnetic layer by laminating the second magnetic layer in such a manner that the tunnel insulating layer is sandwiched by the first magnetic layer and the second magnetic layer. The third magnetic layer has at least one crystal structure selected from the group consisting of a face-centered cubic crystal structure and a face-centered tetragonal crystal structure and is (111) oriented parallel to a film plane of the third magnetic layer. According to this production method, it is possible to produce a magnetoresistive element with excellent properties and thermal stability.
    • 本发明提供了一种制造磁阻元件的方法,该磁阻元件包括隧道绝缘层,以及第一磁性层和第二磁性层,其被层压以夹住隧道绝缘层,其中电阻值根据相对角度而变化 第一磁性层和第二磁性层的磁化方向。 该方法包括以下步骤:(i)在衬底上依次层叠第一磁性层,第三磁性层和Al层; (ii)通过进行选自Al层的氧化,氮化和氮氧化的至少一种反应,形成包含至少一种选自Al的氧化物,氮化物和氮氧化物的化合物的隧道绝缘层; 以及(iii)通过层叠所述第二磁性层来形成包括所述第一磁性层,所述隧道绝缘层和第二磁性层的层压体,使得所述隧道绝缘层被所述第一磁性层和所述第二磁性层夹在中间。 第三磁性层具有至少一种选自面心立方晶体结构和面心四边形晶体结构的晶体结构,并且(111)取向为平行于第三磁性层的膜平面。 根据该制造方法,可以制造出具有优异性能和热稳定性的磁阻元件。
    • 8. 发明授权
    • Nonvolatile memory element
    • 非易失性存储元件
    • US08481990B2
    • 2013-07-09
    • US13375027
    • 2011-03-07
    • Yoshio KawashimaTakumi MikawaYukio Hayakawa
    • Yoshio KawashimaTakumi MikawaYukio Hayakawa
    • H01L47/00
    • H01L45/146H01L27/2436H01L45/08H01L45/1233H01L45/1625H01L45/1641H01L45/1675
    • A variable resistance nonvolatile memory element capable of suppressing a variation in resistance values is provided. A nonvolatile memory element according to the present invention includes: a silicon substrate (11); a lower electrode layer (102) formed on the silicon substrate (11); a variable resistance layer formed on the lower electrode layer (102); an upper electrode layer (104) formed on the variable resistance layer; a second interlayer insulating layer (19) formed to directly cover at least side surfaces of the lower electrode layer (102) and the variable resistance layer; a stress buffering region layer (105) for buffering a stress on the upper electrode layer (104), the stress buffering region layer being formed to directly cover at least an upper surface and side surfaces of the upper electrode layer (104) and comprising a material having a stress smaller than a stress of an insulating layer used as the second interlayer insulating layer (19); a second contact (16) extending to the upper electrode layer (104); and a wiring pattern (18) connected to the second contact (16).
    • 提供了能够抑制电阻值变化的可变电阻非易失性存储元件。 根据本发明的非易失性存储元件包括:硅衬底(11); 形成在所述硅衬底(11)上的下电极层(102); 形成在所述下电极层(102)上的可变电阻层; 形成在所述可变电阻层上的上电极层(104) 形成为直接覆盖下电极层(102)和可变电阻层的至少侧面的第二层间绝缘层(19) 用于缓冲上电极层(104)上的应力的应力缓冲区层(105),所述应力缓冲区层形成为直接覆盖上电极层(104)的上表面和侧表面,并包括 具有小于用作第二层间绝缘层(19)的绝缘层的应力的应力的材料; 延伸到上电极层(104)的第二触点(16); 以及连接到第二触点(16)的布线图案(18)。