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    • 2. 发明申请
    • CONNECTION METHOD FOR BUS CONTROLLERS AND COMMUNICATION SYSTEM
    • 总线控制器和通信系统的连接方法
    • US20120290753A1
    • 2012-11-15
    • US13466369
    • 2012-05-08
    • Yoshinori TakaiTomohisa Kishigami
    • Yoshinori TakaiTomohisa Kishigami
    • G06F13/00
    • H04L12/4135
    • A connection method for bus controllers is provided which includes using a logic circuit in which if both signal levels of two input terminals are recessive, a signal level of an output terminal becomes recessive, and if at least one of the signal levels of the two input terminals is dominant, a signal level of the output terminal becomes dominant, defining one of the two bus controllers, which are subject to one-on-one connection, as a first controller, defining the other of the two bus controllers as a second controller, connecting a transmitting terminal of the first controller to one of the two input terminals of the logic circuit, connecting a transmitting terminal of the second controller to the other of the two input terminals of the logic circuit, and connecting receiving terminals of the first and second controllers to the output terminal of the logic circuit.
    • 提供了一种用于总线控制器的连接方法,其包括使用逻辑电路,其中如果两个输入端的信号电平都是隐性的,则输出端的信号电平变为隐性,并且如果两个输入的信号电平中的至少一个 端子占主导地位,输出端子的信号电平占主导地位,将两个总线控制器中的一个定义为一对一连接,作为第一控制器,将两个总线控制器中的另一个定义为第二控制器 将所述第一控制器的发送端连接到所述逻辑电路的两个输入端之一,将所述第二控制器的发送端连接到所述逻辑电路的两个输入端中的另一个,以及将所述第一和 第二个控制器到逻辑电路的输出端。