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    • 3. 发明申请
    • SWITCHING POWER SUPPLY DEVICE
    • 切换电源设备
    • US20110058393A1
    • 2011-03-10
    • US12870960
    • 2010-08-30
    • Tohru SUZUKI
    • Tohru SUZUKI
    • H02M3/335H03K17/687
    • H02M1/34H02M3/335H02M2001/346H03K17/08142H03K2217/0072Y02B70/1433Y02B70/1491
    • A switching power supply device that uses a SJ-MISFIT reduces a surge in voltage caused by the oscillation of drain current.The switching power supply device of the present invention, which is switched by a switching element that is a MOSFET having a super junction structure, includes an oscillation reduction diode connected in anti-parallel to the switching element, wherein when a characteristic curve of output capacitance Coss of the switching element relative to a drain-to-source voltage VDS is approximated by a first line, second line and third line corresponding to lines A, B and C shown in FIG. 2, junction capacitance CD2 of the oscillation reduction diode at a point b where a characteristic curve of the junction capacitance CD2 of the oscillation reduction diode and the second line cross each other is 40% or more of the output capacitance Coss of the switching element at a point a where the first and second lines cross each other.
    • 使用SJ-MISFIT的开关电源装置减少由漏极电流的振荡引起的电压浪涌。 由具有超结结构的MOSFET的开关元件切换的本发明的开关电源装置包括与开关元件反并联连接的振荡降低二极管,其中当输出电容的特性曲线 开关元件相对于漏极 - 源极电压VDS的Coss由对应于图1所示的线A,B和C的第一线,第二线和第三线近似。 如图2所示,振荡降低二极管的结电容CD2的特性曲线与第二线交叉的点b处的振荡降低二极管的结电容CD2为开关元件的输出电容Coss的40%以上 第一和第二行交叉的点a。
    • 4. 发明申请
    • SEMICONDUCTOR DEVICE INCLUDING SCHOTTKY BARRIER JUNCTION AND PN JUNCTION
    • 半导体器件,其中包括肖特基阻挡结和PN结
    • US20120267748A1
    • 2012-10-25
    • US13447389
    • 2012-04-16
    • Tohru SUZUKI
    • Tohru SUZUKI
    • H01L29/47
    • H01L29/872H01L29/0619H01L29/0649H01L29/1608
    • A semiconductor device includes a first conductivity-type semiconductor stack including the recesses which extend from a first principal surface toward a second principal surface and have bottoms not reaching the second principal surface, the second conductivity-type anode regions which are embedded at a distance from one another in the first principal surface, each of which has a part of an outer edge region exposed to a side surface of the corresponding recess, an anode electrode which is provided on the first principal surface of the semiconductor stack to form a Schottky barrier junction with the semiconductor stack in a region where the plurality of anode regions are not formed and form ohmic junctions with the anode regions; and a cathode electrode provided on the second principal surface of the semiconductor stack.
    • 半导体器件包括:第一导电型半导体堆叠,其包括从第一主表面朝向第二主表面延伸的凹部,并且底部没有到达第二主表面,第二导电型阳极区域被嵌入距离 第一主表面中的每一个具有暴露于相应凹部的侧表面的外边缘区域的一部分,阳极电极设置在半导体叠层的第一主表面上以形成肖特基势垒结 其中所述半导体堆叠在所述多个阳极区域未形成的区域中,并与所述阳极区域形成欧姆结; 以及设置在半导体叠层的第二主表面上的阴极。