会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 8. 发明授权
    • Driver circuit
    • 驱动电路
    • US06697286B2
    • 2004-02-24
    • US10235819
    • 2002-09-06
    • Masashi Nakagawa
    • Masashi Nakagawa
    • G11C700
    • H04L25/0274H04L25/0278H04L25/028
    • A driver circuit for outputting to a transmission line a differential signal occurring between a first output terminal and a second output terminal as transmit data, includes: a first circuit for outputting, when in-phase data is input at a first input terminal thereof, an output signal having a logic level which corresponds to the data to the first output terminal via a resistor; a second circuit for outputting, when opposite-phase data is input to a second input terminal thereof, an output signal having a logic level which corresponds to the data to the second output terminal via a resistor; and an adjusting resistor connected between the fist output terminal and the second output terminal. The resistor is connected between the first and second output terminals and the power supply or the ground respectively, so that an offset voltage of the differential signal can be set at a desired value.
    • 一种用于向传输线路输出在第一输出端子和第二输出端子之间出现的差分信号作为发送数据的驱动电路,包括:第一电路,用于当在其第一输入端子处输入同相数据时,输出第 输出信号具有经由电阻器对应于所述第一输出端子的数据的逻辑电平; 第二电路,当反相数据被输入到其第二输入端时,经由电阻器将具有对应于该数据的逻辑电平的输出信号输出到第二输出端; 连接在第一输出端和第二输出端之间的调整电阻。 电阻分别连接在第一和第二输出端子与电源或接地之间,使得差分信号的偏移电压可以设定在所需的值。
    • 10. 发明授权
    • Background noise generating apparatus
    • 背景噪声发生装置
    • US5724277A
    • 1998-03-03
    • US568233
    • 1995-12-06
    • Masashi Nakagawa
    • Masashi Nakagawa
    • H03K3/84H04B1/04H04B14/06H04L12/70H04N5/00G06F1/02
    • H03K3/84
    • An object of the invention is to provide a background noise generating circuit having a small circuit scale and a small power consumption and capable of setting an arbitrary gain for the background noise. For each frame clock, a circuit (6, 5) generates a gain setting code signal S5 in synchronism with a data clock, and a random generator 21 generates a random number S21 in synchronism with a frame clock FCK. For a period of each frame, a logic gate 22 generates an exclusive-OR between the gain setting code signal S5 and the random number S21, the exclusive-OR constituting a background noise signal S9, which is supplied to a signal processing circuit 7 through a selection circuit 4 during a background noise period. Th gain setting code signal S5 may be determined by detecting the level of a received signal during a received signal input period just before the background noise period, and the gain setting code signal S5 thus determined is held during the background noise period and continues to be supplied to the logic gate.
    • 本发明的目的是提供一种具有小电路规模和小功耗的背景噪声产生电路,并能够为背景噪声设定任意增益。 对于每个帧时钟,电路(5,6)与数据时钟同步地产生增益设置码信号S5,随机发生器21与帧时钟FCK同步地生成随机数S21。 对于每一帧的周期,逻辑门22在增益设置码信号S5和随机数S21之间产生异或,异或构成背景噪声信号S9,其被提供给信号处理电路7,通过 在背景噪声期间的选择电路4。 可以通过在背景噪声周期之前的接收信号输入周期期间检测接收信号的电平来确定增益设置码信号S5,并且在背景噪声周期期间保持如此确定的增益设置码信号S5,并且继续是 提供给逻辑门。