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1. 发明申请

US20110105589A1 APOPTOSIS INDUCER 有权
标题翻译：病毒感染
公开(公告)号：US20110105589A1
公开(公告)日：2011-05-05
申请号：US12937107
申请日：2009-04-13
申请人： Masashi Idogawa , Yasushi Sasaki , Takashi Tokino
发明人： Masashi Idogawa , Yasushi Sasaki , Takashi Tokino
IPC分类号： A61K31/7088 , C12N15/63 , C07H21/04 , C12N5/00 , A61P35/00
CPC分类号： A61K45/06 , C07K14/4747
摘要： This invention relates to an agent, a composition and a product comprising at least one apoptosis-inducing substance, and at least one substance which inhibits expression and/or activity of an apoptosis-inhibiting substance; a method for inducing apoptosis or for treating a proliferative disease using one or more of them; a nucleic acid construct comprising a nucleic acid molecule encoding a protein to be expressed and a nucleic acid molecule which inhibits expression of an undesired protein; and a method for expressing a desired protein in a cell while inhibiting the expression of an undesired protein.
摘要翻译：本发明涉及包含至少一种凋亡诱导物质的试剂，组合物和产品，以及抑制凋亡抑制物质的表达和/或活性的至少一种物质; 诱导凋亡或使用其中一种或多种治疗增殖性疾病的方法; 包含编码待表达蛋白质的核酸分子和抑制不想要的蛋白质表达的核酸分子的核酸构建体; 以及在抑制不需要的蛋白质的表达的同时在细胞中表达所需蛋白质的方法。

2. 发明授权

US08686127B2 Apoptosis inducer 有权
标题翻译：细胞凋亡诱导物
公开(公告)号：US08686127B2
公开(公告)日：2014-04-01
申请号：US12937107
申请日：2009-04-13
申请人： Masashi Idogawa , Yasushi Sasaki , Takashi Tokino
发明人： Masashi Idogawa , Yasushi Sasaki , Takashi Tokino
IPC分类号： C07H21/04
CPC分类号： A61K45/06 , C07K14/4747
摘要： This invention relates to an agent, a composition and a product comprising at least one apoptosis-inducing substance, and at least one substance which inhibits expression and/or activity of an apoptosis-inhibiting substance; a method for inducing apoptosis or for treating a proliferative disease using one or more of them; a nucleic acid construct comprising a nucleic acid molecule encoding a protein to be expressed and a nucleic acid molecule which inhibits expression of an undesired protein; and a method for expressing a desired protein in a cell while inhibiting the expression of an undesired protein.
摘要翻译：本发明涉及包含至少一种凋亡诱导物质的试剂，组合物和产品，以及抑制凋亡抑制物质的表达和/或活性的至少一种物质; 诱导凋亡或使用其中一种或多种治疗增殖性疾病的方法; 包含编码待表达蛋白质的核酸分子和抑制不想要的蛋白质表达的核酸分子的核酸构建体; 以及在抑制不需要的蛋白质的表达的同时在细胞中表达所需蛋白质的方法。

3. 发明授权

US09070471B2 Shift register, display-driving circuit, displaying panel, and displaying device 有权
标题翻译：移位寄存器，显示驱动电路，显示面板和显示设备
公开(公告)号：US09070471B2
公开(公告)日：2015-06-30
申请号：US13377838
申请日：2010-03-18
申请人： Shige Furuta , Makoto Yokoyama , Yasushi Sasaki , Yuhichiroh Murakami
发明人： Shige Furuta , Makoto Yokoyama , Yasushi Sasaki , Yuhichiroh Murakami
IPC分类号： G09G3/36 , G06F3/038 , G11C19/28
CPC分类号： G11C19/28 , G09G3/3677 , G09G2310/063
摘要： Provided is a shift register of a display-driving circuit which carries out simultaneous selection of a plurality of signal lines by using a simultaneous selection signal. A stage of the shift register includes (i) a set-reset type flip-flop and (ii) a signal generating circuit which generates an output signal of the stage by selectively outputting a signal in response to an output of the flip-flop. The output signal of the stage (i) becomes active due to an activation of the simultaneous selection signal and then (ii) remains active while the simultaneous selection is being performed, and the output from the flip-flop is inactive during a period in which a setting signal and a resetting signal are both being active. This makes it possible to quickly carry out the simultaneous selection of all the signal lines and the initialization of the shift register.
摘要翻译：提供了一种显示驱动电路的移位寄存器，其通过使用同时选择信号来执行多个信号线的同时选择。移位寄存器的一级包括（i）设置复位型触发器和（ii）信号发生电路，其通过响应于触发器的输出选择性地输出信号来产生该级的输出信号。由于同时选择信号的激活，阶段（i）的输出信号变为有效，然后（ii）在执行同时选择时保持有效，并且触发器的输出在其中设定信号和复位信号均处于活动状态。这使得可以快速地执行所有信号线的同时选择和移位寄存器的初始化。

4. 发明授权

US09024681B2 Signal processing circuit, inverter circuit, buffer circuit, driver circuit, level shifter, and display device 有权
标题翻译：信号处理电路，逆变电路，缓冲电路，驱动电路，电平转换器和显示装置
公开(公告)号：US09024681B2
公开(公告)日：2015-05-05
申请号：US13819043
申请日：2011-08-31
申请人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： G05F1/10 , G05F3/16 , H04L25/02 , G09G3/36
CPC分类号： G05F3/16 , G09G3/3674 , G09G2310/0286 , G09G2310/0291 , H04L25/0272
摘要： A signal processing circuit of the present invention includes: first and second input terminals; an output terminal; a bootstrap capacitor; a first output section connected to the second input terminal and the output terminal; a second output section connected to the first input terminal, a first power source, and the output terminal; an electric charge control section for controlling the electric charge of the bootstrap capacitor, the electric charge control section being connected to the first input terminal; and a resistor having (i) a first end connected to the output terminal and (ii) a second end connected to a second power source. This arrangement allows the signal processing circuit to maintain an output potential even after a bootstrap effect has worn off.
摘要翻译：本发明的信号处理电路包括：第一和第二输入端; 输出端子; 自举电容器; 与第二输入端子和输出端子连接的第一输出部分; 连接到第一输入端子的第二输出部分，第一电源和输出端子; 用于控制所述自举电容器的电荷的电荷控制部分，所述电荷控制部分连接到所述第一输入端子; 以及电阻器，其具有（i）连接到所述输出端子的第一端和（ii）连接到第二电源的第二端。这种布置允许信号处理电路即使在自举效应已经磨损之后仍然保持输出电位。

5. 发明授权

US08896511B2 Display apparatus and display apparatus driving method 有权
标题翻译：显示装置和显示装置的驱动方法
公开(公告)号：US08896511B2
公开(公告)日：2014-11-25
申请号：US13395681
申请日：2010-05-18
申请人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
发明人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G3/36 , G09G5/00 , G02F1/1362
CPC分类号： G09G3/3648 , G02F1/13624 , G09G3/3614 , G09G2300/0857 , G09G2310/08 , G09G2320/0219 , G09G2330/021
摘要： In an active matrix display apparatus including: pixels provided in a matrix pattern, the pixels each including a memory circuit which retains data while refreshing the data, a data signal electric potential which is supplied from a source line in a period t1 and written to a node which is connected to a liquid capacitor is higher than a data electric potential of the node, the data electric potential being obtained in a period t14 after a refresh operation of the memory circuit.
摘要翻译：在一种有源矩阵显示装置中，包括以矩阵模式提供的像素，每个像素包括一个在刷新数据的同时保留数据的存储电路，在时间段t1内从源极线提供的数据信号电位被写入到连接到液体电容器的节点高于节点的数据电位，在存储器电路的刷新操作之后的周期t14中获得数据电位。

6. 发明授权

US08866720B2 Memory device and display device equipped with memory device 有权
标题翻译：内存设备和显示设备配备内存设备
公开(公告)号：US08866720B2
公开(公告)日：2014-10-21
申请号：US13496027
申请日：2010-04-23
申请人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
发明人： Yuhichiroh Murakami , Shige Furuta , Yasushi Sasaki , Seijirou Gyouten , Shuji Nishi
IPC分类号： G09G5/36 , G11C11/405 , G09G3/36
CPC分类号： G09G3/3659 , G09G2300/0417 , G09G2300/0823 , G09G2300/0842 , G09G2300/0861 , G09G2300/088 , G09G2330/022 , G11C11/405
摘要： A memory device is provided which includes a memory circuit that allows a circuit which carries out a refresh operation to suitably carry out an original operation of the circuit even if an off-leakage current occurs in a transfer element used in a transfer section. A memory cell includes a switching circuit, a first retaining section, a transfer section, a second retaining section, a first control section, and a voltage supply, and the first control section is controlled to be in (i) a state in which the first control section carries out a first operation in which the first control section is in an active state or a non-active state and (ii) a state in which the first control section carries out a second operation.
摘要翻译：提供了一种存储器件，其包括一个存储器电路，即使在转印部件中使用的转印元件中出现泄漏电流，允许进行刷新操作的电路适当地执行电路的原始操作。存储单元包括开关电路，第一保持部分，转移部分，第二保持部分，第一控制部分和电压源，并且第一控制部分被控制为处于（i）第一控制部分执行第一操作，其中第一控制部分处于活动状态或非活动状态，以及（ii）第一控制部分执行第二操作的状态。

7. 发明申请

US20140098325A1 LIQUID CRYSTAL DISPLAY DEVICE, POLARIZING PLATE, AND POLARIZER PROTECTION FILM 审中-公开
标题翻译：液晶显示装置，偏光板和极化保护膜
公开(公告)号：US20140098325A1
公开(公告)日：2014-04-10
申请号：US14118169
申请日：2012-05-16
申请人： Kouichi Murata , Mitsuharu Nakatani , Yasushi Sasaki
发明人： Kouichi Murata , Mitsuharu Nakatani , Yasushi Sasaki
IPC分类号： G02F1/1335 , G02B1/11
CPC分类号： G02F1/133611 , G02B1/11 , G02B1/111 , G02B5/3083 , G02F1/133528 , G02F2201/50 , G02F2202/40 , Y10T428/1041 , Y10T428/105
摘要： The invention provides a liquid crystal display device, as well as a polarizer and a protective film suitable for the liquid crystal display device. The liquid crystal display device comprises a backlight light source, two polarizers, and a liquid crystal cell disposed between the two polarizers; the backlight light source being a white light-emitting diode light source; each of the two polarizers comprising a polarizing film and protective films laminated on both sides of the polarizing film; at least one of the protective films being a polyester film having an adhesion-facilitating layer; the polyester film having a retardation of 3,000 to 30,000 nm; and the adhesion-facilitating layer comprising a polyester resin (A) and a polyvinyl alcohol resin (B).
摘要翻译：本发明提供一种液晶显示装置，以及偏振片和适用于液晶显示装置的保护膜。液晶显示装置包括背光光源，两个偏振器和设置在两个偏振器之间的液晶单元; 背光源为白色发光二极管光源; 两个偏振器中的每一个包括偏振膜和层压在偏振膜两侧的保护膜; 所述保护膜中的至少一个是具有粘附促进层的聚酯膜; 所述聚酯膜具有3000至30,000nm的延迟; 和粘合促进层包含聚酯树脂（A）和聚乙烯醇树脂（B）。

8. 发明授权

US08675811B2 Semiconductor device and display device 有权
标题翻译：半导体器件和显示器件
公开(公告)号：US08675811B2
公开(公告)日：2014-03-18
申请号：US12734595
申请日：2008-08-20
申请人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta
发明人： Etsuo Yamamoto , Yasushi Sasaki , Yuhichiroh Murakami , Shige Furuta
IPC分类号： G11C19/00
CPC分类号： G09G3/3677 , G09G2300/0408 , G09G2300/0426 , G09G2310/0289 , G11C19/28 , H01L27/124 , H03K17/161 , H03K17/162 , H03K17/687
摘要： A circuit which is constituted by a plurality of n-channel transistors includes, in at least one embodiment, a transistor (T1) which has a drain terminal to which an input signal is supplied and a source terminal from which a output signal is supplied; and a transistor (T2) which has a drain terminal to which a control signal is supplied and a source terminal connected to a gate terminal of the transistor (T1). A gate terminal of the transistor (T2) is connected to the source terminal of the transistor (T2). With the arrangement, it is possible to provide (i) a semiconductor device which is constituted by transistors having an identical conductivity type and which is capable of reducing an influence of noise, and (ii) a display device including the semiconductor device.
摘要翻译：在至少一个实施例中，由多个n沟道晶体管构成的电路包括具有供给输入信号的漏极端子和提供输出信号的源极端子的晶体管（T1）; 以及具有提供控制信号的漏极端子和与晶体管（T1）的栅极端子连接的源极端子的晶体管（T2）。晶体管（T2）的栅极端子连接到晶体管（T2）的源极端子。通过该结构，可以提供（i）由具有相同导电类型并能够减小噪声影响的晶体管构成的半导体器件，以及（ii）包括半导体器件的显示器件。

9. 发明申请

US20130257846A1 LIQUID CRYSTAL DISPLAY DEVICE AND METHOD FOR DRIVING SAME 有权
标题翻译：液晶显示装置及其驱动方法
公开(公告)号：US20130257846A1
公开(公告)日：2013-10-03
申请号：US13993922
申请日：2011-12-12
申请人： Eiji Matsuda , Yasushi Sasaki , Yuhichiroh Murakami , Seijirou Gyouten , Shuji Nishi , Makoto Yokoyama
发明人： Eiji Matsuda , Yasushi Sasaki , Yuhichiroh Murakami , Seijirou Gyouten , Shuji Nishi , Makoto Yokoyama
IPC分类号： G09G3/36
CPC分类号： G09G3/3618 , G09G3/3648 , G09G2300/0852 , G09G2300/0857 , G09G2300/0876
摘要： A memory-type liquid crystal display device includes transistors (N1, N2), retention electrodes (MRY), refresh output control sections (RS1), and capacitors (Cb1). In a data retention period, an electric potential of each of the retention electrodes (MRY) is changed via a corresponding one of the capacitors (Cb1) by changing an electric potential level of a retention capacitor wire signal that is supplied to a corresponding CS line (CSL(i)). Each of the refresh output control sections (RS1) receives the electric potential thus changed of a corresponding one of the retention electrodes (MRY) via the input section and controls an electric potential of a corresponding pixel electrode (PIX) in accordance with the electric potential thus changed.
摘要翻译：记忆型液晶显示装置包括晶体管（N1，N2），保持电极（MRY），刷新输出控制部分（RS1）和电容器（Cb1）。在数据保持期间，通过改变提供给相应的CS行的保持电容配线信号的电位电平，经由相应的一个电容器（Cb1）来改变每个保持电极（MRY）的电位（CSL（i））。每个刷新输出控制部分（RS1）经由输入部分接收相应的一个保持电极（MRY）所改变的电位，并根据电位控制对应的像素电极（PIX）的电位从而改变了。

10. 发明申请

US20130154374A1 SIGNAL PROCESSING CIRCUIT, INVERTER CIRCUIT, BUFFER CIRCUIT, LEVEL SHIFTER, FLIP-FLOP, DRIVER CIRCUIT, AND DISPLAY DEVICE 有权
标题翻译：信号处理电路，逆变器电路，缓冲电路，电平变换器，FLIP-FLOP，驱动电路和显示装置
公开(公告)号：US20130154374A1
公开(公告)日：2013-06-20
申请号：US13819400
申请日：2011-08-31
申请人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
发明人： Yuhichiroh Murakami , Yasushi Sasaki , Etsuo Yamamoto
IPC分类号： H02J4/00
CPC分类号： H02J4/00 , H03K3/356008 , H03K3/356026 , H03K19/01714 , H03K19/01735 , Y10T307/50
摘要： A signal processing circuit of the present invention includes: first and second input terminals; an output terminal; a bootstrap capacitor; a first output section connected to the second input terminal and the output terminal; a second output section connected to the first input terminal, a first power source, and the output terminal; and an electric charge control section for controlling the electric charge of the bootstrap capacitor, the electric charge control section being connected to the first input terminal, the electric charge control section and the first output section being connected to each other via a relay section for either electrically connecting the electric charge control section and the first output section to each other or electrically blocking the electric charge control section and the first output section from each other, the electric charge control section including a resistor connected to a second power source. This configuration can increase reliability of a bootstrap-type signal processing circuit.
摘要翻译：本发明的信号处理电路包括：第一和第二输入端; 输出端子; 自举电容器; 与第二输入端子和输出端子连接的第一输出部分; 连接到第一输入端子的第二输出部分，第一电源和输出端子; 以及用于控制自举电容器的电荷的电荷控制部分，所述电荷控制部分连接到所述第一输入端子，所述电荷控制部分和所述第一输出部分经由继电器部分彼此连接，用于任一将电荷控制部和第一输出部彼此电连接，或者将电荷控制部和第一输出部彼此电阻塞，电荷控制部包括与第二电源连接的电阻。该配置可以提高自举式信号处理电路的可靠性。

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