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1. 发明申请

US20100108862A1 PHOTODETECTOR 有权
标题翻译：照相机
公开(公告)号：US20100108862A1
公开(公告)日：2010-05-06
申请号：US12440178
申请日：2007-09-05
申请人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
发明人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
IPC分类号： G01J1/44
CPC分类号： G01J1/46 , H01L27/14609 , H04N5/3575 , H04N5/378
摘要： A photodetecting device 1 includes a photodiode PDm,n, a switch SWm,n for the photodiode, an integrating circuit 12m, and a noise removing circuit 13m. The integrating circuit 12m accumulates in a capacitor Cfk an electric charge input from the photodiode PDm,n through the switch SWm,n for the photodiode, and outputs a voltage value according to the amount of the accumulated electric charge. The noise removing circuit 13m includes an amplifier A3, five switches SW31 to SW35, four capacitors C31 to C34, and a power supply V3. The noise removing circuit 13m takes in a voltage value that is output from the integrating circuit 12m at a time where the switch SW31 is first turned from a closed state to an open state, and after the time, outputs a voltage value according to a difference between the voltage value that is output from the integrating circuit 12m and the voltage value previously taken in.
摘要翻译：光检测器件1包括光电二极管PDm，n，用于光电二极管的开关SWm，n，积分电路12m和噪声去除电路13m。积分电路12m通过用于光电二极管的开关SWm，n累积从光电二极管PDm，n输入的电荷的电容器Cfk，并输出与累积电荷量相对应的电压值。噪声消除电路13m包括放大器A3，五个开关SW31至SW35，四个电容器C31至C34以及电源V3。噪声消除电路13m在开关SW31首先从闭合状态转为断开状态时从积分电路12m输出的电压值，并且在此之后，输出根据差分的电压值在从积分电路12m输出的电压值与之前采用的电压值之间。

2. 发明授权

US08017901B2 Photodetector 有权
标题翻译：光电检测器
公开(公告)号：US08017901B2
公开(公告)日：2011-09-13
申请号：US12440178
申请日：2007-09-05
申请人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
发明人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
IPC分类号： H01J40/14
CPC分类号： G01J1/46 , H01L27/14609 , H04N5/3575 , H04N5/378
摘要： A photodetecting device 1 includes a photodiode PDm,n, a switch SWm,n for the photodiode, an integrating circuit 12m, and a noise removing circuit 13m. The integrating circuit 12m accumulates in a capacitor Cfk an electric charge input from the photodiode PDm,n through the switch SWm,n for the photodiode, and outputs a voltage value according to the amount of the accumulated electric charge. The noise removing circuit 13m includes an amplifier A3, five switches SW31 to SW35, four capacitors C31 to C34, and a power supply V3. The noise removing circuit 13m takes in a voltage value that is output from the integrating circuit 12m at a time where the switch SW31 is first turned from a closed state to an open state, and after the time, outputs a voltage value according to a difference between the voltage value that is output from the integrating circuit 12m and the voltage value previously taken in.
摘要翻译：光检测器件1包括光电二极管PDm，n，用于光电二极管的开关SWm，n，积分电路12m和噪声去除电路13m。积分电路12m通过用于光电二极管的开关SWm，n累积从光电二极管PDm，n输入的电荷的电容器Cfk，并输出与累积电荷量相对应的电压值。噪声消除电路13m包括放大器A3，五个开关SW31至SW35，四个电容器C31至C34以及电源V3。噪声消除电路13m在开关SW31首先从闭合状态转为断开状态时从积分电路12m输出的电压值，并且在此之后，输出根据差分的电压值在从积分电路12m输出的电压值与之前采用的电压值之间。

3. 发明授权

US07834798B2 AD converter circuit and optical sensor 有权
标题翻译： AD转换器电路和光学传感器
公开(公告)号：US07834798B2
公开(公告)日：2010-11-16
申请号：US12440167
申请日：2007-09-05
申请人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
发明人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
IPC分类号： H03M1/12
CPC分类号： H03M1/0682 , H01L27/14609 , H03M1/0604 , H03M1/468 , H04N5/378
摘要： The A/D converting circuit 20 is provided with a differential amplifying portion 21, a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23, a connection controlling portion 24, a first feedback portion 25A and a second feedback portion 25B. Voltage values output as a differential signal from the first output terminal and the second output terminal of the differential amplifying portion 21 are converted to 6-bit digital values by a successive approximation type A/D converting circuit (made up of a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23 and a connection controlling portion 24) and output. A difference in potential between the first common point P1 and the second common point P2 is fed back to the differential amplifying portion 21 by the first feedback portion 25A and the second feedback portion 25B, and again converted to a 6-bit digital value by the successive approximation type A/D converting circuit and output.
摘要翻译： A / D转换电路20具有差分放大部分21，第一可变电容部分22A，第二可变电容部分22B，比较部分23，连接控制部分24，第一反馈部分25A和第二反馈部分25B。从差分放大部分21的第一输出端和第二输出端输出的差分信号的电压值通过逐次逼近型A / D转换电路（由第一可变电容部分 22A，第二可变电容部分22B，比较部分23和连接控制部分24）并输出。第一公共点P1和第二公共点P2之间的电位差通过第一反馈部分25A和第二反馈部分25B被反馈到差分放大部分21，并且由第一反馈部分25A和第二反馈部分25B再次转换成6位数字值逐次逼近型A / D转换电路和输出。

4. 发明申请

US20100194621A1 AD CONVERTER CIRCUIT AND OPTICAL SENSOR 有权
标题翻译： AD转换器电路和光学传感器
公开(公告)号：US20100194621A1
公开(公告)日：2010-08-05
申请号：US12440167
申请日：2007-09-05
申请人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
发明人： Masaki Mizoguchi , Yasuhiro Suzuki , Seiichiro Mizuno , Hiroo Yamamoto
IPC分类号： H03M1/12
CPC分类号： H03M1/0682 , H01L27/14609 , H03M1/0604 , H03M1/468 , H04N5/378
摘要： The A/D converting circuit 20 is provided with a differential amplifying portion 21, a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23, a connection controlling portion 24, a first feedback portion 25A and a second feedback portion 25B. Voltage values output as a differential signal from the first output terminal and the second output terminal of the differential amplifying portion 21 are converted to 6-bit digital values by a successive approximation type A/D converting circuit (made up of a first variable capacitance portion 22A, a second variable capacitance portion 22B, a comparing portion 23 and a connection controlling portion 24) and output. A difference in potential between the first common point P1 and the second common point P2 is fed back to the differential amplifying portion 21 by the first feedback portion 25A and the second feedback portion 25B, and again converted to a 6-bit digital value by the successive approximation type A/D converting circuit and output.
摘要翻译： A / D转换电路20具有差分放大部分21，第一可变电容部分22A，第二可变电容部分22B，比较部分23，连接控制部分24，第一反馈部分25A和第二反馈部分25B。从差分放大部分21的第一输出端和第二输出端输出的差分信号的电压值通过逐次逼近型A / D转换电路（由第一可变电容部分 22A，第二可变电容部分22B，比较部分23和连接控制部分24）并输出。第一公共点P1和第二公共点P2之间的电位差通过第一反馈部分25A和第二反馈部分25B被反馈到差分放大部分21，并且由第一反馈部分25A和第二反馈部分25B再次转换成6位数字值逐次逼近型A / D转换电路和输出。

5. 发明授权

US07973844B2 Solid state image pickup device 有权
标题翻译：固态图像拾取装置
公开(公告)号：US07973844B2
公开(公告)日：2011-07-05
申请号：US10586971
申请日：2005-01-21
申请人： Yasuhiro Suzuki , Masaki Mizoguchi , Seiichiro Mizuno
发明人： Yasuhiro Suzuki , Masaki Mizoguchi , Seiichiro Mizuno
IPC分类号： H04N3/14 , H04N5/335
CPC分类号： H04N5/341 , H01L27/14603 , H04N5/335 , H04N5/374
摘要： The present invention relates to a solid-state image pickup apparatus which allows, when being applied as an element of a solid-state image pickup array, to reduce a non-sensitive region between the adjacent devices, and can thus obtain more accurate imaging results. The solid-state image pickup apparatus comprises a photodetecting section, an output section, a row selecting section, and a column selecting section, and further comprises M waveform shaping circuits as waveform shaping means for shaping the waveforms of row selecting signals. A row selecting signal outputted from the row selecting section is shaped by the waveform shaping circuit and is then inputted into N pixels that constitute an mth row of the photodetecting section.
摘要翻译：固态摄像装置技术领域本发明涉及一种固态摄像装置，其能够作为固体摄像阵列的元件而被使用，以减少相邻装置之间的非敏感区域，从而可以获得更准确的成像结果。固体摄像装置包括光检测部分，输出部分，行选择部分和列选择部分，并且还包括M个波形整形电路，作为对行选择信号的波形进行整形的波形整形装置。从行选择部分输出的行选择信号由波形整形电路整形，然后被输入到构成光电检测部分第m行的N个像素中。

6. 发明申请

US20070242151A1 Solid State Image Pickup Device 有权
标题翻译：固态图像拾取装置
公开(公告)号：US20070242151A1
公开(公告)日：2007-10-18
申请号：US10586971
申请日：2005-01-21
申请人： Yasuhiro Suzuki , Masaki Mizoguchi , Seiichiro Mizuno
发明人： Yasuhiro Suzuki , Masaki Mizoguchi , Seiichiro Mizuno
IPC分类号： G02B13/16
CPC分类号： H04N5/341 , H01L27/14603 , H04N5/335 , H04N5/374
摘要： The present invention relates to a solid-state image pickup apparatus which allows, when being applied as an element of a solid-state image pickup array, to reduce a non-sensitive region between the adjacent devices, and can thus obtain more accurate imaging results. The solid-state image pickup apparatus comprises a photodetecting section, an output section, a row selecting section, and a column selecting section, and further comprises M waveform shaping circuits as waveform shaping means for shaping the waveforms of row selecting signals. A row selecting signal outputted from the row selecting section is shaped by the waveform shaping circuit and is then inputted into N pixels that constitute an mth row of the photodetecting section.
摘要翻译：固态摄像装置技术领域本发明涉及一种固态摄像装置，其能够作为固体摄像阵列的元件而被使用，以减少相邻装置之间的非敏感区域，从而可以获得更准确的成像结果。固体摄像装置包括光检测部分，输出部分，行选择部分和列选择部分，并且还包括M个波形整形电路，作为对行选择信号的波形进行整形的波形整形装置。从行选择部分输出的行选择信号由波形整形电路整形，然后被输入到构成光电检测部分第m行的N个像素中。

7. 发明申请

US20080012974A1 Light detection apparatus 有权
标题翻译：光检测装置
公开(公告)号：US20080012974A1
公开(公告)日：2008-01-17
申请号：US11898857
申请日：2007-09-17
申请人： Seiichiro Mizuno , Hiroo Yamamoto , Kazuki Fujita
发明人： Seiichiro Mizuno , Hiroo Yamamoto , Kazuki Fujita
IPC分类号： H04N5/335
CPC分类号： G01J1/46
摘要： An amount of charges consonant with the intensity of the light entering photodiodes is generated, and the level of the charges is determined by a charge level determination circuit. Based on this determined charge level, a capacitance setting circuit sets a capacitance of an integrating capacitor unit in an integrating circuit. Thereafter, in the integrating circuit, the charges generated by the photodiodes are integrated in the integrating capacitor unit, and a voltage having a value consonant with the amount of the integrated charges is output. When background light is strong and the overall intensity of incident light is high, a comparatively large capacitance is set for the variable capacitor unit of the integrating circuit, and the intensity of the incident light is detected without saturation. When background light is weak and the overall intensity of incident light is low, a comparatively small capacitance is set for the variable capacitor unit of the integrating circuit, and the intensity of the incident light is detected at high sensitivity, regardless of the surrounding conditions.
摘要翻译：产生与进入光电二极管的光的强度相关的电荷量，并且电荷的电平由电荷水平确定电路确定。基于该确定的充电电平，电容设定电路将积分电容器单元的电容设定在积分电路中。此后，在积分电路中，由光电二极管产生的电荷积分在积分电容器单元中，并且输出具有与积分电荷量相关的值的电压。当背景光强且入射光的总强度高时，对于积分电路的可变电容器单元设置较大的电容，并且不饱和地检测入射光的强度。当背景光弱并且入射光的总强度低时，对于积分电路的可变电容器单元设置相对小的电容，并且不管周围条件如何，以高灵敏度检测入射光的强度。

8. 发明授权

US6002435A Solid-state imaging apparatus 失效
标题翻译：固态成像装置
公开(公告)号：US6002435A
公开(公告)日：1999-12-14
申请号：US831713
申请日：1997-04-01
申请人： Hiroo Yamamoto , Seiichiro Mizuno
发明人： Hiroo Yamamoto , Seiichiro Mizuno
IPC分类号： H01L27/146 , H04N5/335 , H04N5/341 , H04N5/365 , H04N5/369 , H04N5/372 , H04N5/374 , H04N5/378 , H04N3/14
CPC分类号： H04N5/378 , H04N5/3658 , H04N5/374
摘要： In the solid-state imaging apparatus of the present invention, when a signal is output from the capacity element to the data signal output circuit, the voltage of the output terminal of the capacity element is kept at that attained when the switch was previously opened, namely, the initial voltage of the input terminal of the data signal output circuit, whereby the voltage of the input terminal of the data signal output circuit is stable without fluctuation. Therefore, no noise is generated in the output signal at the instant when the capacity element and data signal output circuit are short-circuited, whereby optical images can be captured with a high accuracy in a high speed.
摘要翻译：在本发明的固态成像装置中，当从电容元件向数据信号输出电路输出信号时，电容元件的输出端子的电压保持为当开关预先打开时达到的电压，即数据信号输出电路的输入端的初始电压，数据信号输出电路的输入端的电压稳定，无波动。因此，当电容元件和数据信号输出电路短路时，在输出信号中不产生噪声，从而高速捕获高精度的光学图像。

9. 发明授权

US08803064B2 Signal processing device, including charge injection circuit, and photodetection device 有权
标题翻译：信号处理装置，包括电荷注入电路和光电检测装置
公开(公告)号：US08803064B2
公开(公告)日：2014-08-12
申请号：US13147244
申请日：2010-01-29
申请人： Seiichiro Mizuno , Hiroo Yamamoto , Makoto Kobayashi
发明人： Seiichiro Mizuno , Hiroo Yamamoto , Makoto Kobayashi
IPC分类号： H03F3/08 , H01L27/02 , G01J1/46
CPC分类号： H01L27/0225 , G01J1/46 , H01L27/14609 , H04N5/32 , H04N5/355 , H04N5/378
摘要： In a signal processing device of an embodiment, an integration circuit accumulates a charge from a photodiode in an integrating capacitor element, and outputs a voltage value according to the amount of charge. A comparator circuit, when the voltage value from the integration circuit has reached a reference value, outputs a saturation signal. A charge injection circuit, in response to the saturation signal, injects an opposite polarity of charge into the integrating capacitor element. A counter circuit performs counting based on the saturation signal. A holding circuit holds the voltage value from the integration circuit. An amplifier circuit outputs a voltage value that is K times (where K>1) larger than the voltage value held by the holding circuit. An A/D converter circuit sets a voltage value that is K times larger than the reference value as the maximum input voltage value, that is, a full-scale value, and outputs a digital value corresponding to the voltage value from the amplifier circuit.
摘要翻译：在实施例的信号处理装置中，积分电路从积分电容器元件中的光电二极管蓄积电荷，并输出与电荷量相对应的电压值。比较电路当积分电路的电压值达到基准值时，输出饱和信号。电荷注入电路响应于饱和信号，向积分电容器元件注入相反的电荷极性。计数器电路根据饱和信号进行计数。保持电路保持来自积分电路的电压值。放大电路输出比保持电路保持的电压值大K倍（K> 1）的电压值。 A / D转换器电路将比参考值大K倍的电压值设置为最大输入电压值，即满量程值，并输出与放大器电路的电压值对应的数字值。

10. 发明授权

US06812790B2 Signal read circuit 有权
标题翻译：信号读取电路
公开(公告)号：US06812790B2
公开(公告)日：2004-11-02
申请号：US10204916
申请日：2002-08-27
申请人： Masatoshi Ishihara , Hiroo Yamamoto , Seiichiro Mizuno
发明人： Masatoshi Ishihara , Hiroo Yamamoto , Seiichiro Mizuno
IPC分类号： H03F130
CPC分类号： H04N5/378 , H04N5/3575 , H04N5/361
摘要： In a signal read circuit including a plurality of circuit rows each having a charge amplifier connected to a photoelectric conversion element PD and a CDS circuit 2S for performing correlated double sampling for an output from the charge amplifier, a dummy circuit row DMY having the same configuration as a circuit row SLT is connected in parallel with this circuit row SLT. By calculating the difference between these circuit rows connected in parallel, offset variations generated in the two circuit rows SLT and DMY can be removed.

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