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    • 3. 发明授权
    • Synchronization signal generating device
    • 同步信号发生装置
    • US5610952A
    • 1997-03-11
    • US559915
    • 1995-11-17
    • Ken YamanakaHiroaki Ugawa
    • Ken YamanakaHiroaki Ugawa
    • G11B20/14H03L7/08H04L1/00H04L7/00H04L7/033H04L25/36
    • H04L7/033
    • A synchronization signal generation device includes a circuit that enables a phase difference between a synchronization signal and an input signal with intermittent edges to be arbitrarily and continuously varied. The synchronization signal generating device is of the second order phase locked loop and has a phase detector with the following elements: a circuit for generating pulses with widths corresponding to the phase difference between the input signal and the synchronization signal only upon occurrence of an edge of the input signal; a circuit for generating pulses with a constant width only upon occurrence of an edge of the input signal or the synchronization signal; a variation circuits which varies one or both of the amplitudes of the aforesaid pulses; and a combining circuit which adds or subtracts the pulses from the variation circuits to derive a phase comparison signal.
    • 同步信号产生装置包括使得同步信号和具有间歇边缘的输入信号之间的相位差能够任意且连续变化的电路。 同步信号产生装置是二阶锁相环,具有以下元件的相位检测器:用于产生具有对应于输入信号和同步信号之间的相位差的脉冲的脉冲的电路, 输入信号; 用于仅在出现输入信号或同步信号的边缘时产生具有恒定宽度的脉冲的电路; 变化电路,其改变上述脉冲的一个或两个振幅; 以及组合电路,其对来自变化电路的脉冲进行相加或相减以得出相位比较信号。
    • 6. 发明授权
    • Bit error measuring apparatus
    • 位误差测量仪
    • US5822331A
    • 1998-10-13
    • US521658
    • 1995-08-31
    • Hiroaki UgawaAtsushi Hattori
    • Hiroaki UgawaAtsushi Hattori
    • G06F11/267G11B20/18H03M13/00G06F11/00
    • G06F11/2221G11B20/182
    • A system efficiently determines and stores in memory the logical bit positions of bits in which bit errors have occurred in digital recording devices, etc. The system measures bit errors by comparing a test bit string with a correct bit string, and includes a bit string memory that stores the correct bit string, a word comparator for comparing corresponding words from the test bit string and the correct bit string, an error word content memory that stores the contents of the words containing errors, and an error word position information memory that shows the positions in the correct bit string which correspond to error words in the test bit string that contain the errors. Bit error information in a desired visual format is obtained by performing calculation processing on these memory values.
    • 系统有效地确定并存储在数字记录装置等中发生比特错误的比特的逻辑比特位置。该系统通过将测试比特串与正确比特串进行比较来测量比特错误,并且包括比特串存储器 存储正确的位串,用于比较来自测试位串和正确位串的对应字的字比较器,存储包含错误的字的内容的错误字内容存储器,以及显示所述错误字位置信息存储器 位于与包含错误的测试位串中的错误字对应的正确位串中的位置。 通过对这些存储器值执行计算处理,获得所需视觉格式的位错误信息。