会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • Method for manufacturing a thin-film transistor operable at high voltage
    • 制造可在高电压下工作的薄膜晶体管的方法
    • US5039622A
    • 1991-08-13
    • US607340
    • 1990-10-31
    • Hiroyasu Ishihara
    • Hiroyasu Ishihara
    • H01L27/12H01L21/336H01L29/78H01L29/786
    • H01L29/78642Y10S148/082Y10S148/15
    • There are disclosed a structure and a manufacturing method of a MOS-type thin-film field effect transistor composed of a substrate having an insulating main surface, a gate electrode formed on the insulating main surface to have an upper surface and a side surface at its edge, an insulating film covering at least the upper and side surfaces of the gate electrode, a semiconductor film having three continuous first, second and third portions, the first portion positioned above the upper surface of the gate electrode, the second portion being formed in contact with the insulator film at the side surface of the gate electrode and the third portion positioned above the substrate without interposing the gate electrode, a side-wall insulator formed on a part of the third portion of the semiconductor film and having a side surface contacting the second portion of the semiconductor film, and source and drain regions formed by introducing impurity atoms into the first portion and another part of the third portion of the semiconductor film, the part and the other part of the third portion being in contact with each other. The introduction of the impurity atoms is performed with use of the sidewall insulator as a mask by ion-implantation process or a process for converting insulator solution containing impurity atoms into a solid-state insulator by a heat treatment.
    • 5. 发明授权
    • Thin-film transistor operable at high voltage and a method for
manufacturing the same
    • 在高电压下工作的薄膜晶体管及其制造方法
    • US5001540A
    • 1991-03-19
    • US321923
    • 1989-03-13
    • Hiroyasu Ishihara
    • Hiroyasu Ishihara
    • H01L27/12H01L21/336H01L29/78H01L29/786
    • H01L29/78642Y10S148/082Y10S148/15
    • There are disclosed a structure and a manufacturing method of a MOS-type thin-film field effect transistor composed of a substrate having an insulating main surface, a gate electrode formed on the insulating main surface to have an upper surface and a side surface at its edge, an insulating film covering at least the upper and side surfaces of the gate electrode, a semiconductor film having three continuous first, second and third portions, the first portion positioned above the upper surface of the gate electrode, the second portion being formed in contact with the insulator film at the side surface of the gate electrode and the third portion positioned above the substrate without interposing the gate electrode, a side-wall insulator formed on a part of the third portion of the semiconductor film and having a side surface contacting the second portion of the semiconductor film, and source and drain regions formed by introducing impurity atoms into the first portion and another part of the third portion of the semiconductor film, the part and the other part of the third portion being in contact with each other. The introduction of the impurity atoms is performed with use of the side-wall insulator as a mask by ion-implantation process or a process for converting insulator solution containing impurity atoms into a solid-state insulator by a heat-treatment.