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1. 发明申请

US20130075789A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20130075789A1
公开(公告)日：2013-03-28
申请号：US13606542
申请日：2012-09-07
申请人： Masahito KANAMURA , Toyoo Miyajima , Toshihiro Ohki
发明人： Masahito KANAMURA , Toyoo Miyajima , Toshihiro Ohki
IPC分类号： H01L29/778 , H01L21/336
CPC分类号： H01L29/42364 , H01L21/28264 , H01L29/2003 , H01L29/66462 , H01L29/7787 , H01L2224/0603 , H01L2224/48247 , H01L2224/48257 , H01L2224/48472 , H01L2224/4903 , H03F1/3247
摘要： A semiconductor device, comprising: a first semiconductor layer disposed on a substrate; a second semiconductor layer disposed on the first semiconductor layer; a lower insulating film disposed on the second semiconductor layer; a p-type electroconductive oxide film disposed on the lower insulating film; an upper insulating film disposed on the oxide film; and a gate electrode disposed on the upper insulating film, wherein the lower insulating film under the gate electrode has a depressed portion.
摘要翻译：一种半导体器件，包括：设置在基板上的第一半导体层; 设置在所述第一半导体层上的第二半导体层; 设置在所述第二半导体层上的下绝缘膜; 设置在下绝缘膜上的p型导电氧化物膜; 设置在氧化膜上的上绝缘膜; 以及设置在所述上绝缘膜上的栅电极，其中所述栅电极下的下绝缘膜具有凹陷部。

2. 发明授权

US09269782B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09269782B2
公开(公告)日：2016-02-23
申请号：US13606542
申请日：2012-09-07
申请人： Masahito Kanamura , Toyoo Miyajima , Toshihiro Ohki
发明人： Masahito Kanamura , Toyoo Miyajima , Toshihiro Ohki
IPC分类号： H01L29/423 , H01L29/66 , H01L29/778 , H01L29/20 , H03F1/32 , H01L21/28
CPC分类号： H01L29/42364 , H01L21/28264 , H01L29/2003 , H01L29/66462 , H01L29/7787 , H01L2224/0603 , H01L2224/48247 , H01L2224/48257 , H01L2224/48472 , H01L2224/4903 , H03F1/3247
摘要： A semiconductor device, comprising: a first semiconductor layer disposed on a substrate; a second semiconductor layer disposed on the first semiconductor layer; a lower insulating film disposed on the second semiconductor layer; a p-type electroconductive oxide film disposed on the lower insulating film; an upper insulating film disposed on the oxide film; and a gate electrode disposed on the upper insulating film, wherein the lower insulating film under the gate electrode has a depressed portion.
摘要翻译：一种半导体器件，包括：设置在基板上的第一半导体层; 设置在所述第一半导体层上的第二半导体层; 设置在所述第二半导体层上的下绝缘膜; 设置在下绝缘膜上的p型导电氧化物膜; 设置在氧化膜上的上绝缘膜; 以及设置在所述上绝缘膜上的栅电极，其中所述栅电极下的下绝缘膜具有凹陷部。

3. 发明授权

US08426260B2 Compound semiconductor device and method of manufacturing the same 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US08426260B2
公开(公告)日：2013-04-23
申请号：US13294726
申请日：2011-11-11
申请人： Toyoo Miyajima , Toshihide Kikkawa , Kenji Imanishi , Toshihiro Ohki , Masahito Kanamura
发明人： Toyoo Miyajima , Toshihide Kikkawa , Kenji Imanishi , Toshihiro Ohki , Masahito Kanamura
IPC分类号： H01L21/338 , H01L29/66
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/4236 , H01L29/7787
摘要： A compound semiconductor device includes: an electron transport layer formed over a substrate; an electron supply layer formed over the electron transport layer; and a cap layer formed over the electron supply layer; the cap layer includes a first compound semiconductor layer containing GaN; a second compound semiconductor layer containing AlN, which is formed over the first compound semiconductor layer; a third compound semiconductor layer containing GaN, which is formed over the second compound semiconductor layer; and at least one of a first AlGaN-containing layer and a second AlGaN-containing layer, with the first AlGaN-containing layer formed between the first compound semiconductor layer and the second compound semiconductor layer and the Al content increases toward the second compound semiconductor layer, and the second AlGaN-containing layer formed between the second compound semiconductor layer and the third compound semiconductor layer and the Al content increases toward the second compound semiconductor layer.
摘要翻译：化合物半导体器件包括：形成在衬底上的电子传输层; 形成在电子传输层上的电子供应层; 以及形成在所述电子供给层上的盖层; 盖层包括含有GaN的第一化合物半导体层; 含有AlN的第二化合物半导体层，其形成在所述第一化合物半导体层上; 含有GaN的第三化合物半导体层，其形成在所述第二化合物半导体层上; 以及第一AlGaN含有层和第二含AlGaN的层中的至少一个，其中形成在第一化合物半导体层和第二化合物半导体层之间的第一AlGaN含有层，并且Al含量朝向第二化合物半导体层增加并且形成在第二化合物半导体层和第三化合物半导体层之间的第二AlGaN含量层和Al含量朝向第二化合物半导体层增加。

4. 发明申请

US20120205662A1 SEMICONDUCTOR DEVICE, POWER SUPPLY DEVICE, AMPLIFIER, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件，电源装置，放大器及制造半导体器件的方法
公开(公告)号：US20120205662A1
公开(公告)日：2012-08-16
申请号：US13357901
申请日：2012-01-25
申请人： Norikazu Nakamura , Shirou Ozaki , Masayuki Takeda , Toyoo Miyajima , Toshihiro Ohki , Masahito Kanamura , Kenji Imanishi , Toshihide Kikkawa , Keiji Watanabe
发明人： Norikazu Nakamura , Shirou Ozaki , Masayuki Takeda , Toyoo Miyajima , Toshihiro Ohki , Masahito Kanamura , Kenji Imanishi , Toshihide Kikkawa , Keiji Watanabe
IPC分类号： H01L29/20 , H01L21/336
CPC分类号： H01L29/66462 , H01J37/32055 , H01J37/32357 , H01J37/32422 , H01J37/32669 , H01L21/28264 , H01L29/2003 , H01L29/41766 , H01L29/4236 , H01L29/51 , H01L29/513 , H01L29/517 , H01L29/7786 , H01L29/7787 , H01L2224/0603 , H01L2224/48247 , H01L2224/48257 , H01L2224/4903
摘要： A semiconductor device includes: a semiconductor layer formed over a substrate; an insulating film formed over the semiconductor layer; and an electrode formed over the insulating film, wherein the insulating film includes an amorphous film including carbon.
摘要翻译：半导体器件包括：形成在衬底上的半导体层; 形成在所述半导体层上的绝缘膜; 以及形成在所述绝缘膜上的电极，其中所述绝缘膜包括包含碳的非晶膜。

5. 发明申请

US20120091522A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120091522A1
公开(公告)日：2012-04-19
申请号：US13276521
申请日：2011-10-19
申请人： Shirou OZAKI , Masahito Kanamura , Norikazu Nakamura , Toyoo Miyajima , Masayuki Takeda , Keiji Watanabe , Toshihide Kikkawa , Kenji Imanishi , Toshihiro Ohki , Tadahiro Imada
发明人： Shirou OZAKI , Masahito Kanamura , Norikazu Nakamura , Toyoo Miyajima , Masayuki Takeda , Keiji Watanabe , Toshihide Kikkawa , Kenji Imanishi , Toshihiro Ohki , Tadahiro Imada
IPC分类号： H01L29/78 , H01L21/336 , H01L29/772
CPC分类号： H01L29/517 , H01L21/0228 , H01L23/291 , H01L29/2003 , H01L29/41766 , H01L29/4236 , H01L29/42376 , H01L29/518 , H01L29/66462 , H01L29/7786 , H01L29/7787 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device includes a first semiconductor layer formed over a substrate, a second semiconductor layer formed over the first semiconductor layer, a source electrode and a drain electrode formed over the second semiconductor layer, an insulating film formed over the second semiconductor layer, a gate electrode formed over the insulating film, and a protection film covering the insulating film, the protection film being formed by thermal CVD, thermal ALD, or vacuum vapor deposition.
摘要翻译：半导体器件包括形成在衬底上的第一半导体层，形成在第一半导体层上的第二半导体层，形成在第二半导体层上的源电极和漏电极，形成在第二半导体层上的绝缘膜，栅极形成在绝缘膜上的电极，以及覆盖绝缘膜的保护膜，保护膜通过热CVD，热ALD或真空气相沉积形成。

6. 发明授权

US09209042B2 Compound semiconductor device and manufacturing method therefor 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US09209042B2
公开(公告)日：2015-12-08
申请号：US14301679
申请日：2014-06-11
申请人： Naoya Okamoto , Kozo Makiyama , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
发明人： Naoya Okamoto , Kozo Makiyama , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
IPC分类号： H01L21/02 , H01L21/311 , H01L21/285 , H01L29/423 , H01L29/47 , H01L29/778 , H01L29/872 , H01L21/28 , H01L29/205 , H01L23/29 , H01L23/31 , H01L29/43 , H01L29/20
CPC分类号： H01L21/31144 , H01L21/28 , H01L21/28581 , H01L23/291 , H01L23/3171 , H01L29/2003 , H01L29/205 , H01L29/42316 , H01L29/432 , H01L29/475 , H01L29/7786 , H01L29/7787 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.
摘要翻译：化合物半导体器件包括化合物半导体层叠结构，在化合物半导体层叠结构上形成并具有通孔的钝化膜以及形成在钝化膜上以便堵塞通孔的栅电极。在栅电极中形成不同结晶取向之间的晶界，并且晶界的起始点与钝化膜的平坦表面上的通孔分开。

7. 发明申请

US20140295666A1 COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US20140295666A1
公开(公告)日：2014-10-02
申请号：US14301679
申请日：2014-06-11
申请人： Naoya Okamoto , Kozo Makiyama , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
发明人： Naoya Okamoto , Kozo Makiyama , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
IPC分类号： H01L21/311 , H01L29/205 , H01L29/778 , H01L21/28 , H01L29/423
CPC分类号： H01L21/31144 , H01L21/28 , H01L21/28581 , H01L23/291 , H01L23/3171 , H01L29/2003 , H01L29/205 , H01L29/42316 , H01L29/432 , H01L29/475 , H01L29/7786 , H01L29/7787 , H01L29/872 , H01L2924/0002 , H01L2924/00
摘要： A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.
摘要翻译：化合物半导体器件包括化合物半导体层叠结构，在化合物半导体层叠结构上形成并具有通孔的钝化膜以及形成在钝化膜上以便堵塞通孔的栅电极。在栅电极中形成不同结晶取向之间的晶界，并且晶界的起始点与钝化膜的平坦表面上的通孔分开。

8. 发明授权

US08709886B2 Compound semiconductor device and manufacturing method therefor 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US08709886B2
公开(公告)日：2014-04-29
申请号：US13555420
申请日：2012-07-23
申请人： Kozo Makiyama , Naoya Okamoto , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
发明人： Kozo Makiyama , Naoya Okamoto , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
IPC分类号： H01L21/338
CPC分类号： H01L29/408 , H01L29/2003 , H01L29/66462 , H01L29/778 , H01L29/7786 , H01L29/7787 , H02M7/537
摘要： An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
摘要翻译： HEMT在SiC衬底上包括化合物半导体层，具有开口并覆盖化合物半导体层的氮化硅（SiN）保护膜和形成在化合物半导体层上的栅电极以堵塞开口。在保护膜中，从开口侧面突出的突出部形成在下层部6a。

9. 发明申请

US20130083568A1 COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：US20130083568A1
公开(公告)日：2013-04-04
申请号：US13555420
申请日：2012-07-23
申请人： Kozo MAKIYAMA , Naoya Okamoto , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
发明人： Kozo MAKIYAMA , Naoya Okamoto , Toshihiro Ohki , Yuichi Minoura , Shirou Ozaki , Toyoo Miyajima
IPC分类号： H01L29/78 , H02M5/458 , H01L21/336
CPC分类号： H01L29/408 , H01L29/2003 , H01L29/66462 , H01L29/778 , H01L29/7786 , H01L29/7787 , H02M7/537
摘要： An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
摘要翻译： HEMT在SiC衬底上包括化合物半导体层，具有开口并覆盖化合物半导体层的氮化硅（SiN）保护膜和形成在化合物半导体层上的栅电极以堵塞开口。在保护膜中，从开口侧面突出的突出部形成在下层部6a。

10. 发明授权

US08389351B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08389351B2
公开(公告)日：2013-03-05
申请号：US13282812
申请日：2011-10-27
申请人： Toshihiro Ohki , Masahito Kanamura
发明人： Toshihiro Ohki , Masahito Kanamura
IPC分类号： H01L21/336
CPC分类号： H01L29/7786 , H01L29/2003 , H01L29/4236 , H01L29/66462 , H01L2224/0603 , H01L2224/48247 , H01L2224/48257 , H01L2224/48472 , H01L2224/4903
摘要： A method for fabricating a semiconductor device is disclosed. A resist pattern is formed on a surface of a semiconductor layer in which a first layer and a second layer are sequentially formed on a substrate. A gate recess is formed by removing a part or the entire second layer in an opening area of the resist pattern. The resist pattern is removed. A dry etching residue attached to a bottom surface and lateral surfaces of the gate recess is removed after the resist pattern is removed. An insulating film is formed on the bottom surface, the lateral surfaces, and the semiconductor layer after the dry etching residue is removed. A gate electrode is formed via the insulating film on an area where the gate recess is formed. A source electrode and a drain electrode are formed on the semiconductor layer.
摘要翻译：公开了一种制造半导体器件的方法。在半导体层的表面上形成抗蚀剂图案，其中在衬底上依次形成第一层和第二层。通过去除抗蚀剂图案的开口区域中的一部分或全部第二层来形成栅极凹部。去除抗蚀剂图案。在除去抗蚀剂图案之后，去除附着到底部表面和浇口凹槽的侧表面的干蚀刻残留物。在去除干蚀刻残渣之后，在底表面，侧表面和半导体层上形成绝缘膜。在形成栅极凹部的区域，经由绝缘膜形成栅电极。源电极和漏电极形成在半导体层上。

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