会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明授权
    • OFDM receiving device and OFDM receiving method
    • OFDM接收装置和OFDM接收方法
    • US07403472B2
    • 2008-07-22
    • US11089810
    • 2005-03-25
    • Takahiro OkadaYoshikazu MiyatoYasunari IkedaTamotsu Ikeda
    • Takahiro OkadaYoshikazu MiyatoYasunari IkedaTamotsu Ikeda
    • H04J11/00
    • H04L27/2656H04L5/023
    • The time required for switch the channel can be remarkably curtailed. When broadcasting signals through a plurality of information channels with an OFDM system, the plurality of information channels are multiplexed in the sense of frequency and collectively subjected to IFFT modulation for connected transmission instead of subjecting the plurality of information channels independently to OFDM modulation for transmission. With this arrangement, the efficiency of exploitation of frequencies is improved. According to the invention, the OFDM frames are synchronized for each information channel for the purpose of connected transmission. Then, the OFDM receiver can switch the information channel for signal reception, maintaining the frame synchronizing signals.
    • 切换通道所需的时间可以大大减少。 当通过具有OFDM系统的多个信息信道广播信号时,多个信息信道在频率上被多路复用,并且对于所连接的发送集中地进行IFFT调制,而不是独立地对多个信道进行OFDM调制以进行传输。 通过这种安排,提高了频率利用的效率。 根据本发明,为了连接传输的目的,为每个信息信道同步OFDM帧。 然后,OFDM接收机可以切换用于信号接收的信道,保持帧同步信号。
    • 6. 发明授权
    • Operation processing apparatus, operation processing control method, and computer program
    • 操作处理装置,操作处理控制方法和计算机程序
    • US07659837B2
    • 2010-02-09
    • US11948582
    • 2007-11-30
    • Yoshikazu MiyatoToru Akishita
    • Yoshikazu MiyatoToru Akishita
    • H03M7/00
    • H03M5/04H04L9/003H04L9/0618H04L2209/12
    • An operation processing apparatus adapted to perform a data conversion on input bits has a logic circuit adapted to perform a data conversion on input bits. The logic circuit includes selectors configured in a hierarchical layer structure and controlled by select signals corresponding to the input bits. Constant values input to selectors located in a bottom layer of the hierarchical structure are selected and transferred toward a top layer from one layer to another. A constant value is finally selected and output from the top layer. The data conversion process is controlled by a control unit such that a pre-charge phase and an evaluation phase are performed alternately. In the pre-charge phase, all input values to the selectors are set to be equal. In the evaluation phase, an output bit for given input bits is produced. The select signals are switched in the pre-charge phase.
    • 适于对输入比特执行数据转换的操作处理装置具有适于对输入比特执行数据转换的逻辑电路。 逻辑电路包括以分级层结构配置并由对应于输入位的选择信号控制的选择器。 选择输入到位于分层结构底层的选择器的常数值,并将其从顶层转移到另一层。 最后选择一个恒定值并从顶层输出。 数据转换处理由控制单元控制,使得交替执行预充电阶段和评估阶段。 在预充电阶段,选择器的所有输入值都被设置为相等。 在评估阶段,产生给定输入位的输出位。 选择信号在预充电阶段切换。