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1. 发明申请

US20090293055A1 Central Office Based Virtual Personal Computer 有权
标题翻译：中央办公室虚拟个人电脑
公开(公告)号：US20090293055A1
公开(公告)日：2009-11-26
申请号：US12125315
申请日：2008-05-22
申请人： Martin D. Carroll , Hungkei Keith Chow , Ilija Hadzic , Ronald L. Sharp , Theodore Sizer, II , Dusan Suvakovic , Doutje T. Van Veen
发明人： Martin D. Carroll , Hungkei Keith Chow , Ilija Hadzic , Ronald L. Sharp , Theodore Sizer, II , Dusan Suvakovic , Doutje T. Van Veen
IPC分类号： G06F9/455
CPC分类号： G06F9/5077 , G06F9/4856
摘要： A virtual personal computer is implemented in a communication system comprising a plurality of central offices each of which communicates with a plurality of client devices over a corresponding access network. A given one of the central offices comprises at least one compute server and at least one storage server. The virtual personal computer is configured by allocating physical processing resources of the compute server and physical storage resources of the storage server to that virtual personal computer. User access is provided to the virtual personal computer via one of the client devices. The virtual personal computer can be dynamically reconfigured by altering the allocation of at least one of the physical processing resources and the physical storage resources to the given virtual personal computer responsive to particular applications selected by the user to run on the given virtual personal computer.
摘要翻译：在包括多个中心局的通信系统中实现虚拟个人计算机，每个中心局通过相应的接入网络与多个客户端设备进行通信。给定的一个中心局包括至少一个计算服务器和至少一个存储服务器。通过将计算服务器的物理处理资源和存储服务器的物理存储资源分配给该虚拟个人计算机来配置虚拟个人计算机。用户访问通过其中一个客户端设备提供给虚拟个人计算机。响应于用户选择的在给定的虚拟个人计算机上运行的特定应用，可以通过将物理处理资源和物理存储资源中的至少一个的分配改变到给定的虚拟个人计算机来动态地重新配置虚拟个人计算机。

2. 发明授权

US09459927B2 Central office based virtual personal computer 有权
标题翻译：中央办公室虚拟个人电脑
公开(公告)号：US09459927B2
公开(公告)日：2016-10-04
申请号：US12125315
申请日：2008-05-22
申请人： Martin D. Carroll , Hungkei Keith Chow , Ilija Hadzic , Ronald L. Sharp , Theodore Sizer, II , Dusan Suvakovic , Doutje T. Van Veen
发明人： Martin D. Carroll , Hungkei Keith Chow , Ilija Hadzic , Ronald L. Sharp , Theodore Sizer, II , Dusan Suvakovic , Doutje T. Van Veen
IPC分类号： G06F9/455 , G06F9/50 , G06F9/48
CPC分类号： G06F9/5077 , G06F9/4856
摘要： A virtual personal computer is implemented in a communication system comprising a plurality of central offices each of which communicates with a plurality of client devices over a corresponding access network. A given one of the central offices comprises at least one compute server and at least one storage server. The virtual personal computer is configured by allocating physical processing resources of the compute server and physical storage resources of the storage server to that virtual personal computer. User access is provided to the virtual personal computer via one of the client devices. The virtual personal computer can be dynamically reconfigured by altering the allocation of at least one of the physical processing resources and the physical storage resources to the given virtual personal computer responsive to particular applications selected by the user to run on the given virtual personal computer.
摘要翻译：在包括多个中心局的通信系统中实现虚拟个人计算机，每个中心局通过相应的接入网络与多个客户端设备进行通信。给定的一个中心局包括至少一个计算服务器和至少一个存储服务器。通过将计算服务器的物理处理资源和存储服务器的物理存储资源分配给该虚拟个人计算机来配置虚拟个人计算机。用户访问通过其中一个客户端设备提供给虚拟个人计算机。响应于用户选择的在给定的虚拟个人计算机上运行的特定应用，可以通过将物理处理资源和物理存储资源中的至少一个的分配改变到给定的虚拟个人计算机来动态地重新配置虚拟个人计算机。

3. 发明授权

US07525971B2 Software-hardware partitioning of a scheduled medium-access protocol 有权
标题翻译：计划的媒体访问协议的软硬件分区
公开(公告)号：US07525971B2
公开(公告)日：2009-04-28
申请号：US11081932
申请日：2005-03-16
申请人： Martin D. Carroll , Ilija Hadzic , Dusan Suvakovic
发明人： Martin D. Carroll , Ilija Hadzic , Dusan Suvakovic
IPC分类号： H04L12/28 , H04J14/00
CPC分类号： H04L12/66 , H04L47/24
摘要： A processing device, configured to implement at least a portion of a scheduled medium-access protocol (SMAP) in a communication system, comprises a processor, a memory coupled to the processor, and one or more additional hardware modules. The functionality of the portion of the SMAP implemented in the processing device is partitioned between software, stored in the memory and executable by the processor, and hardware comprising the one or more additional hardware modules. In an illustrative embodiment, the processing device comprises a head-end device of a passive optical network, and the functionality comprises at least a scheduler and a grant generator, with the scheduler being implemented in the software and the grant generator being implemented in the hardware.
摘要翻译：一种被配置为在通信系统中实现调度介质访问协议（SMAP）的至少一部分的处理设备，包括处理器，耦合到处理器的存储器以及一个或多个附加硬件模块。在处理设备中实现的SMAP的部分的功能在存储在存储器中并且可由处理器执行的软件以及包括一个或多个附加硬件模块的硬件之间进行分区。在说明性实施例中，处理设备包括无源光网络的头端设备，并且功能性至少包括调度器和授权生成器，其中调度器在软件中实现，并且授权生成器被实现在硬件中。

4. 发明申请

US20060222129A1 High-speed serial transceiver with sub-nominal rate operating mode 有权
标题翻译：具有次标称速率操作模式的高速串行收发器
公开(公告)号：US20060222129A1
公开(公告)日：2006-10-05
申请号：US11093638
申请日：2005-03-30
申请人： Ilija Hadzic , Dusan Suvakovic
发明人： Ilija Hadzic , Dusan Suvakovic
IPC分类号： H04L7/00 , H04L7/02
CPC分类号： H04L7/0338
摘要： A communication device comprises a receiver and a data recovery module. The receiver may be an element of a serial transceiver embedded in or otherwise associated with an FPGA or other type of reconfigurable hardware. The receiver is operable with an unlocked sampling clock. The data recovery module is configured to detect transition edges in data signal samples generated by the receiver using the unlocked sampling clock, and to determine from the detected edges a sampling point for use in recovery of the associated data. The data recovery module is further configured to provide adjustment in the sampling point in the presence of transition edge variations, such as one or more exception conditions, that are attributable to the unlocked sampling clock.
摘要翻译：通信设备包括接收机和数据恢复模块。接收器可以是串行收发器的一个元件，嵌入在FPGA或其他类型的可重新配置硬件中或以其他方式与FPGA或其他类型的可重新配置的硬件相关联。接收器可以用解锁的采样时钟操作。数据恢复模块被配置为检测由接收机使用解锁的采样时钟产生的数据信号样本中的转换边缘，并且从检测到的边缘确定用于恢复关联数据的采样点。数据恢复模块还被配置为在存在可归因于解锁的采样时钟的过渡边缘变化（例如一个或多个异常条件）的情况下，在采样点中提供调整。

5. 发明授权

US07123675B2 Clock, data and time recovery using bit-resolved timing registers 有权
标题翻译：使用位解析定时寄存器的时钟，数据和时间恢复
公开(公告)号：US07123675B2
公开(公告)日：2006-10-17
申请号：US10255008
申请日：2002-09-25
申请人： Glenn M Boles , Alfred Earl Dunlop , Ilija Hadzic , Manyalibo Joseph Matthews , Dusan Suvakovic , Doutje T. Van Veen
发明人： Glenn M Boles , Alfred Earl Dunlop , Ilija Hadzic , Manyalibo Joseph Matthews , Dusan Suvakovic , Doutje T. Van Veen
IPC分类号： H04L7/00
CPC分类号： H04J3/1694 , H04J3/0682 , H04L7/042
摘要： A clock recovery method is disclosed wherein the FIFO delay of data words and the phase difference between a data word and a receiver clock are used to time data transmissions from a transmitter. The phase difference between the data word and the receiver clock is determined by the offset of a word relative to a desired position in a storage buffer. The FIFO delay is determined either by measuring the difference between a read pointer and a write pointer in the FIFO or, alternatively, by calculating the difference between a timestamp of the time a data word entered the FIFO and the current time as the data word is read from the FIFO.
摘要翻译：公开了一种时钟恢复方法，其中数据字的FIFO延迟和数据字与接收机时钟之间的相位差用于对发射机进行数据传输。数据字和接收器时钟之间的相位差由字相对于存储缓冲器中的期望位置的偏移量确定。通过测量FIFO中的读指针和写指针之间的差来确定FIFO延迟，或者通过计算数据字进入FIFO的时间与当前时间的时间戳之间的差，从FIFO读取。

6. 发明申请

US20060209825A1 Software-hardware partitioning of a scheduled medium-access protocol 有权
标题翻译：计划的媒体访问协议的软硬件分区
公开(公告)号：US20060209825A1
公开(公告)日：2006-09-21
申请号：US11081932
申请日：2005-03-16
申请人： Martin Carroll , Ilija Hadzic , Dusan Suvakovic
发明人： Martin Carroll , Ilija Hadzic , Dusan Suvakovic
IPC分类号： H04L12/56 , H04L12/28
CPC分类号： H04L12/66 , H04L47/24
摘要： A processing device, configured to implement at least a portion of a scheduled medium-access protocol (SMAP) in a communication system, comprises a processor, a memory coupled to the processor, and one or more additional hardware modules. The functionality of the portion of the SMAP implemented in the processing device is partitioned between software, stored in the memory and executable by the processor, and hardware comprising the one or more additional hardware modules. In an illustrative embodiment, the processing device comprises a head-end device of a passive optical network, and the functionality comprises at least a scheduler and a grant generator, with the scheduler being implemented in the software and the grant generator being implemented in the hardware. As a result of this software-hardware partitioning, the scheduler is able to generate updated schedules at a rate which is independent of a rate at which the grant generator generates upstream channel access grants for subscriber devices of the system, thereby improving system performance.
摘要翻译：一种被配置为在通信系统中实现调度介质访问协议（SMAP）的至少一部分的处理设备，包括处理器，耦合到处理器的存储器以及一个或多个附加硬件模块。在处理设备中实现的SMAP的部分的功能在存储在存储器中并且可由处理器执行的软件以及包括一个或多个附加硬件模块的硬件之间进行分区。在说明性实施例中，处理设备包括无源光网络的头端设备，并且功能性至少包括调度器和授权生成器，其中调度器在软件中实现，并且授权生成器被实现在硬件中。作为这种软件 - 硬件分区的结果，调度器能够以不同于授权生成器为系统的订户设备生成上行信道访问许可的速率的速率生成更新的调度，从而提高系统性能。

7. 发明授权

US07672416B2 High-speed serial transceiver with sub-nominal rate operating mode 有权
标题翻译：具有次标称速率操作模式的高速串行收发器
公开(公告)号：US07672416B2
公开(公告)日：2010-03-02
申请号：US11093638
申请日：2005-03-30
申请人： Ilija Hadzic , Dusan Suvakovic
发明人： Ilija Hadzic , Dusan Suvakovic
IPC分类号： H04L7/04 , H04L7/00
CPC分类号： H04L7/0338
摘要： A communication device comprises a receiver and a data recovery module. The receiver may be an element of a serial transceiver embedded in or otherwise associated with an FPGA or other type of reconfigurable hardware. The receiver is operable with an unlocked sampling clock. The data recovery module is configured to detect transition edges in data signal samples generated by the receiver using the unlocked sampling clock, and to determine from the detected edges a sampling point for use in recovery of the associated data. The data recovery module is further configured to provide adjustment in the sampling point in the presence of transition edge variations, such as one or more exception conditions, that are attributable to the unlocked sampling clock.
摘要翻译：通信设备包括接收机和数据恢复模块。接收器可以是串行收发器的一个元件，嵌入在FPGA或其他类型的可重新配置硬件中或以其他方式与FPGA或其他类型的可重新配置硬件相关联。接收器可以用解锁的采样时钟操作。数据恢复模块被配置为检测由接收机使用解锁的采样时钟产生的数据信号样本中的转换边缘，并且从检测到的边缘确定用于恢复关联数据的采样点。数据恢复模块还被配置为在存在可归因于解锁的采样时钟的过渡边缘变化（例如一个或多个异常条件）的情况下，在采样点中提供调整。

8. 发明申请

US20170168994A1 Method And Apparatus For Facilitating Visual Presentations 审中-公开
公开(公告)号：US20170168994A1
公开(公告)日：2017-06-15
申请号：US14966230
申请日：2015-12-11
申请人： Martin D. Carroll , Michael J. Coss , Katherine H. Guo , Ilija Hadzic , Hans C. Woithe
发明人： Martin D. Carroll , Michael J. Coss , Katherine H. Guo , Ilija Hadzic , Hans C. Woithe
IPC分类号： G06F17/21 , G06F17/30
CPC分类号： G06F17/212 , G06F16/93
摘要： A manner of facilitating document presentation that may be used to advantage, for example, by a presenter in a meeting room or auditorium setting. A document-presentation system includes a control server that receives a document-presentation indication, for example from a presenter device or another apparatus in a meeting room or associated with a meeting. The control server communicates with the presenter, or user, and determines the document or documents to be presented and a location from which they may be obtained. The control server then sends a presentation notice to a selected render server, which downloads and renders the document. The render server renders the document to a frame buffer in local memory, encodes the pixels read from the frame buffer, and streams the encoded pixels to an adapted display device in a selected location. The render server communicates with the user via the presenter device to start, control, and terminate the presentation.

9. 发明申请

US20100117624A1 NETWORK-DISTRIBUTED OSCILLOSCOPE AND METHOD OF OPERATION THEREOF 审中-公开
标题翻译：网络分布式振荡器及其操作方法
公开(公告)号：US20100117624A1
公开(公告)日：2010-05-13
申请号：US12268711
申请日：2008-11-11
申请人： Martin D. Carroll , Ilija Hadzic
发明人： Martin D. Carroll , Ilija Hadzic
IPC分类号： G01R13/20 , G01R23/16
CPC分类号： G01R19/2516
摘要： A system and method for achieving oscilloscope functionality over a network. In one embodiment, the system includes: (1) a core having a local memory and configured to gather samples of an external signal based on a schedule at a specified sampling rate, write the samples into the local memory and transmit the samples over the network, and (2) a viewer couplable to the core over a network and configured to receive the samples over the network and display a waveform based on the samples.
摘要翻译：通过网络实现示波器功能的系统和方法。在一个实施例中，系统包括：（1）具有本地存储器并且被配置为基于指定采样率的调度收集外部信号的采样的核，将样本写入本地存储器并通过网络发送样本，以及（2）观看者可以通过网络耦合到核心，并且被配置为通过网络接收样本并基于样本显示波形。

10. 发明申请

US20100158051A1 Method, Apparatus and System for Frequency Synchronization Between Devices Communicating over a Packet Network 有权
标题翻译：用于通过分组网络通信的设备之间的频率同步的方法，装置和系统
公开(公告)号：US20100158051A1
公开(公告)日：2010-06-24
申请号：US12339318
申请日：2008-12-19
申请人： Ilija Hadzic , Dennis Raymond Morgan , Alf Neustadt , Zulfiquar Sayeed
发明人： Ilija Hadzic , Dennis Raymond Morgan , Alf Neustadt , Zulfiquar Sayeed
IPC分类号： H04J3/06 , H04L7/00
CPC分类号： H03L7/085 , H03L7/087 , H04J3/0664 , H04J3/0667
摘要： An endpoint or other communication device of a communication system includes a clock recovery module. The communication device is operative as a slave device relative to another communication device that is operative as a master device. The clock recovery module comprises a clock recovery loop configured to control a slave clock frequency of the slave device so as to synchronize the slave clock frequency with a master clock frequency of the master device. The clock recovery loop utilizes a frequency error estimator implemented as a maximum-likelihood estimator with slope fitting based on a sequence of arrival timestamps, and a loop filter implemented as a series combination of an adaptive-bandwidth filter and a proportional-integral controller. The clock recovery module may further comprise a discontinuity detector configured to detect a discontinuity in delays of respective timing messages, and a loop controller operative to place the clock recovery loop in a particular state responsive to detection of the discontinuity.
摘要翻译：通信系统的端点或其他通信设备包括时钟恢复模块。通信设备相对于作为主设备操作的另一通信设备而作为从设备操作。时钟恢复模块包括时钟恢复环路，其被配置为控制从设备的从时钟频率，以使从时钟频率与主设备的主时钟频率同步。时钟恢复环路利用被实现为基于到达时间序列的斜率拟合的最大似然估计器的频率误差估计器，以及实现为自适应带宽滤波器和比例积分控制器的串联组合的环路滤波器。时钟恢复模块还可以包括不连续检测器，其被配置为检测相应定时消息的延迟的不连续性，以及循环控制器，用于响应于不连续性的检测将时钟恢复环置于特定状态。

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