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    • 4. 发明授权
    • Memory architecture with a current controller and reduced power requirements
    • 具有电流控制器和降低功耗要求的内存架构
    • US08169812B2
    • 2012-05-01
    • US12706374
    • 2010-02-16
    • John K. Lynch
    • John K. Lynch
    • G11C7/00
    • G11C11/4091G11C7/08G11C11/404G11C11/405G11C11/4076G11C11/4099G11C11/565
    • Disclosed is a memory architecture comprising at least one memory bit cell and at least one read bit line whose voltage is controlled and changed by a current from a current controller. Each memory bit cell has a storage mechanism, a controlled current source, and a read switch. The controlled current source in each memory bit cell is electrically connected to the read bit line through the read switch. The current from the current controller that controls and changes the read bit line voltage flows through the controlled current source in the memory bit cell. The value of this current is determined by a function of a difference between the voltage on the storage mechanism in the memory bit cell and a reference voltage from a reference voltage input to the current controller. In some versions an indicator is provided for indicating when to stop the current in the controlled current source that controls a voltage change on one of the read bit lines. The indicator has an on and an off condition and a switch is provided for stopping the current in the controlled current source when the indicator is activated in the on condition. The current in the controlled current source is stopped when the voltage change on the read bit line is greater than a predetermined threshold.
    • 公开了一种存储器架构,其包括至少一个存储器位单元和至少一个读取位线,其电压由来自电流控制器的电流控制和改变。 每个存储器单元具有存储机构,受控电流源和读取开关。 每个存储器位单元中的受控电流源通过读开关电连接到读位线。 来自控制和改变读位线电压的电流控制器的电流流过存储器位单元中的受控电流源。 该电流的值由存储位单元中的存储机构上的电压与输入到电流控制器的参考电压的参考电压之间的差异决定。 在一些版本中,提供指示器用于指示何时停止受控电流源中控制读取位线之一上的电压变化的电流。 指示灯具有接通和关闭状态,并且当指示器在接通状态下被激活时,提供用于停止受控电流源中的电流的开关。 当读取位线上的电压变化大于预定阈值时,受控电流源中的电流停止。