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1. 发明授权

US07206224B1 Methods and systems for high write performance in multi-bit flash memory devices 有权
公开(公告)号：US07206224B1
公开(公告)日：2007-04-17
申请号：US11037477
申请日：2005-01-18
申请人： Mark Randolph , Darlene Hamilton , Roni Kornitz
发明人： Mark Randolph , Darlene Hamilton , Roni Kornitz
IPC分类号： G11C11/34
CPC分类号： G11C16/0475 , G11C16/10 , G11C2211/5641
摘要： Methods and circuits for performing high speed write (programming) operations in a dual-bit flash memory array. The method includes, for example, erasing a first and second bit of each cell in the array to a first state, programming the first bit of each cell in the array to a second state, and subsequently programming the second bit of one or more cells in the array to one of the first and second state according to the user's data, resulting in fast write (programming) of those second bits. In addition, the circuit includes, for example, a core cell array having dual-bit flash memory cells configured into a plurality of array portions. The circuit further includes a control circuit configured to selectively block erase one of the array portions, wherein in a first phase of the block erase both first and second bit locations of each dual-bit flash memory cell in the one array portion have sufficient charge removed therefrom to achieve a first state. The control circuit is further configured to, in a second phase of the block erase, supply charge to the first bit location of each dual-bit flash memory cell of the one array portion to enable subsequently fast-write of user's data to the second bit location.

2. 发明授权

US07283402B2 Methods and systems for high write performance in multi-bit flash memory devices 有权
标题翻译：用于多位闪存设备中高写入性能的方法和系统
公开(公告)号：US07283402B2
公开(公告)日：2007-10-16
申请号：US11653655
申请日：2007-01-16
申请人： Mark Randolph , Darlene Hamilton , Roni Kornitz
发明人： Mark Randolph , Darlene Hamilton , Roni Kornitz
IPC分类号： G11C11/34
CPC分类号： G11C16/0475 , G11C16/10 , G11C2211/5641
摘要： Methods and circuits for performing high speed write (programming) operations in a dual-bit flash memory array. The method includes, for example, erasing a first and second bit of each cell in the array to a first state, programming the first bit of each cell in the array to a second state, and subsequently programming the second bit of one or more cells in the array to one of the first and second state according to the user's data, resulting in fast write (programming) of those second bits. In addition, the circuit includes, for example, a core cell array having dual-bit flash memory cells configured into a plurality of array portions. The circuit further includes a control circuit configured to selectively block erase one of the array portions, wherein in a first phase of the block erase both first and second bit locations of each dual-bit flash memory cell in the one array portion have sufficient charge removed therefrom to achieve a first state. The control circuit is further configured to, in a second phase of the block erase, supply charge to the first bit location of each dual-bit flash memory cell of the one array portion to enable subsequently fast-write of user's data to the second bit location.
摘要翻译：用于在双位闪存阵列中执行高速写（编程）操作的方法和电路。该方法包括例如将阵列中的每个单元的第一和第二位擦除到第一状态，将阵列中的每个单元的第一位编程为第二状态，以及随后编程一个或多个单元的第二位在阵列中根据用户的数据到第一和第二状态之一，导致这些第二位的快速写入（编程）。此外，电路包括例如具有配置为多个阵列部分的双位闪存单元的核心单元阵列。电路还包括被配置为选择性地阻止擦除阵列部分中的一个的控制电路，其中在该块的第一阶段擦除一个阵列部分中的每个双位闪存单元的第一和第二位位置都具有足够的电荷被去除从而实现第一状态。控制电路还被配置为在块擦除的第二阶段中向一个阵列部分的每个双位闪存单元的第一位位置提供电荷，以便能够随后将用户数据快速写入第二位位置。

3. 发明申请

US20070115730A1 Methods and systems for high write performance in multi-bit flash memory devices 有权
标题翻译：用于多位闪存设备中高写入性能的方法和系统
公开(公告)号：US20070115730A1
公开(公告)日：2007-05-24
申请号：US11653655
申请日：2007-01-16
申请人： Mark Randolph , Darlene Hamilton , Roni Kornitz
发明人： Mark Randolph , Darlene Hamilton , Roni Kornitz
IPC分类号： G11C16/04
CPC分类号： G11C16/0475 , G11C16/10 , G11C2211/5641
摘要： Methods and circuits are presented for performing high speed write (programming) operations in a dual-bit flash memory array. The method includes, for example, erasing a first and second bit of each cell in the array to a first state, programming the first bit of each cell in the array to a second state, and subsequently programming the second bit of one or more cells in the array to one of the first and second state according to the user's data, resulting in fast write (programming) of those second bits. In addition, the circuit includes, for example, a core cell array having dual-bit flash memory cells configured into a plurality of array portions. The circuit further includes a control circuit configured to selectively block erase one of the array portions, wherein in a first phase of the block erase both first and second bit locations of each dual-bit flash memory cell in the one array portion have sufficient charge removed therefrom to achieve a first state. The control circuit is further configured to, in a second phase of the block erase, supply charge to the first bit location of each dual-bit flash memory cell of the one array portion to enable subsequently fast-write of user's data to the second bit location.
摘要翻译：提出了用于在双位闪存阵列中执行高速写（编程）操作的方法和电路。该方法包括例如将阵列中的每个单元的第一和第二位擦除到第一状态，将阵列中的每个单元的第一位编程为第二状态，以及随后编程一个或多个单元的第二位在阵列中根据用户的数据到第一和第二状态之一，导致这些第二位的快速写入（编程）。此外，电路包括例如具有配置为多个阵列部分的双位闪存单元的核心单元阵列。电路还包括被配置为选择性地阻止擦除阵列部分中的一个的控制电路，其中在该块的第一阶段擦除一个阵列部分中的每个双位闪存单元的第一和第二位位置都具有足够的电荷被去除从而实现第一状态。控制电路还被配置为在块擦除的第二阶段中向一个阵列部分的每个双位闪存单元的第一位位置提供电荷，以便能够随后将用户数据快速写入第二位位置。

4. 发明申请

US20080059668A1 MULTIPLE COMMUNICATION CHANNELS ON MMC OR SD CMD LINE 有权
标题翻译： MMC或SD CMD线上的多个通信通道
公开(公告)号：US20080059668A1
公开(公告)日：2008-03-06
申请号：US11469755
申请日：2006-09-01
申请人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
发明人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
IPC分类号： G06F13/00
CPC分类号： G06F13/4243
摘要： The claimed subject matter can provide an architecture that interfaces a single slave device such as a UICC smartcard with multiple host controllers. For example, a secondary host can be interfaced between a primary host (e.g. a controller in a cellular phone, a PDA, an MP3 player . . . ) to manage all transactions with the slave device. The secondary host can operate transparently to the primary host and thus does not require any modifications to the primary host. This can be accomplished, e.g. by employing the CMD channel (which is relatively sparsely used by the primary host) to communicate both commands and data with the slave. Moreover, the transactions initiated by the secondary host can be segmented into many smaller fragments and interleaved between transactions initiated by the primary host. In addition, the secondary host can temporarily take on the role of the slave device and affect direct communication with the primary host.
摘要翻译：所要求保护的主题可以提供将诸如UICC智能卡的单个从设备与多个主机控制器接口的架构。例如，次主机可以在主主机（例如蜂窝电话中的控制器，PDA，MP3播放器...）之间进行接口，以管理与从设备的所有事务。辅助主机可以对主主机透明地操作，因此不需要对主主机进行任何修改。这可以实现，例如通过使用CMD通道（主主机相对稀疏地使用）来通信与从机的命令和数据。此外，辅助主机发起的事务可以被分割成许多较小的片段，并在主主机发起的事务之间进行交织。此外，辅助主机可以暂时承担从设备的角色，并影响与主主机的直接通信。

5. 发明授权

US08156272B2 Multiple communication channels on MMC or SD CMD line 有权
标题翻译： MMC或SD CMD线上有多个通讯通道
公开(公告)号：US08156272B2
公开(公告)日：2012-04-10
申请号：US11469755
申请日：2006-09-01
申请人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
发明人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
IPC分类号： G06F13/00
CPC分类号： G06F13/4243
摘要： The claimed subject matter can provide an architecture that interfaces a single slave device such as a UICC smartcard with multiple host controllers. For example, a secondary host can be interfaced between a primary host (e.g. a controller in a cellular phone, a PDA, an MP3 player . . . ) to manage all transactions with the slave device. The secondary host can operate transparently to the primary host and thus does not require any modifications to the primary host. This can be accomplished, e.g. by employing the CMD channel (which is relatively sparsely used by the primary host) to communicate both commands and data with the slave. Moreover, the transactions initiated by the secondary host can be segmented into many smaller fragments and interleaved between transactions initiated by the primary host. In addition, the secondary host can temporarily take on the role of the slave device and affect direct communication with the primary host.
摘要翻译：所要求保护的主题可以提供将诸如UICC智能卡的单个从设备与多个主机控制器接口的架构。例如，次主机可以在主主机（例如蜂窝电话中的控制器，PDA，MP3播放器...）之间进行接口，以管理与从设备的所有事务。辅助主机可以对主主机透明地操作，因此不需要对主主机进行任何修改。这可以实现，例如通过使用CMD通道（主主机相对稀疏地使用）来通信与从机的命令和数据。此外，辅助主机发起的事务可以被分割成许多较小的片段，并在主主机发起的事务之间进行交织。此外，辅助主机可以暂时承担从设备的角色，并影响与主主机的直接通信。

6. 发明授权

US08386681B2 Multiple communication channels on MMC or SD CMD line 有权
标题翻译： MMC或SD CMD线上有多个通讯通道
公开(公告)号：US08386681B2
公开(公告)日：2013-02-26
申请号：US13410630
申请日：2012-03-02
申请人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
发明人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
IPC分类号： G06F13/00
CPC分类号： G06F13/4243
摘要： The claimed subject matter can provide an architecture that interfaces a single slave device such as a UICC smartcard with multiple host controllers. For example, a secondary host can be interfaced between a primary host (e.g., a controller in a cellular phone, a PDA, an MP3 player . . . ) to manage all transactions with the slave device. The secondary host can operate transparently to the primary host and thus does not require any modifications to the primary host. This can be accomplished, e.g., by employing the CMD channel (which is relatively sparsely used by the primary host) to communicate both commands and data with the slave.
摘要翻译：所要求保护的主题可以提供将诸如UICC智能卡的单个从设备与多个主机控制器接口的架构。例如，次主机可以在主主机（例如，蜂窝电话中的控制器，PDA，MP3播放器...）之间进行接口，以管理与从设备的所有交易。辅助主机可以对主主机透明地操作，因此不需要对主主机进行任何修改。这可以例如通过使用CMD信道（主主机相对稀疏地使用）来将命令和数据与从属装置进行通信来实现。

7. 发明申请

US20120226840A1 MULTIPLE COMMUNICATION CHANNELS ON MMC OR SD CMD LINE 有权
标题翻译： MMC或SD CMD线上的多个通信通道
公开(公告)号：US20120226840A1
公开(公告)日：2012-09-06
申请号：US13410630
申请日：2012-03-02
申请人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
发明人： Bruno Charrat , Jean-Yves Grall , Nicolas Prawitz , Roni Kornitz
IPC分类号： G06F13/00
CPC分类号： G06F13/4243
摘要： The claimed subject matter can provide an architecture that interfaces a single slave device such as a UICC smartcard with multiple host controllers. For example, a secondary host can be interfaced between a primary host (e.g., a controller in a cellular phone, a PDA, an MP3 player . . . ) to manage all transactions with the slave device. The secondary host can operate transparently to the primary host and thus does not require any modifications to the primary host. This can be accomplished, e.g., by employing the CMD channel (which is relatively sparsely used by the primary host) to communicate both commands and data with the slave.
摘要翻译：所要求保护的主题可以提供将诸如UICC智能卡的单个从设备与多个主机控制器接口的架构。例如，次主机可以在主主机（例如，蜂窝电话中的控制器，PDA，MP3播放器...）之间进行接口，以管理与从设备的所有交易。辅助主机可以对主主机透明地操作，因此不需要对主主机进行任何修改。这可以例如通过使用CMD信道（主主机相对稀疏地使用）来将命令和数据与从属装置进行通信来实现。

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