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    • 2. 发明授权
    • Method for verification of resolution enhancement techniques and optical proximity correction in lithography
    • 用于光刻中分辨率增强技术和光学邻近校正的验证方法
    • US06996797B1
    • 2006-02-07
    • US10904600
    • 2004-11-18
    • Lars W. LiebmannJames A. CulpIoana C. GraurMaharaj Mukherjee
    • Lars W. LiebmannJames A. CulpIoana C. GraurMaharaj Mukherjee
    • G06F17/50
    • G06F17/5081G03F1/36G06F2217/12Y02P90/265
    • A method for model-based verification of resolution enhancement techniques (RET) and optical proximity correction (OPC) in lithography includes scaling shapes of a drawn mask layout to their corresponding intended wafer dimensions so as to create a scaled image. A first feature of the scaled image is shifted with respect to a second feature thereof in accordance with a predetermined maximum overlay error. An intersection parameter of the first and said second features of the scaled image is calculated so as to determine a yield metric of an ideal layout. A first feature of a simulated wafer image is shifted with respect to a second feature thereof in accordance with the predetermined maximum overlay error. An intersection parameter of the first and said second features of the simulated wafer image is calculated so as to determine a yield metric of a simulated layout, and the yield metric of the simulated wafer image is compared to the yield metric of the scaled image.
    • 用于光刻中的分辨率增强技术(RET)和光学邻近校正(OPC)的基于模型的验证的方法包括将绘制的掩模布局的形状缩放到其相应的预期晶片尺寸,以便创建缩放图像。 根据预定的最大重叠误差,缩放图像的第一特征相对于其第二特征偏移。 计算缩放图像的第一和第二特征的交点参数,以便确定理想布局的屈服度量。 模拟晶片图像的第一特征相对于其第二特征根据预定的最大重叠误差而偏移。 计算模拟晶片图像的第一和第二特征的交叉参数,以便确定模拟布局的屈服度量,并将模拟晶片图像的屈服度量与缩放图像的屈服度量进行比较。
    • 5. 发明申请
    • SYSTEM FOR SEARCH AND ANALYSIS OF SYSTEMATIC DEFECTS IN INTEGRATED CIRCUITS
    • 集成电路系统缺陷的搜索与分析系统
    • US20080232675A1
    • 2008-09-25
    • US12132710
    • 2008-06-04
    • Bette L. Bergman ReuterDavid L. DeMarisMark A. LavinWilliam C. LeipoldDaniel N. MaynardMaharaj Mukherjee
    • Bette L. Bergman ReuterDavid L. DeMarisMark A. LavinWilliam C. LeipoldDaniel N. MaynardMaharaj Mukherjee
    • G06K9/00
    • G06T7/001G06T2207/30148
    • Disclosed is a method of locating systematic defects in integrated circuits. The invention first performs a preliminary extracting and index processing of the circuit design and then performs feature searching. When performing the preliminary extracting and index processing the invention establishes a window grid for the circuit design and merges basis patterns with shapes in the circuit design within each window of the window grid. The invention transforms shapes in a each window into feature vectors by finding intersections between the basis patterns and the shapes in the windows. Then, the invention clusters the feature vectors to produce an index of feature vectors. After performing the extracting and index processing, the invention performs the process of feature searching by first identifying a defect region window of the circuit layout and similarly merging basis patterns with shapes in the defect region window. This merging process can include rotating and mirroring the shapes in the defect region. The invention similarly transforms shapes in the defect region window into defect vectors by finding intersections between basis patterns and the shapes in the defect region. Then, the invention can easily find feature vectors that are similar to the defect vector using, for example, representative feature vectors from the index of feature vectors. Then, the similarities and differences between the defect vectors and the feature vectors can be analyzed.
    • 公开了一种定位集成电路系统缺陷的方法。 本发明首先进行电路设计的初步提取和索引处理,然后执行特征搜索。 当执行初步提取和索引处理时,本发明建立了用于电路设计的窗口网格,并且将窗体网格的每个窗口内的电路设计中的形状与基本图案合并。 本发明通过在窗口中找到基本图案和形状之间的交点来将每个窗口中的形状转换为特征向量。 然后,本发明聚集特征向量以产生特征向量的索引。 在执行提取和索引处理之后,本发明通过首先识别电路布局的缺陷区域窗口并且将基本模式与缺陷区域窗口中的形状类似地合并来执行特征搜索的处理。 该合并过程可以包括旋转和镜像缺陷区域中的形状。 本发明类似地通过在缺陷区域中找到基础图案和形状之间的交点来将缺陷区域窗口中的形状转换为缺陷向量。 然后,本发明可以使用例如来自特征向量的索引的代表性特征向量容易地找到与缺陷向量相似的特征向量。 然后,可以分析缺陷向量和特征向量之间的相似性和差异。
    • 10. 发明授权
    • System for search and analysis of systematic defects in integrated circuits
    • 集成电路系统缺陷的搜索和分析系统
    • US07552417B2
    • 2009-06-23
    • US12132710
    • 2008-06-04
    • Bette L. Bergman ReuterDavid L. DeMarisMark A. LavinWilliam C. LeipoldDaniel N. MaynardMaharaj Mukherjee
    • Bette L. Bergman ReuterDavid L. DeMarisMark A. LavinWilliam C. LeipoldDaniel N. MaynardMaharaj Mukherjee
    • G06F17/50
    • G06T7/001G06T2207/30148
    • Disclosed is a method of locating systematic defects in integrated circuits. The invention first performs a preliminary extracting and index processing of the circuit design and then performs feature searching. When performing the preliminary extracting and index processing the invention establishes a window grid for the circuit design and merges basis patterns with shapes in the circuit design within each window of the window grid. The invention transforms shapes in a each window into feature vectors by finding intersections between the basis patterns and the shapes in the windows. Then, the invention clusters the feature vectors to produce an index of feature vectors. After performing the extracting and index processing, the invention performs the process of feature searching by first identifying a defect region window of the circuit layout and similarly merging basis patterns with shapes in the defect region window. This merging process can include rotating and mirroring the shapes in the defect region. The invention similarly transforms shapes in the defect region window into defect vectors by finding intersections between basis patterns and the shapes in the defect region. Then, the invention can easily find feature vectors that are similar to the defect vector using, for example, representative feature vectors from the index of feature vectors. Then, the similarities and differences between the defect vectors and the feature vectors can be analyzed.
    • 公开了一种定位集成电路系统缺陷的方法。 本发明首先进行电路设计的初步提取和索引处理,然后执行特征搜索。 当执行初步提取和索引处理时,本发明建立了用于电路设计的窗口网格,并且将窗体网格的每个窗口内的电路设计中的形状与基本图案合并。 本发明通过在窗口中找到基本图案和形状之间的交点来将每个窗口中的形状转换为特征向量。 然后,本发明聚集特征向量以产生特征向量的索引。 在执行提取和索引处理之后,本发明通过首先识别电路布局的缺陷区域窗口并且将基本模式与缺陷区域窗口中的形状类似地合并来执行特征搜索的处理。 该合并过程可以包括旋转和镜像缺陷区域中的形状。 本发明类似地通过在缺陷区域中找到基础图案和形状之间的交点来将缺陷区域窗口中的形状转换为缺陷向量。 然后,本发明可以使用例如来自特征向量的索引的代表性特征向量容易地找到与缺陷向量相似的特征向量。 然后,可以分析缺陷向量和特征向量之间的相似性和差异。