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    • 6. 发明授权
    • Method for non-thermally nitrided gate formation for high voltage devices
    • 高压器件非热氮化栅极形成方法
    • US06730566B2
    • 2004-05-04
    • US10264729
    • 2002-10-04
    • Hiroaki NiimiRajesh KhamankarHusam N. Alshareef
    • Hiroaki NiimiRajesh KhamankarHusam N. Alshareef
    • H01L218234
    • H01L21/823462Y10S438/92
    • A method is provided for non-thermally nitrided gate formation of high voltage transistor devices. The non-thermally nitrided gate formation is useful in the formation of dual thickness gate dielectric structures. The non-thermally nitrided gate formation comprises nitridation to introduce nitrogen atoms into the gate dielectric layer of the high voltage transistor devices to mitigate leakage associated with the high voltage transistor devices. The nitridation of the gate dielectric layer damages the surface of the gate dielectric layer. The damaged surface of the gate dielectric layer is removed by a relatively low temperature re-oxidation process. The low temperature re-oxidation process minimizes nitrogen loss during a subsequent photoresist stripping process and mitigates film densification, such that the structure can be readily etched by standard etching chemicals in subsequent processing.
    • 提供了用于高压晶体管器件的非热氮化栅极形成的方法。 非热氮化栅极形成可用于双厚度栅极电介质结构的形成。 非热氮化栅极形成包括氮化以将氮原子引入到高压晶体管器件的栅极介电层中,以减轻与高压晶体管器件相关的泄漏。 栅极电介质层的氮化破坏了栅极电介质层的表面。 通过相对较低温度的再氧化工艺去除栅介电层的受损表面。 低温再氧化工艺在随后的光致抗蚀剂剥离过程中使氮损失最小化并减轻膜致密化,使得结构可以在随后的处理中通过标准蚀刻化学品容易地蚀刻。