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1. 发明专利

DE60142251D1 HOCHFREQUENZVERSTÄRKER 未知
公开(公告)号：DE60142251D1
公开(公告)日：2010-07-08
申请号：DE60142251
申请日：2001-05-17
申请人： MITSUBISHI ELECTRIC CORP
发明人： TANIGUCHI EIJI , SUEMATSU NORIHARU , SAWAUMI CHIEMI , MAEDA KENICHI , IKUSHIMA TAKAYUKI , JOBA HIROYUKI , TAKAGI TADASHI
IPC分类号： H03F1/32 , H03D7/14 , H03F1/02 , H03F1/26 , H03F1/30 , H03F3/19 , H03F3/45 , H03F3/72

2. 发明专利

HK1053392A1 High frequency amplifier and high-frequency mixer 未知
公开(公告)号：HK1053392A1
公开(公告)日：2003-10-17
申请号：HK03105648
申请日：2003-08-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： TANIGUCHI EIJI , SUEMATSU NORIHARU , MAEDA KENICHI , IKUSHIMA TAKAYUKI , JOBA HIROYUKI , TAKAGI TADASHI
IPC分类号： H03F20060101 , H03D20060101 , H03D7/14 , H03F1/02 , H03F1/30 , H03F1/32 , H03F3/19 , H03F3/45 , H03F3/72
摘要： A high frequency amplifier in which a common emitter bipolar transistor is used, and in that a constant current source and a constant voltage source are switched to apply a DC bias to a base terminal of the bipolar transistor in accordance with a power level of a high frequency signal input to the bipolar transistor or a power level of a high frequency signal output therefrom, and a frequency mixer in that a DC bias is applied to a base of at least one of a bipolar transistor for the input of a high frequency signal and a bipolar transistor for the input of a local oscillation wave by using a configuration for applying the DC bias to a base of an amplifying bipolar transistor employed in the high frequency amplifier.

3. 发明公开

EP2846471A4 STARTUP SIGNAL GENERATION DEVICE 审中-公开
标题翻译： STARTSIGNALERZEUGUNGSVORRICHTUNG
公开(公告)号：EP2846471A4
公开(公告)日：2015-11-25
申请号：EP13757548
申请日：2013-02-25
申请人： MITSUBISHI ELECTRIC CORP
发明人： HIRAI AKIHIRO , TAKAHASHI YOSHINORI , TANIGUCHI EIJI
IPC分类号： H04B1/16 , H04B17/318 , H04W52/02
CPC分类号： H04W52/0225 , H04B1/16 , H04B17/318 , H04W52/0229 , H04W52/0245 , Y02D70/00 , Y02D70/142 , Y02D70/40
摘要： Besides a time constant circuit 5 that imposes a frequency limit on a wireless signal detected by a power detecting circuit 4 at a preset time constant Ta, there is provided a time constant circuit 8 that imposes a frequency limit on the wireless signal at a time constant Tb greater than the time constant Ta. When the signal level of an intermittent operation signal supplied from a signal input terminal 1 is H level or when a threshold processing circuit 6 decides that the level of the wireless signal is higher than a threshold Th, a logic unit 3 supplies a control signal that instructs starting to the power detecting circuit 4, time constant circuits 5 and 8 and threshold processing circuits 6 and 9.
摘要翻译：除了对由功率检测电路4以预设时间常数Ta检测到的无线信号施加频率限制的时间常数电路5之外，还提供了时间常数电路8，其以时间常数对无线信号施加频率限制 Tb大于时间常数Ta。当从信号输入端子1提供的间歇操作信号的信号电平为H电平时，或者当阈值处理电路6判定无线信号的电平高于阈值Th时，逻辑单元3提供控制信号指示开始到功率检测电路4，时间常数电路5和8以及阈值处理电路6和9。

4. 发明公开

EP1341303A4 HIGH-FREQUENCY AMPLIFIER AND HIGH-FREQUENCY MIXER 有权
标题翻译：高频放大器和高频混频
公开(公告)号：EP1341303A4
公开(公告)日：2005-08-24
申请号：EP01932121
申请日：2001-05-17
申请人： MITSUBISHI ELECTRIC CORP
发明人： TANIGUCHI EIJI , SUEMATSU NORIHARU , SAWAUMI CHIEMI , MAEDA KENICHI , IKUSHIMA TAKAYUKI , JOBA HIROYUKI , TAKAGI TADASHI
IPC分类号： H03D7/14 , H03F1/02 , H03F1/30 , H03F1/32 , H03F3/19 , H03F3/45 , H03F3/72 , H03F1/26
CPC分类号： H03F3/72 , H03D7/1408 , H03D7/1433 , H03D7/1458 , H03D7/1491 , H03D2200/0033 , H03D2200/0043 , H03F1/302 , H03F3/19 , H03F3/45089 , H03F2200/249 , H03F2200/301 , H03F2200/492 , H03F2200/54 , H03F2203/7206
摘要： A high-frequency amplifier, wherein, using an emitter-earthed bipolar transistor, the DC bias of the bipolar transistor to a base terminal is applied by switching a constant current source and a constant voltage source according to the power level of the high-frequency signals input into or output from the bipolar transistor; and a high-frequency mixer, wherein, using such a structure that the DC bias is applied to the base of the bipolar transistor for amplification of the high-frequency amplifier, the DC bias is applied to the base of at least one of the bipolar transistors for inputting high-frequency signal and local oscillating wave.

5. 发明公开

EP1418665A4 FREQUENCY CONVERTER 审中-公开
标题翻译：变频装置
公开(公告)号：EP1418665A4
公开(公告)日：2005-06-08
申请号：EP02705273
申请日：2002-03-15
申请人： MITSUBISHI ELECTRIC CORP
发明人： TANIGUCHI EIJI , SAWAUMI CHIEMI , SUEMATSU NORIHARU , MAEDA KENICHI , IKUSHIMA TAKAYUKI , JOBA HIROYUKI , TAKAHASHI YOSHINORI
IPC分类号： H03D7/12 , H03D7/14
CPC分类号： H03D7/12 , H03D7/1433 , H03D7/1441 , H03D7/1458
摘要： A frequency converter comprising a pair of first and second transistors having collector terminals and emitter terminals connected commonly and a common collector terminal connected with a power supply terminal through a first resistor, a third transistor having a collector terminal connected with the power supply terminal through a second resistor and an emitter terminal connected with the common emitter terminal of the pair of transistors, a third resistor having one end connected with the common emitter terminal of the pair of transistors and the other end grounded through a constant current source, and an output terminal connected with the common collector terminal of the pair of transistors, wherein good saturation characteristics and distortion characteristics can be attained even at the time of low voltage and/or low current operation.

6. 发明专利

JP2015092802A レクテナ装置审中-公开
公开(公告)号：JP2015092802A
公开(公告)日：2015-05-14
申请号：JP2013231844
申请日：2013-11-08
申请人： MITSUBISHI ELECTRIC CORP , KANAZAWA INST OF TECHNOLOGY
发明人： TSURU MASAOMI , TANIGUCHI EIJI , ITO KENJI , NOGUCHI KEISUKE
IPC分类号： H01Q9/16 , H02M7/06
摘要：【課題】インピーダンス変換の変成比を低くすることができ、インピーダンス変換による損失を抑えることでRF−DC変換効率の高いレクテナ装置を提供する。【解決手段】インピーダンスが回路の特性インピーダンスより高い高インピーダンスアンテナと、インピーダンス変換部またはさらにアンテナ平衡・不平衡変換部と、整流回路と、平滑用回路とを備え、高インピーダンスアンテナがシングルエンド出力であれば平衡・不平衡変換部でシングルエンドから差動への変換が行われ、高インピーダンスアンテナで受電した電波の高電圧が、変成比の低いインピーダンス変換部による高電圧化を介して整流回路に印加され、整流回路にて受電した電波を直流に変換して平滑用回路にて平滑された直流電力を取り出す。【選択図】図1

7. 发明专利

JP2014207524A アクティブバラン有权
标题翻译：活动巴伦
公开(公告)号：JP2014207524A
公开(公告)日：2014-10-30
申请号：JP2013083029
申请日：2013-04-11
申请人：三菱電機株式会社 , Mitsubishi Electric Corp
发明人： HAGIWARA TATSUYA , TAKAHASHI TAKANORI , TSUTSUMI TSUNEJI , TANIGUCHI EIJI
IPC分类号： H03F3/345 , H03D7/14 , H03F3/68 , H03H11/32
摘要：【課題】DCカット用キャパシタを必要とせずに、ゲート接地FETとソース接地FETに適切なバイアス電圧を印加することで、広帯域に単相差動変換が可能なアクティブバランを得る。【解決手段】ゲート接地FET4を含むFET10〜12からなるカレントミラー回路により構成され、ゲート接地FET4とソース接地FET5に、カレントミラー回路に供給される参照電流に応じてゲート接地FET4とソース接地FET5の相互コンダクタンスの絶対値が等しくなるようにバイアスを印加するカスコード電流源回路15を備えた。よって、DCカット用キャパシタを必要とせずに、ゲート接地FET4とソース接地FET5の相互コンダクタンスの絶対値が等しくなるようにバイアスを印加することができるため、広帯域に渡って高精度な単相差動変換を可能とすることができる。【選択図】図1
摘要翻译：要解决的问题：提供一种通过在接地栅极FET和接地源FET上施加适当的偏置电压而在宽带上实现单端到差分转换的有源平衡 - 不平衡变换器，而不需要直流截止电容器。解决方案：主动平衡 - 不平衡变压器包括共源共栅电流源电路15，其包括由FET 10-12加上接地栅极FET 4构成的电流镜电路，并且被配置为根据参考值向接地栅极FET 4和接地源FET 5施加偏置电流提供给电流镜电路，使得接地栅极FET 4和接地源极FET 5的跨导的绝对值彼此相等。这可以施加偏置，使得接地栅极FET 4和接地源FET 5的跨导的绝对值变得彼此相等，而不需要直流截止电容器来实现高精度单端到差分转换在宽带上。

8. 发明专利

JP2014116783A Rectifier 有权
标题翻译：整流器
公开(公告)号：JP2014116783A
公开(公告)日：2014-06-26
申请号：JP2012269422
申请日：2012-12-10
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： TANAKA TOSHIYUKI , TSURU MASAOMI , TANIGUCHI EIJI
IPC分类号： H01P1/00 , H01P5/02 , H03H7/38
摘要： PROBLEM TO BE SOLVED: To obtain a rectifier which reduces mismatching caused by a manufacture error in manufacture, even when a difference between a fundamental wave impedance of a rectification element and a signal source impedance is large.SOLUTION: In a fundamental wave, a fundamental wave impedance Zof a rectification element 1 is transformed into an intermediate impedance Zwhich becomes a value approximate to a signal source impedance Z, by an impedance transformer 3 which becomes a 1/4 wavelength in a high-frequency fundamental wave. The intermediate impedance Zand the signal source impedance Zare matched by a matching circuit 4. Thus, even when a difference between the fundamental wave impedance Zof the rectification element 1 and the signal source impedance Zis large, a change of a fundamental wave impedance 1/Yof a rectifier with respect to an electric length of the matching circuit 4 can be reduced, thereby reducing mismatching caused by a manufacture error in manufacturing the rectifier.
摘要翻译：要解决的问题：即使当整流元件的基波阻抗与信号源阻抗之间的差异大时，也可以获得减少制造误差引起的失配的整流器。解决方案：在基波中，基波通过在高频基波中成为1/4波长的阻抗变换器3将整流元件1的波阻抗Zx变换为成为接近信号源阻抗Z的值的中间阻抗Z。中间阻抗Z和信号源阻抗Zare由匹配电路4匹配。因此，即使当整流元件1的基波阻抗Z与信号源阻抗Zis之间的差大时，基波阻抗1 / Y的变化可以减少相对于匹配电路4的电长度的整流器，从而减少在制造整流器时由制造误差引起的失配。

9. 发明专利

JP2014103710A Differential charge pump circuit 有权
标题翻译：差分充电泵电路
公开(公告)号：JP2014103710A
公开(公告)日：2014-06-05
申请号：JP2012252227
申请日：2012-11-16
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： TSUTSUMI TSUNEJI , HIRAI AKIHITO , TANIGUCHI EIJI
IPC分类号： H02M3/07
摘要： PROBLEM TO BE SOLVED: To suppress an offset caused in an output current characteristic even if there are variations in current sources.SOLUTION: A differential charge pump circuit includes: an addition circuit 1 comprising an OR gate 2 for performing an OR operation on UPP and CLK signals and outputting a logic result UP2P to transistors M1, M7, and an OR gate 3 for performing an OR operation on DNP and CLK signals and outputting a logic result DN2P to transistors M4, M6; and an addition circuit 4 comprising an OR gate 5 for performing an OR operation on UPN and CLK signals and outputting a logic result UP2N to transistors M2, M8, and an OR gate 6 for performing an OR operation on DNN and CLK signals and outputting a logic result DN2N to transistors M3, M5.
摘要翻译：要解决的问题：即使存在电流源的变化，也抑制输出电流特性引起的偏移。解算：差分电荷泵电路包括：加法电路1，包括用于对UPP进行或运算的或门2， CLK信号并将逻辑结果UP2P输出到晶体管M1，M7和或门3，用于对DNP和CLK信号执行或运算，并将逻辑结果DN2P输出到晶体管M4，M6; 以及加法电路4，其包括或门5，用于对UPN和CLK信号执行或运算，并将逻辑结果UP2N输出到晶体管M2，M8和或门6，以对DNN和CLK信号执行或运算，并输出逻辑结果DN2N至晶体管M3，M5。

10. 发明专利

JP2014103443A Differential charge pump circuit 审中-公开
标题翻译：差分充电泵电路
公开(公告)号：JP2014103443A
公开(公告)日：2014-06-05
申请号：JP2012252219
申请日：2012-11-16
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： TSUTSUMI TSUNEJI , HIRAI AKIHITO , TANIGUCHI EIJI
IPC分类号： H03L7/093 , H03F3/34 , H03F3/45
摘要： PROBLEM TO BE SOLVED: To provide a differential charge pump circuit that can suppress an offset caused in an output current characteristic even if there are variations in current sources.SOLUTION: A sink current supply circuit 3 is configured to supply sink currents to a normal phase output terminal OUTP and a reverse phase output terminal OUTN in accordance with a signal level of a CLK signal, and a source current supply circuit 8 is configured to supply source currents to the normal phase output terminal OUTP and the reverse phase output terminal OUTN in accordance with the signal level of the CLK signal. This can suppress the generation of an offset even if there are variations α, β in the current sources.
摘要翻译：要解决的问题：提供一种差分电荷泵电路，其即使在电流源有变化的情况下也可以抑制在输出电流特性中引起的偏移。解决方案：吸收电流供应电路3被配置为将吸收电流提供给正常相输出端子OUTP和反相输出端子OUTN，源极电流供给电路8被配置为根据相位输出端子OUTP和反相输出端子OUTN将源电流提供给正相输出端子OUTP 与CLK信号的信号电平。这可以抑制偏移的产生，即使存在变化α，＆bgr; 在目前的消息来源。

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